Root/
1 | |
2 | #ifndef TRIDENTFB_DEBUG |
3 | #define TRIDENTFB_DEBUG 0 |
4 | #endif |
5 | |
6 | #if TRIDENTFB_DEBUG |
7 | #define debug(f, a...) printk("%s:" f, __func__ , ## a); |
8 | #else |
9 | #define debug(f, a...) |
10 | #endif |
11 | |
12 | #define output(f, a...) pr_info("tridentfb: " f, ## a) |
13 | |
14 | #define Kb (1024) |
15 | #define Mb (Kb*Kb) |
16 | |
17 | /* PCI IDS of supported cards temporarily here */ |
18 | |
19 | #define CYBER9320 0x9320 |
20 | #define CYBER9388 0x9388 |
21 | #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */ |
22 | #define CYBER9385 0x9385 /* ditto */ |
23 | #define CYBER9397 0x9397 |
24 | #define CYBER9397DVD 0x939A |
25 | #define CYBER9520 0x9520 |
26 | #define CYBER9525DVD 0x9525 |
27 | #define TGUI9440 0x9440 |
28 | #define TGUI9660 0x9660 |
29 | #define PROVIDIA9685 0x9685 |
30 | #define IMAGE975 0x9750 |
31 | #define IMAGE985 0x9850 |
32 | #define BLADE3D 0x9880 |
33 | #define CYBERBLADEE4 0x9540 |
34 | #define CYBERBLADEi7 0x8400 |
35 | #define CYBERBLADEi7D 0x8420 |
36 | #define CYBERBLADEi1 0x8500 |
37 | #define CYBERBLADEi1D 0x8520 |
38 | #define CYBERBLADEAi1 0x8600 |
39 | #define CYBERBLADEAi1D 0x8620 |
40 | #define CYBERBLADEXPAi1 0x8820 |
41 | #define CYBERBLADEXPm8 0x9910 |
42 | #define CYBERBLADEXPm16 0x9930 |
43 | |
44 | /* these defines are for 'lcd' variable */ |
45 | #define LCD_STRETCH 0 |
46 | #define LCD_CENTER 1 |
47 | #define LCD_BIOS 2 |
48 | |
49 | /* General Registers */ |
50 | #define SPR 0x1F /* Software Programming Register (videoram) */ |
51 | |
52 | /* 3C4 */ |
53 | #define RevisionID 0x09 |
54 | #define OldOrNew 0x0B |
55 | #define ConfPort1 0x0C |
56 | #define ConfPort2 0x0C |
57 | #define NewMode2 0x0D |
58 | #define NewMode1 0x0E |
59 | #define Protection 0x11 |
60 | #define MCLKLow 0x16 |
61 | #define MCLKHigh 0x17 |
62 | #define ClockLow 0x18 |
63 | #define ClockHigh 0x19 |
64 | #define SSetup 0x20 |
65 | #define SKey 0x37 |
66 | #define SPKey 0x57 |
67 | |
68 | /* 3x4 */ |
69 | #define CRTCModuleTest 0x1E |
70 | #define FIFOControl 0x20 |
71 | #define LinearAddReg 0x21 |
72 | #define DRAMTiming 0x23 |
73 | #define New32 0x23 |
74 | #define RAMDACTiming 0x25 |
75 | #define CRTHiOrd 0x27 |
76 | #define AddColReg 0x29 |
77 | #define InterfaceSel 0x2A |
78 | #define HorizOverflow 0x2B |
79 | #define GETest 0x2D |
80 | #define Performance 0x2F |
81 | #define GraphEngReg 0x36 |
82 | #define I2C 0x37 |
83 | #define PixelBusReg 0x38 |
84 | #define PCIReg 0x39 |
85 | #define DRAMControl 0x3A |
86 | #define MiscContReg 0x3C |
87 | #define CursorXLow 0x40 |
88 | #define CursorXHigh 0x41 |
89 | #define CursorYLow 0x42 |
90 | #define CursorYHigh 0x43 |
91 | #define CursorLocLow 0x44 |
92 | #define CursorLocHigh 0x45 |
93 | #define CursorXOffset 0x46 |
94 | #define CursorYOffset 0x47 |
95 | #define CursorFG1 0x48 |
96 | #define CursorFG2 0x49 |
97 | #define CursorFG3 0x4A |
98 | #define CursorFG4 0x4B |
99 | #define CursorBG1 0x4C |
100 | #define CursorBG2 0x4D |
101 | #define CursorBG3 0x4E |
102 | #define CursorBG4 0x4F |
103 | #define CursorControl 0x50 |
104 | #define PCIRetry 0x55 |
105 | #define PreEndControl 0x56 |
106 | #define PreEndFetch 0x57 |
107 | #define PCIMaster 0x60 |
108 | #define Enhancement0 0x62 |
109 | #define NewEDO 0x64 |
110 | #define TVinterface 0xC0 |
111 | #define TVMode 0xC1 |
112 | #define ClockControl 0xCF |
113 | |
114 | |
115 | /* 3CE */ |
116 | #define MiscExtFunc 0x0F |
117 | #define PowerStatus 0x23 |
118 | #define MiscIntContReg 0x2F |
119 | #define CyberControl 0x30 |
120 | #define CyberEnhance 0x31 |
121 | #define FPConfig 0x33 |
122 | #define VertStretch 0x52 |
123 | #define HorStretch 0x53 |
124 | #define BiosMode 0x5c |
125 | #define BiosReg 0x5d |
126 | |
127 | /* Graphics Engine */ |
128 | #define STATUS 0x2120 |
129 | #define OLDCMD 0x2124 |
130 | #define DRAWFL 0x2128 |
131 | #define OLDCLR 0x212C |
132 | #define OLDDST 0x2138 |
133 | #define OLDSRC 0x213C |
134 | #define OLDDIM 0x2140 |
135 | #define CMD 0x2144 |
136 | #define ROP 0x2148 |
137 | #define COLOR 0x2160 |
138 | #define BGCOLOR 0x2164 |
139 | #define SRC1 0x2100 |
140 | #define SRC2 0x2104 |
141 | #define DST1 0x2108 |
142 | #define DST2 0x210C |
143 | |
144 | #define ROP_S 0xCC |
145 | #define ROP_P 0xF0 |
146 | #define ROP_X 0x66 |
147 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9