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1 | /*====================================================================== |
2 | |
3 | Device driver for the PCMCIA control functionality of PXA2xx |
4 | microprocessors. |
5 | |
6 | The contents of this file may be used under the |
7 | terms of the GNU Public License version 2 (the "GPL") |
8 | |
9 | (c) Ian Molton (spyro@f2s.com) 2003 |
10 | (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4 |
11 | |
12 | derived from sa11xx_base.c |
13 | |
14 | Portions created by John G. Dorsey are |
15 | Copyright (C) 1999 John G. Dorsey. |
16 | |
17 | ======================================================================*/ |
18 | |
19 | #include <linux/module.h> |
20 | #include <linux/slab.h> |
21 | #include <linux/init.h> |
22 | #include <linux/cpufreq.h> |
23 | #include <linux/ioport.h> |
24 | #include <linux/kernel.h> |
25 | #include <linux/spinlock.h> |
26 | #include <linux/platform_device.h> |
27 | |
28 | #include <mach/hardware.h> |
29 | #include <asm/io.h> |
30 | #include <asm/irq.h> |
31 | #include <asm/system.h> |
32 | #include <mach/pxa2xx-regs.h> |
33 | #include <asm/mach-types.h> |
34 | |
35 | #include <pcmcia/cs_types.h> |
36 | #include <pcmcia/ss.h> |
37 | #include <pcmcia/cistpl.h> |
38 | |
39 | #include "soc_common.h" |
40 | #include "pxa2xx_base.h" |
41 | |
42 | /* |
43 | * Personal Computer Memory Card International Association (PCMCIA) sockets |
44 | */ |
45 | |
46 | #define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ |
47 | #define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ |
48 | #define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ |
49 | #define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ |
50 | #define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ |
51 | |
52 | #define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ |
53 | #define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ |
54 | #define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ |
55 | #define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ |
56 | |
57 | #define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ |
58 | #define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ |
59 | #define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ |
60 | #define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ |
61 | |
62 | #define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ |
63 | (0x20000000 + (Nb) * PCMCIASp) |
64 | #define _PCMCIAIO(Nb) _PCMCIA(Nb) /* PCMCIA I/O [0..1] */ |
65 | #define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ |
66 | (_PCMCIA(Nb) + 2 * PCMCIAPrtSp) |
67 | #define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ |
68 | (_PCMCIA(Nb) + 3 * PCMCIAPrtSp) |
69 | |
70 | #define _PCMCIA0 _PCMCIA(0) /* PCMCIA 0 */ |
71 | #define _PCMCIA0IO _PCMCIAIO(0) /* PCMCIA 0 I/O */ |
72 | #define _PCMCIA0Attr _PCMCIAAttr(0) /* PCMCIA 0 Attribute */ |
73 | #define _PCMCIA0Mem _PCMCIAMem(0) /* PCMCIA 0 Memory */ |
74 | |
75 | #define _PCMCIA1 _PCMCIA(1) /* PCMCIA 1 */ |
76 | #define _PCMCIA1IO _PCMCIAIO(1) /* PCMCIA 1 I/O */ |
77 | #define _PCMCIA1Attr _PCMCIAAttr(1) /* PCMCIA 1 Attribute */ |
78 | #define _PCMCIA1Mem _PCMCIAMem(1) /* PCMCIA 1 Memory */ |
79 | |
80 | |
81 | #define MCXX_SETUP_MASK (0x7f) |
82 | #define MCXX_ASST_MASK (0x1f) |
83 | #define MCXX_HOLD_MASK (0x3f) |
84 | #define MCXX_SETUP_SHIFT (0) |
85 | #define MCXX_ASST_SHIFT (7) |
86 | #define MCXX_HOLD_SHIFT (14) |
87 | |
88 | static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns, |
89 | u_int mem_clk_10khz) |
90 | { |
91 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; |
92 | return (code / 300000) + ((code % 300000) ? 1 : 0) - 1; |
93 | } |
94 | |
95 | static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns, |
96 | u_int mem_clk_10khz) |
97 | { |
98 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; |
99 | return (code / 300000) + ((code % 300000) ? 1 : 0) + 1; |
100 | } |
101 | |
102 | static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns, |
103 | u_int mem_clk_10khz) |
104 | { |
105 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; |
106 | return (code / 100000) + ((code % 100000) ? 1 : 0) - 1; |
107 | } |
108 | |
109 | /* This function returns the (approximate) command assertion period, in |
110 | * nanoseconds, for a given CPU clock frequency and MCXX_ASST value: |
111 | */ |
112 | static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, |
113 | u_int pcmcia_mcxx_asst) |
114 | { |
115 | return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz); |
116 | } |
117 | |
118 | static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) |
119 | { |
120 | MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock) |
121 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
122 | | ((pxa2xx_mcxx_asst(speed, clock) |
123 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
124 | | ((pxa2xx_mcxx_hold(speed, clock) |
125 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
126 | |
127 | return 0; |
128 | } |
129 | |
130 | static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) |
131 | { |
132 | MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock) |
133 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
134 | | ((pxa2xx_mcxx_asst(speed, clock) |
135 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
136 | | ((pxa2xx_mcxx_hold(speed, clock) |
137 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
138 | |
139 | return 0; |
140 | } |
141 | |
142 | static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) |
143 | { |
144 | MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock) |
145 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
146 | | ((pxa2xx_mcxx_asst(speed, clock) |
147 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
148 | | ((pxa2xx_mcxx_hold(speed, clock) |
149 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
150 | |
151 | return 0; |
152 | } |
153 | |
154 | static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) |
155 | { |
156 | struct soc_pcmcia_timing timing; |
157 | int sock = skt->nr; |
158 | |
159 | soc_common_pcmcia_get_timing(skt, &timing); |
160 | |
161 | pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); |
162 | pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); |
163 | pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); |
164 | |
165 | return 0; |
166 | } |
167 | |
168 | static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) |
169 | { |
170 | unsigned int clk = get_memclk_frequency_10khz(); |
171 | return pxa2xx_pcmcia_set_mcxx(skt, clk); |
172 | } |
173 | |
174 | #ifdef CONFIG_CPU_FREQ |
175 | |
176 | static int |
177 | pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, |
178 | unsigned long val, |
179 | struct cpufreq_freqs *freqs) |
180 | { |
181 | #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" |
182 | switch (val) { |
183 | case CPUFREQ_PRECHANGE: |
184 | if (freqs->new > freqs->old) { |
185 | debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, " |
186 | "pre-updating\n", |
187 | freqs->new / 1000, (freqs->new / 100) % 10, |
188 | freqs->old / 1000, (freqs->old / 100) % 10); |
189 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); |
190 | } |
191 | break; |
192 | |
193 | case CPUFREQ_POSTCHANGE: |
194 | if (freqs->new < freqs->old) { |
195 | debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, " |
196 | "post-updating\n", |
197 | freqs->new / 1000, (freqs->new / 100) % 10, |
198 | freqs->old / 1000, (freqs->old / 100) % 10); |
199 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); |
200 | } |
201 | break; |
202 | } |
203 | return 0; |
204 | } |
205 | #endif |
206 | |
207 | static void pxa2xx_configure_sockets(struct device *dev) |
208 | { |
209 | struct pcmcia_low_level *ops = dev->platform_data; |
210 | |
211 | /* |
212 | * We have at least one socket, so set MECR:CIT |
213 | * (Card Is There) |
214 | */ |
215 | MECR |= MECR_CIT; |
216 | |
217 | /* Set MECR:NOS (Number Of Sockets) */ |
218 | if ((ops->first + ops->nr) > 1 || |
219 | machine_is_viper() || machine_is_arcom_zeus()) |
220 | MECR |= MECR_NOS; |
221 | else |
222 | MECR &= ~MECR_NOS; |
223 | } |
224 | |
225 | static const char *skt_names[] = { |
226 | "PCMCIA socket 0", |
227 | "PCMCIA socket 1", |
228 | }; |
229 | |
230 | #define SKT_DEV_INFO_SIZE(n) \ |
231 | (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket)) |
232 | |
233 | int pxa2xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt) |
234 | { |
235 | skt->res_skt.start = _PCMCIA(skt->nr); |
236 | skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1; |
237 | skt->res_skt.name = skt_names[skt->nr]; |
238 | skt->res_skt.flags = IORESOURCE_MEM; |
239 | |
240 | skt->res_io.start = _PCMCIAIO(skt->nr); |
241 | skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1; |
242 | skt->res_io.name = "io"; |
243 | skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
244 | |
245 | skt->res_mem.start = _PCMCIAMem(skt->nr); |
246 | skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1; |
247 | skt->res_mem.name = "memory"; |
248 | skt->res_mem.flags = IORESOURCE_MEM; |
249 | |
250 | skt->res_attr.start = _PCMCIAAttr(skt->nr); |
251 | skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1; |
252 | skt->res_attr.name = "attribute"; |
253 | skt->res_attr.flags = IORESOURCE_MEM; |
254 | |
255 | return soc_pcmcia_add_one(skt); |
256 | } |
257 | EXPORT_SYMBOL(pxa2xx_drv_pcmcia_add_one); |
258 | |
259 | void pxa2xx_drv_pcmcia_ops(struct pcmcia_low_level *ops) |
260 | { |
261 | /* Provide our PXA2xx specific timing routines. */ |
262 | ops->set_timing = pxa2xx_pcmcia_set_timing; |
263 | #ifdef CONFIG_CPU_FREQ |
264 | ops->frequency_change = pxa2xx_pcmcia_frequency_change; |
265 | #endif |
266 | } |
267 | EXPORT_SYMBOL(pxa2xx_drv_pcmcia_ops); |
268 | |
269 | static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) |
270 | { |
271 | int i, ret = 0; |
272 | struct pcmcia_low_level *ops; |
273 | struct skt_dev_info *sinfo; |
274 | struct soc_pcmcia_socket *skt; |
275 | |
276 | ops = (struct pcmcia_low_level *)dev->dev.platform_data; |
277 | if (!ops) |
278 | return -ENODEV; |
279 | |
280 | pxa2xx_drv_pcmcia_ops(ops); |
281 | |
282 | sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL); |
283 | if (!sinfo) |
284 | return -ENOMEM; |
285 | |
286 | sinfo->nskt = ops->nr; |
287 | |
288 | /* Initialize processor specific parameters */ |
289 | for (i = 0; i < ops->nr; i++) { |
290 | skt = &sinfo->skt[i]; |
291 | |
292 | skt->nr = ops->first + i; |
293 | skt->ops = ops; |
294 | skt->socket.owner = ops->owner; |
295 | skt->socket.dev.parent = &dev->dev; |
296 | skt->socket.pci_irq = NO_IRQ; |
297 | |
298 | ret = pxa2xx_drv_pcmcia_add_one(skt); |
299 | if (ret) |
300 | break; |
301 | } |
302 | |
303 | if (ret) { |
304 | while (--i >= 0) |
305 | soc_pcmcia_remove_one(&sinfo->skt[i]); |
306 | kfree(sinfo); |
307 | } else { |
308 | pxa2xx_configure_sockets(&dev->dev); |
309 | dev_set_drvdata(&dev->dev, sinfo); |
310 | } |
311 | |
312 | return ret; |
313 | } |
314 | |
315 | static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev) |
316 | { |
317 | struct skt_dev_info *sinfo = platform_get_drvdata(dev); |
318 | int i; |
319 | |
320 | platform_set_drvdata(dev, NULL); |
321 | |
322 | for (i = 0; i < sinfo->nskt; i++) |
323 | soc_pcmcia_remove_one(&sinfo->skt[i]); |
324 | |
325 | kfree(sinfo); |
326 | return 0; |
327 | } |
328 | |
329 | static int pxa2xx_drv_pcmcia_resume(struct device *dev) |
330 | { |
331 | pxa2xx_configure_sockets(dev); |
332 | return 0; |
333 | } |
334 | |
335 | static const struct dev_pm_ops pxa2xx_drv_pcmcia_pm_ops = { |
336 | .resume = pxa2xx_drv_pcmcia_resume, |
337 | }; |
338 | |
339 | static struct platform_driver pxa2xx_pcmcia_driver = { |
340 | .probe = pxa2xx_drv_pcmcia_probe, |
341 | .remove = pxa2xx_drv_pcmcia_remove, |
342 | .driver = { |
343 | .name = "pxa2xx-pcmcia", |
344 | .owner = THIS_MODULE, |
345 | .pm = &pxa2xx_drv_pcmcia_pm_ops, |
346 | }, |
347 | }; |
348 | |
349 | static int __init pxa2xx_pcmcia_init(void) |
350 | { |
351 | return platform_driver_register(&pxa2xx_pcmcia_driver); |
352 | } |
353 | |
354 | static void __exit pxa2xx_pcmcia_exit(void) |
355 | { |
356 | platform_driver_unregister(&pxa2xx_pcmcia_driver); |
357 | } |
358 | |
359 | fs_initcall(pxa2xx_pcmcia_init); |
360 | module_exit(pxa2xx_pcmcia_exit); |
361 | |
362 | MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>"); |
363 | MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver"); |
364 | MODULE_LICENSE("GPL"); |
365 | MODULE_ALIAS("platform:pxa2xx-pcmcia"); |
366 |
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