Root/Examples/Beta1/logic/build/project_r.bgn

Source at commit 4618f6427e706eb336ed28c164f39fb1147204de created 13 years 4 months ago.
By Erwin Lopez, Yet another .bit fix
1Release 12.2 - Bitgen M.63c (lin64)
2Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
3Loading device for application Rf_Device from file '3s500e.nph' in environment
4/home/erwin/Xilinxs/12.2/ISE_DS/ISE/.
5   "beta" is an NCD, version 3.2, device xc3s500e, package vq100, speed -4
6
7Sun Oct 31 20:57:04 2010
8
9/home/erwin/Xilinxs/12.2/ISE_DS/ISE/bin/lin64/unwrapped/bitgen -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK project_r.ncd
10
11INFO:Bitgen:275 - Spartan-3E devices do not support bitstream readback of the
12   Blockram resources in the -4C speedgrade. If Blockram readback functionality
13   is desired, it is suggested to target the -5C or -4I speedgrades.
14Summary of Bitgen Options:
15+----------------------+----------------------+
16| Option Name | Current Setting |
17+----------------------+----------------------+
18| Compress | (Not Specified)* |
19+----------------------+----------------------+
20| Readback | (Not Specified)* |
21+----------------------+----------------------+
22| CRC | Enable** |
23+----------------------+----------------------+
24| DebugBitstream | No* |
25+----------------------+----------------------+
26| ConfigRate | 1* |
27+----------------------+----------------------+
28| StartupClk | Cclk** |
29+----------------------+----------------------+
30| DCMShutdown | Disable* |
31+----------------------+----------------------+
32| DonePin | Pullup** |
33+----------------------+----------------------+
34| ProgPin | Pullup* |
35+----------------------+----------------------+
36| TckPin | Pullup* |
37+----------------------+----------------------+
38| TdiPin | Pullup* |
39+----------------------+----------------------+
40| TdoPin | Pullnone |
41+----------------------+----------------------+
42| TmsPin | Pullup* |
43+----------------------+----------------------+
44| UnusedPin | Pulldown* |
45+----------------------+----------------------+
46| GWE_cycle | 6* |
47+----------------------+----------------------+
48| GTS_cycle | 5* |
49+----------------------+----------------------+
50| LCK_cycle | NoWait* |
51+----------------------+----------------------+
52| DONE_cycle | 4* |
53+----------------------+----------------------+
54| Persist | No* |
55+----------------------+----------------------+
56| DriveDone | No* |
57+----------------------+----------------------+
58| DonePipe | No* |
59+----------------------+----------------------+
60| Security | None* |
61+----------------------+----------------------+
62| UserID | 0xFFFFFFFF* |
63+----------------------+----------------------+
64| MultiBootMode | No* |
65+----------------------+----------------------+
66| ActivateGclk | No* |
67+----------------------+----------------------+
68| ActiveReconfig | No* |
69+----------------------+----------------------+
70| PartialMask0 | (Not Specified)* |
71+----------------------+----------------------+
72| PartialMask1 | (Not Specified)* |
73+----------------------+----------------------+
74| PartialMask2 | (Not Specified)* |
75+----------------------+----------------------+
76| PartialGclk | (Not Specified)* |
77+----------------------+----------------------+
78| PartialLeft | (Not Specified)* |
79+----------------------+----------------------+
80| PartialRight | (Not Specified)* |
81+----------------------+----------------------+
82| IEEE1532 | No* |
83+----------------------+----------------------+
84| Binary | No* |
85+----------------------+----------------------+
86 * Default setting.
87 ** The specified setting matches the default setting.
88
89No constraints file was processed.
90
91Running DRC.
92DRC detected 0 errors and 0 warnings.
93Saving ll file in "project_r.ll".
94Creating bit map...
95Saving bit stream in "project_r.bit".
96Bitstream generation is complete.
97

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