Robotics platform
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| 1 | DESIGN = beta |
| 2 | PINS = $(DESIGN).ucf |
| 3 | DEVICE = xc3s500e-VQ100-4 |
| 4 | BGFLAGS = -g TdoPin:PULLNONE -g DonePin:PULLUP \ |
| 5 | -g CRC:enable -g StartUpClk:CCLK |
| 6 | |
| 7 | SRC = $(DESIGN).v PuenteH.v PWM.v enco.v |
| 8 | |
| 9 | all: bits |
| 10 | |
| 11 | remake: clean-build all |
| 12 | |
| 13 | clean: |
| 14 | rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat |
| 15 | |
| 16 | clean-build: clean |
| 17 | rm -rf build |
| 18 | |
| 19 | cleanall: clean |
| 20 | rm -rf build $(DESIGN).bit |
| 21 | |
| 22 | bits: $(DESIGN).bit |
| 23 | |
| 24 | # |
| 25 | # Synthesis |
| 26 | # |
| 27 | build/project.src: |
| 28 | @[ -d build ] || mkdir build |
| 29 | @rm -f $@ |
| 30 | for i in $(SRC); do echo verilog work ../$$i >> $@; done |
| 31 | for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done |
| 32 | |
| 33 | build/project.xst: build/project.src |
| 34 | echo "run" > $@ |
| 35 | echo "-top $(DESIGN) " >> $@ |
| 36 | echo "-p $(DEVICE)" >> $@ |
| 37 | echo "-opt_mode Area" >> $@ |
| 38 | echo "-opt_level 1" >> $@ |
| 39 | echo "-ifn project.src" >> $@ |
| 40 | echo "-ifmt mixed" >> $@ |
| 41 | echo "-ofn project.ngc" >> $@ |
| 42 | echo "-ofmt NGC" >> $@ |
| 43 | echo "-rtlview yes" >> $@ |
| 44 | |
| 45 | build/project.ngc: build/project.xst $(SRC) |
| 46 | cd build && xst -ifn project.xst -ofn project.log |
| 47 | |
| 48 | build/project.ngd: build/project.ngc $(PINS) |
| 49 | cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS) |
| 50 | |
| 51 | build/project.ncd: build/project.ngd |
| 52 | cd build && map -pr b -p $(DEVICE) project |
| 53 | |
| 54 | build/project_r.ncd: build/project.ncd |
| 55 | cd build && par -w project project_r.ncd |
| 56 | |
| 57 | build/project_r.twr: build/project_r.ncd |
| 58 | cd build && trce -v 25 project_r.ncd project.pcf |
| 59 | |
| 60 | $(DESIGN).bit: build/project_r.ncd build/project_r.twr |
| 61 | cd build && bitgen project_r.ncd -l -w $(BGFLAGS) |
| 62 | @mv -f build/project_r.bit $@ |
| 63 |
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