Date:2012-07-25 21:39:31 (6 years 10 months ago)
Author:Werner Almesberger
Commit:2fc3b976d2148e6adca59392fab5e40e2bb3ea87
Message:fisl2012/: add kicad cvpcb diagram

Files: fisl2012/Makefile (2 diffs)
fisl2012/assoc.fig (1 diff)
fisl2012/cvpcb.xwd (0 diffs)
fisl2012/moded.xwd (0 diffs)
fisl2012/talk.tex (1 diff)

Change Details

fisl2012/Makefile
55# UBB_production_08.JPG ubb-vga-pub-plugged-medium.jpg \
66# ubb-vga-pub-1024-medium.jpg SIE_KICAD.png
77#GEN=schhist.png fped.png kicad.png achieve.pdf flow.pdf
8GEN=schem.pdf cat-comp.pdf cat-mod.pdf
8GEN=schem.pdf assoc.pdf cat-comp.pdf cat-mod.pdf
99#PNG=atusb-front.png
1010
1111.PHONY: spotless clean upload upload-es
...... 
2929comped.png: comped.xwd
3030        convert $< $@
3131
32cvpcb.png: cvpcb.xwd
33        convert $< $@
34
35moded.png: moded.xwd
36        convert $< $@
37
3238schem.pdf: schem.fig eeschema.png comped.png
3339        fig2dev -L pdf $< $@
3440
41assoc.pdf: assoc.fig cvpcb.png moded.png
42        fig2dev -L pdf $< $@
43
3544cat-comp.pdf: cat-comp.fig
3645        fig2dev -L pdf $< $@
3746
fisl2012/assoc.fig
1#FIG 3.2 Produced by xfig version 3.2.5b
2Landscape
3Center
4Metric
5A4
6100.00
7Single
8-2
91200 2
106 6465 165 8445 1365
112 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
12     6750 450 7425 450 7425 1350 6750 1350 6750 450
132 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
14     6750 1260 6660 1260 6660 360 7335 360 7335 450
152 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
16     6660 1170 6570 1170 6570 270 7245 270 7245 360
172 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
18     6570 1080 6480 1080 6480 180 7155 180 7155 270
194 0 0 50 -1 18 16 0.0000 4 210 795 7650 900 *.mod\001
20-6
216 2250 4275 3150 5625
222 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
23     2385 4290 3060 4290 3060 5190 2385 5190 2385 4290
244 1 0 50 -1 18 16 0.0000 4 210 855 2700 5595 Netlist\001
25-6
266 3600 4275 5175 5670
272 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
28     4072 4290 4747 4290 4747 5190 4072 5190 4072 4290
294 1 0 50 -1 18 16 0.0000 4 270 1515 4387 5595 Comp. Map\001
30-6
312 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 1 2
32    1 1 2.00 120.00 120.00
33    1 1 2.00 120.00 120.00
34     7335 1575 7875 2475
352 5 0 1 0 -1 50 -1 -1 0.000 0 0 -1 0 0 5
36    0 cvpcb.png
37     1800 675 5228 675 5228 2961 1800 2961 1800 675
382 5 0 1 0 -1 50 -1 -1 0.000 0 0 -1 0 0 5
39    0 moded.png
40     6975 2700 10403 2700 10403 4986 6975 4986 6975 2700
412 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 1 2
42    1 1 2.00 120.00 120.00
43    1 1 2.00 120.00 120.00
44     3118 3128 2848 4073
452 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
46    1 1 2.00 120.00 120.00
47     3933 3190 4158 4045
482 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
49    1 1 2.00 120.00 120.00
50     6217 1150 5520 1337
514 1 0 50 -1 18 16 0.0000 4 270 795 3555 450 cvpcb\001
524 1 0 50 -1 18 16 0.0000 4 210 1875 8640 5445 Module editor\001
fisl2012/cvpcb.xwd
fisl2012/moded.xwd
fisl2012/talk.tex
6161
6262\begin{frame}{KiCad: Footprints}
6363\begin{center}
64  \includegraphics[width=1.0\textwidth]{cat-comp.pdf}
64  \includegraphics[width=1.0\textwidth]{assoc.pdf}
6565\end{center}
6666\end{frame}
6767

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