Werner's Miscellanea
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Werner's Miscellanea Commit Details
Date: | 2012-07-26 17:34:54 (11 years 8 months ago) |
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Author: | Werner Almesberger |
Commit: | 4edc0da744b373fc56a21712e195ffef29f95e0a |
Message: | fisl2012/: add kicad layout diagram |
Files: |
fisl2012/Makefile (2 diffs) fisl2012/layout.fig (1 diff) fisl2012/pcbnew.xwd (0 diffs) fisl2012/talk.tex (3 diffs) |
Change Details
fisl2012/Makefile | ||
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5 | 5 | # UBB_production_08.JPG ubb-vga-pub-plugged-medium.jpg \ |
6 | 6 | # ubb-vga-pub-1024-medium.jpg SIE_KICAD.png |
7 | 7 | #GEN=schhist.png fped.png kicad.png achieve.pdf flow.pdf |
8 | GEN=schem.pdf assoc.pdf cat-comp.pdf cat-mod.pdf | |
8 | GEN=schem.pdf assoc.pdf layout.pdf cat-comp.pdf cat-mod.pdf | |
9 | 9 | #PNG=atusb-front.png |
10 | 10 | |
11 | 11 | .PHONY: spotless clean upload upload-es |
... | ... | |
35 | 35 | moded.png: moded.xwd |
36 | 36 | convert $< $@ |
37 | 37 | |
38 | pcbnew.png: pcbnew.xwd | |
39 | convert $< $@ | |
40 | ||
38 | 41 | schem.pdf: schem.fig eeschema.png comped.png |
39 | 42 | fig2dev -L pdf $< $@ |
40 | 43 | |
41 | 44 | assoc.pdf: assoc.fig cvpcb.png moded.png |
42 | 45 | fig2dev -L pdf $< $@ |
43 | 46 | |
47 | layout.pdf: layout.fig pcbnew.png | |
48 | fig2dev -L pdf $< $@ | |
49 | ||
44 | 50 | cat-comp.pdf: cat-comp.fig |
45 | 51 | fig2dev -L pdf $< $@ |
46 | 52 |
fisl2012/layout.fig | ||
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1 | #FIG 3.2 Produced by xfig version 3.2.5b | |
2 | Landscape | |
3 | Center | |
4 | Metric | |
5 | A4 | |
6 | 100.00 | |
7 | Single | |
8 | -2 | |
9 | 1200 2 | |
10 | 6 1080 855 3060 2055 | |
11 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
12 | 1365 1140 2040 1140 2040 2040 1365 2040 1365 1140 | |
13 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
14 | 1365 1950 1275 1950 1275 1050 1950 1050 1950 1140 | |
15 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
16 | 1275 1860 1185 1860 1185 960 1860 960 1860 1050 | |
17 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
18 | 1185 1770 1095 1770 1095 870 1770 870 1770 960 | |
19 | 4 0 0 50 -1 18 16 0.0000 4 210 795 2265 1590 *.mod\001 | |
20 | -6 | |
21 | 6 7965 4275 9315 5655 | |
22 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
23 | 8325 4290 9000 4290 9000 5190 8325 5190 8325 4290 | |
24 | 4 1 0 50 -1 18 16 0.0000 4 270 1350 8640 5595 Postscript\001 | |
25 | -6 | |
26 | 6 765 3375 1665 4725 | |
27 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
28 | 900 3390 1575 3390 1575 4290 900 4290 900 3390 | |
29 | 4 1 0 50 -1 18 16 0.0000 4 210 855 1215 4695 Netlist\001 | |
30 | -6 | |
31 | 6 6975 900 10935 4140 | |
32 | 6 7290 1125 8220 2445 | |
33 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
34 | 7440 1140 8115 1140 8115 2040 7440 2040 7440 1140 | |
35 | 4 1 0 50 -1 18 16 0.0000 4 210 930 7755 2445 Gerber\001 | |
36 | -6 | |
37 | 6 8325 1800 9450 3120 | |
38 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
39 | 8572 1815 9247 1815 9247 2715 8572 2715 8572 1815 | |
40 | 4 1 0 50 -1 18 16 0.0000 4 210 1125 8887 3120 Excellon\001 | |
41 | -6 | |
42 | 6 9360 2475 10605 3795 | |
43 | 2 2 0 2 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 | |
44 | 9667 2490 10342 2490 10342 3390 9667 3390 9667 2490 | |
45 | 4 1 0 50 -1 18 16 0.0000 4 210 1245 9982 3795 Positions\001 | |
46 | -6 | |
47 | 1 2 0 2 0 7 50 -1 -1 0.000 1 5.6723 8937 2522 2250 1215 6687 2522 11187 2522 | |
48 | -6 | |
49 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 | |
50 | 1 1 2.00 120.00 120.00 | |
51 | 6615 3375 7380 3105 | |
52 | 2 5 0 1 0 -1 50 -1 -1 0.000 0 0 -1 0 0 5 | |
53 | 0 pcbnew.png | |
54 | 2925 2655 6353 2655 6353 4941 2925 4941 2925 2655 | |
55 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 | |
56 | 1 1 2.00 120.00 120.00 | |
57 | 1800 3825 2700 3825 | |
58 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 | |
59 | 1 1 2.00 120.00 120.00 | |
60 | 6570 4275 8100 4590 | |
61 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 | |
62 | 1 1 2.00 120.00 120.00 | |
63 | 2205 2205 2745 2565 | |
64 | 4 1 0 50 -1 18 16 0.0000 4 270 1035 4590 5310 pcbnew\001 | |
65 | 4 1 0 50 -1 18 16 0.0000 4 210 1500 9945 1035 Fabrication\001 |
fisl2012/pcbnew.xwd |
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fisl2012/talk.tex | ||
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68 | 68 | % --- Layout ------------------------------------------------------------------ |
69 | 69 | |
70 | 70 | \begin{frame}{KiCad: Layout} |
71 | cvpcb + pcbnew + module editor -> gerbers (gerbv) | |
72 | ||
73 | SCREENSHOTS | |
71 | \begin{center} | |
72 | \includegraphics[width=1.0\textwidth]{layout.pdf} | |
73 | \end{center} | |
74 | 74 | \end{frame} |
75 | 75 | |
76 | 76 | % --- Qi-Hardware ------------------------------------------------------------- |
... | ... | |
457 | 457 | \item Better parsing |
458 | 458 | \end{itemize} |
459 | 459 | \item Snag: Digi-Key spider no longer works |
460 | \item Future: help with component selection | |
460 | \item Future: Help with component selection | |
461 | 461 | \end{itemize} |
462 | 462 | |
463 | 463 | % URL http://projects.qi-hardware.com/index.php/p/eda-tools/source/tree/master/b2/ |
... | ... | |
473 | 473 | % --- Schematics Design Rules ------------------------------------------------- |
474 | 474 | |
475 | 475 | \begin{frame}{Schematics Design Rules} |
476 | ... | |
476 | \begin{itemize} | |
477 | \item Value naming (4k7, 10 uF, $\ldots$) | |
478 | \item Junction style | |
479 | \item Text spacing | |
480 | \end{itemize} | |
477 | 481 | |
478 | 482 | {\small \url{en.qi-hardware.com/wiki/Rules_on_Editing_Schematics}} |
479 | 483 | \end{frame} |
Branches:
master