Date:2011-03-02 03:10:01 (9 years 8 months ago)
Author:Xiangfu Liu
Commit:aa59c6a7ec6c20dd46e816e06348c2fa27d6d9d0
Message:add JZ4760 EVB Lepus config file

Files: usbboot/doc/usbboot.cfg.lepus (1 diff)

Change Details

usbboot/doc/usbboot.cfg.lepus
1# [PLL]
2EXTCLK = 12 #Define the external crystal in MHz
3CPUSPEED = 240 #Define the PLL output frequency
4PHMDIV = 3 #Define the frequency divider ratio of PLL=CCLK:PCLK=HCLK=MCLK
5BOUDRATE = 115200 #Define the uart boudrate
6USEUART = 1 #Use which uart, 0/1 for jz4740,0/1/2/3 for jz4750
7
8# [SDRAM]
9BUSWIDTH = 32 #The bus width of the SDRAM in bits (16|32)
10BANKS = 4 #The bank number (2|4)
11ROWADDR = 12 #Row address width in bits (11-13)
12COLADDR = 9 #Column address width in bits (8-12)
13ISMOBILE = 1 #Define whether SDRAM is mobile SDRAM, this only valid for Jz4750 ,1:yes 0:no
14ISBUSSHARE = 0 #Define whether SDRAM bus share with NAND 1:shared 0:unshared
15# SDRAMTYPE = 2 #Define SDRAM Type 0:sdram 1:ddr1 2:ddr2 3:mobile ddr
16
17# [NAND]
18NAND_BUSWIDTH = 8 #The width of the NAND flash chip in bits (8|16|32)
19NAND_ROWCYCLES = 3 #The row address cycles (2|3)
20NAND_PAGESIZE = 4096 #The page size of the NAND chip in bytes(512|2048|4096)
21NAND_PAGEPERBLOCK = 128 #The page number per block
22NAND_FORCEERASE = 1 #The force to erase flag (0|1)
23NAND_OOBSIZE = 128 #oob size in byte
24NAND_ECCPOS = 24 #Specify the ECC offset inside the oob data (0-[oobsize-1])
25NAND_BADBLACKPOS = 0 #Specify the badblock flag offset inside the oob (0-[oobsize-1])
26NAND_BADBLACKPAGE = 0 #Specify the page number of badblock flag inside a block(0-[PAGEPERBLOCK-1])
27NAND_PLANENUM = 1 #The planes number of target nand flash
28NAND_BCHBIT = 8 #Specify the hardware BCH algorithm for 4750 (4|8)
29NAND_WPPIN = 0 #Specify the write protect pin number
30NAND_BLOCKPERCHIP = 0 #Specify the block number per chip,0 means ignore

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