Root/nandboot/src/jz_serial.c

1/*
2 * Jz47xx UART support
3 *
4 * Options hardcoded to 8N1
5 *
6 * Copyright (c) 2005 - 2008, Ingenic Semiconductor Inc.
7 * Ingenic Semiconductor, <jlwei@ingenic.cn>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <config.h>
26
27#ifdef CONFIG_JZ4730
28#include <jz4730.h>
29#include <jz4730_board.h>
30#endif
31#ifdef CONFIG_JZ4740
32#include <jz4740.h>
33#include <jz4740_board.h>
34#endif
35
36#undef UART_BASE
37#ifndef CFG_UART_BASE
38#define UART_BASE UART0_BASE
39#else
40#define UART_BASE CFG_UART_BASE
41#endif
42
43/******************************************************************************
44*
45* serial_init - initialize a channel
46*
47* This routine initializes the number of data bits, parity
48* and set the selected baud rate. Interrupts are disabled.
49* Set the modem control signals if the option is selected.
50*
51* RETURNS: N/A
52*/
53
54static void serial_setbrg (void)
55{
56    volatile u8 *uart_lcr = (volatile u8 *)(UART_BASE + OFF_LCR);
57    volatile u8 *uart_dlhr = (volatile u8 *)(UART_BASE + OFF_DLHR);
58    volatile u8 *uart_dllr = (volatile u8 *)(UART_BASE + OFF_DLLR);
59    u32 baud_div, tmp;
60
61    baud_div = CFG_EXTAL / 16 / CONFIG_BAUDRATE;
62    tmp = *uart_lcr;
63    tmp |= UART_LCR_DLAB;
64    *uart_lcr = tmp;
65
66    *uart_dlhr = (baud_div >> 8) & 0xff;
67    *uart_dllr = baud_div & 0xff;
68
69    tmp &= ~UART_LCR_DLAB;
70    *uart_lcr = tmp;
71}
72
73int serial_init (void)
74{
75    volatile u8 *uart_fcr = (volatile u8 *)(UART_BASE + OFF_FCR);
76    volatile u8 *uart_lcr = (volatile u8 *)(UART_BASE + OFF_LCR);
77    volatile u8 *uart_ier = (volatile u8 *)(UART_BASE + OFF_IER);
78    volatile u8 *uart_sircr = (volatile u8 *)(UART_BASE + OFF_SIRCR);
79
80    /* Disable port interrupts while changing hardware */
81    *uart_ier = 0;
82
83    /* Disable UART unit function */
84    *uart_fcr = ~UART_FCR_UUE;
85
86    /* Set both receiver and transmitter in UART mode (not SIR) */
87    *uart_sircr = ~(SIRCR_RSIRE | SIRCR_TSIRE);
88
89    /* Set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
90    *uart_lcr = UART_LCR_WLEN_8 | UART_LCR_STOP_1;
91    
92    /* Set baud rate */
93    serial_setbrg();
94    
95    /* Enable UART unit, enable and clear FIFO */
96    *uart_fcr = UART_FCR_UUE | UART_FCR_FE | UART_FCR_TFLS | UART_FCR_RFLS;
97
98    return 0;
99}
100
101void serial_putc (const char c)
102{
103    volatile u8 *uart_lsr = (volatile u8 *)(UART_BASE + OFF_LSR);
104    volatile u8 *uart_tdr = (volatile u8 *)(UART_BASE + OFF_TDR);
105
106    if (c == '\n') serial_putc ('\r');
107
108    /* Wait for fifo to shift out some bytes */
109    while ( !((*uart_lsr & (UART_LSR_TDRQ | UART_LSR_TEMT)) == 0x60) );
110
111    *uart_tdr = (u8)c;
112}
113
114void serial_puts (const char *s)
115{
116    while (*s) {
117        serial_putc (*s++);
118    }
119}
120

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