Root/qiboot/include/glamo-mmc.h

1#ifndef __GLAMO_MMC_H__
2#define __GLAMO_MMC_H__
3
4/* Standard MMC commands (4.1) type argument response */
5   /* class 1 */
6#define MMC_GO_IDLE_STATE 0 /* bc */
7#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
8#define MMC_ALL_SEND_CID 2 /* bcr R2 */
9#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
10#define MMC_SET_DSR 4 /* bc [31:16] RCA */
11#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
12#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
13#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
14#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
15#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
16#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
17#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
18#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
19#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
20#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
21#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
22
23#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
24#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
25
26  /* class 2 */
27#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
28#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
29#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
30
31  /* class 3 */
32#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
33
34  /* class 4 */
35#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
36#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
37#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
38#define MMC_PROGRAM_CID 26 /* adtc R1 */
39#define MMC_PROGRAM_CSD 27 /* adtc R1 */
40
41  /* class 6 */
42#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
43#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
44#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
45
46  /* class 5 */
47#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
48#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
49#define MMC_ERASE 38 /* ac R1b */
50
51  /* class 9 */
52#define MMC_FAST_IO 39 /* ac <Complex> R4 */
53#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
54
55  /* class 7 */
56#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
57
58  /* class 8 */
59#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
60#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
61
62#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
63#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
64#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
65#define SD_APP_SEND_SCR 51 /* adtc R1 */
66
67
68#define MMC_RSP_PRESENT (1 << 0)
69#define MMC_RSP_136 (1 << 1) /* 136 bit response */
70#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
71#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
72#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
73
74#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
75#define MMC_CMD_AC (0 << 5)
76#define MMC_CMD_ADTC (1 << 5)
77#define MMC_CMD_BC (2 << 5)
78#define MMC_CMD_BCR (3 << 5)
79
80#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
81#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
82#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
83#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
84
85/*
86 * These are the native response types, and correspond to valid bit
87 * patterns of the above flags. One additional valid pattern
88 * is all zeros, which means we don't expect a response.
89 */
90#define MMC_RSP_NONE (0)
91#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
92#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
93#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
94#define MMC_RSP_R3 (MMC_RSP_PRESENT)
95#define MMC_RSP_R4 (MMC_RSP_PRESENT)
96#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
97#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
98#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
99
100#define mmc_resp_type(f) ((f) & (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC |\
101                 MMC_RSP_BUSY | MMC_RSP_OPCODE))
102#define mmc_cmd_type(f) ((f) & MMC_CMD_MASK)
103
104/*
105 * These are the SPI response types for MMC, SD, and SDIO cards.
106 * Commands return R1, with maybe more info. Zero is an error type;
107 * callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
108 */
109#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
110#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
111#define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
112#define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
113#define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
114#define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
115#define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
116
117#define MMC_DATA_WRITE (1 << 8)
118#define MMC_DATA_READ (1 << 9)
119#define MMC_DATA_STREAM (1 << 10)
120
121struct sd_cid {
122    char pnm_0; /* product name */
123    char oid_1; /* OEM/application ID */
124    char oid_0;
125    u8 mid; /* manufacturer ID */
126    char pnm_4;
127    char pnm_3;
128    char pnm_2;
129    char pnm_1;
130    u8 psn_2; /* product serial number */
131    u8 psn_1;
132    u8 psn_0; /* MSB */
133    u8 prv; /* product revision */
134    u8 crc; /* CRC7 checksum, b0 is unused and set to 1 */
135    u8 mdt_1; /* manufacturing date, LSB, RRRRyyyy yyyymmmm */
136    u8 mdt_0; /* MSB */
137    u8 psn_3; /* LSB */
138};
139
140enum card_type {
141    CARDTYPE_NONE = 0,
142    CARDTYPE_MMC,
143    CARDTYPE_SD,
144    CARDTYPE_SD20,
145    CARDTYPE_SDHC
146};
147
148
149#endif /* __GLAMO_MMC_H__ */
150

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