| 1 | #include <qi.h> |
| 2 | #include <neo_om_3d7k.h> |
| 3 | #include <s3c6410.h> |
| 4 | #include <serial-s3c64xx.h> |
| 5 | #include <i2c-bitbang-s3c6410.h> |
| 6 | #include <pcf50633.h> |
| 7 | |
| 8 | #define PCF50633_I2C_ADS 0x73 |
| 9 | |
| 10 | const struct pcf50633_init om_3d7k_pcf50633_init[] = { |
| 11 | |
| 12 | { PCF50633_REG_OOCWAKE, 0xd3 }, /* wake from ONKEY,EXTON!,RTC,USB,ADP */ |
| 13 | { PCF50633_REG_OOCTIM1, 0xaa }, /* debounce 14ms everything */ |
| 14 | { PCF50633_REG_OOCTIM2, 0x4a }, |
| 15 | { PCF50633_REG_OOCMODE, 0x55 }, |
| 16 | { PCF50633_REG_OOCCTL, 0x47 }, |
| 17 | |
| 18 | { PCF50633_REG_SVMCTL, 0x08 }, /* 3.10V SYS voltage thresh. */ |
| 19 | { PCF50633_REG_BVMCTL, 0x02 }, /* 2.80V BAT voltage thresh. */ |
| 20 | |
| 21 | { PCF50633_REG_AUTOENA, 0x01 }, /* always on */ |
| 22 | |
| 23 | { PCF50633_REG_DOWN1OUT, 0x17 }, /* 1.2V (0x17 * .025V + 0.625V) */ |
| 24 | |
| 25 | /* all of these are down in 3d7k suspend except MEMLDO */ |
| 26 | |
| 27 | { PCF50633_REG_DOWN1ENA, 0x02 }, /* enabled if GPIO1 = HIGH */ |
| 28 | { PCF50633_REG_DOWN2ENA, 0x02 }, /* enabled if GPIO1 = HIGH */ |
| 29 | { PCF50633_REG_HCLDOENA, 0x00 }, /* Camera 2.8V power off */ |
| 30 | { PCF50633_REG_MEMLDOENA, 0x01 }, /* Memory LDO always ON */ |
| 31 | { PCF50633_REG_LDO1ENA, 0x00 }, /* Gsensor power off */ |
| 32 | { PCF50633_REG_LDO2ENA, 0x00 }, /* Camera 1.5V power off */ |
| 33 | { PCF50633_REG_LDO3ENA, 0x02 }, /* Codec power ON */ |
| 34 | { PCF50633_REG_LDO4ENA, 0x02 }, /* SD power ON */ |
| 35 | { PCF50633_REG_LDO5ENA, 0x00 }, /* BT power off */ |
| 36 | { PCF50633_REG_LDO6ENA, 0x00 }, /* LCM power off */ |
| 37 | |
| 38 | { PCF50633_REG_INT1M, 0x00 }, |
| 39 | { PCF50633_REG_INT2M, 0x00 }, |
| 40 | { PCF50633_REG_INT3M, 0x00 }, |
| 41 | { PCF50633_REG_INT4M, 0x00 }, |
| 42 | { PCF50633_REG_INT5M, 0x00 }, |
| 43 | |
| 44 | { PCF50633_REG_MBCC2, 0x28 }, /* Vbatconid=2.7V, Vmax=4.20V */ |
| 45 | { PCF50633_REG_MBCC3, 0x19 }, /* 25/255 == 98mA pre-charge */ |
| 46 | { PCF50633_REG_MBCC4, 0xff }, /* 255/255 == 1A adapter fast */ |
| 47 | { PCF50633_REG_MBCC5, 0xff }, /* 255/255 == 1A USB fast */ |
| 48 | |
| 49 | { PCF50633_REG_MBCC6, 0x00 }, /* cutoff current 1/32 * Ichg */ |
| 50 | |
| 51 | /* current prototype is pulling > 100mA at startup */ |
| 52 | { PCF50633_REG_MBCC7, 0xc1 }, /* 2.2A max bat curr, USB 500mA */ |
| 53 | |
| 54 | { PCF50633_REG_MBCC8, 0x00 }, |
| 55 | { PCF50633_REG_MBCC1, 0xff }, /* chgena */ |
| 56 | |
| 57 | { PCF50633_REG_BBCCTL, 0x19 }, /* 3V, 200uA, on */ |
| 58 | { PCF50633_REG_OOCSHDWN, 0x04 }, /* defeat 8s death from lowsys on A5 */ |
| 59 | |
| 60 | }; |
| 61 | |
| 62 | static const struct board_variant board_variants[] = { |
| 63 | [0] = { |
| 64 | .name = "OM 3D7K unknown", |
| 65 | .machine_revision = 0 |
| 66 | }, |
| 67 | [1] = { |
| 68 | .name = "OM 3D7K A1", |
| 69 | .machine_revision = 1 |
| 70 | }, |
| 71 | [2] = { |
| 72 | .name = "OM 3D7K A2", |
| 73 | .machine_revision = 2 |
| 74 | }, |
| 75 | [3] = { |
| 76 | .name = "OM 3D7K A3", |
| 77 | .machine_revision = 3 |
| 78 | }, |
| 79 | [4] = { |
| 80 | .name = "OM 3D7K A4", |
| 81 | .machine_revision = 4 |
| 82 | }, |
| 83 | [5] = { |
| 84 | .name = "OM 3D7K A5", |
| 85 | .machine_revision = 5 |
| 86 | }, |
| 87 | [6] = { |
| 88 | .name = "OM 3D7K A6", |
| 89 | .machine_revision = 6 |
| 90 | }, |
| 91 | [7] = { |
| 92 | .name = "OM 3D7K A7", |
| 93 | .machine_revision = 7 |
| 94 | } |
| 95 | }; |
| 96 | |
| 97 | #define S0 0 |
| 98 | #define S1 1 |
| 99 | #define SIN 2 |
| 100 | #define SHOLD 3 |
| 101 | |
| 102 | #define SNP 0 |
| 103 | #define SPD 1 |
| 104 | #define SPU 2 |
| 105 | |
| 106 | void port_init_om_3d7k(void) |
| 107 | { |
| 108 | int n; |
| 109 | |
| 110 | /* |
| 111 | * We leave iROM up for clock and power otherwise resume fails |
| 112 | */ |
| 113 | |
| 114 | __REG(EINT_MASK) = |
| 115 | (0 << 4) /* PMU interrupt */ |
| 116 | ; |
| 117 | |
| 118 | __REG(PWR_CFG) = |
| 119 | (1 << 17) | /* kill OSCotg clock pad */ |
| 120 | (0 << 0) /* 27MHz osc off */ |
| 121 | ; |
| 122 | |
| 123 | __REG(STOP_MEM_CFG) = |
| 124 | (0 << 6) | /* modem */ |
| 125 | (0 << 5) | /* host IF */ |
| 126 | (1 << 4) | /* OTG */ |
| 127 | (1 << 3) | /* HSMMC */ |
| 128 | (1 << 2) | /* iROM */ |
| 129 | (0 << 1) | /* IRDA */ |
| 130 | (1 << 0) /* NFCON / steppingstone */ |
| 131 | ; |
| 132 | |
| 133 | __REG(NOR_CFG) = |
| 134 | (1 << 31) | /* reserved */ |
| 135 | (1 << 30) | /* iROM */ |
| 136 | (0x1fff << 17) | /* reserved */ |
| 137 | (1 << 16) | /* ETM domain */ |
| 138 | (1 << 15) | /* S domain */ |
| 139 | (1 << 14) | /* F domain / LCD */ |
| 140 | (0 << 13) | /* P domain / 2D, scaler, TV encoder */ |
| 141 | (0 << 12) | /* I domain / JPEG / Camera */ |
| 142 | (1 << 11) | /* reserved */ |
| 143 | (0 << 10) | /* G domain / 3D */ |
| 144 | (0 << 9) | /* V domain / MFC */ |
| 145 | (1 << 8) | /* reserved */ |
| 146 | (0x00 << 0) /* reserved */ |
| 147 | ; |
| 148 | |
| 149 | |
| 150 | __REG(HCLK_GATE) = |
| 151 | (0 << 31) | /* 3D unit */ |
| 152 | (1 << 30) | /* reserved */ |
| 153 | (0 << 29) | /* USB host */ |
| 154 | (0 << 28) | /* "security subsystem" */ |
| 155 | (0 << 27) | /* SDMA1 */ |
| 156 | (0 << 26) | /* SDMA0 */ |
| 157 | (1 << 25) | /* iROM */ |
| 158 | (1 << 24) | /* DDR 1 */ |
| 159 | (1 << 23) | /* reserved */ |
| 160 | (1 << 22) | /* DMC1 */ |
| 161 | (1 << 21) | /* SROM / NAND controller / NAND */ |
| 162 | (0 << 20) | /* USB OTG */ |
| 163 | (0 << 19) | /* HSMMC 2 */ |
| 164 | (0 << 18) | /* HSMMC 1 */ |
| 165 | (1 << 17) | /* HSMMC 0 */ |
| 166 | (0 << 16) | /* MDP */ |
| 167 | (0 << 15) | /* direct host */ |
| 168 | (0 << 14) | /* indirect host */ |
| 169 | (1 << 13) | /* DMA1 */ |
| 170 | (1 << 12) | /* DMA0 */ |
| 171 | (0 << 11) | /* JPEG */ |
| 172 | (0 << 10) | /* camera */ |
| 173 | (0 << 9) | /* scaler */ |
| 174 | (0 << 8) | /* 2D */ |
| 175 | (0 << 7) | /* TV */ |
| 176 | (1 << 6) | /* reserved */ |
| 177 | (1 << 5) | /* POST0 */ |
| 178 | (1 << 4) | /* rotator */ |
| 179 | (1 << 3) | /* LCD controller */ |
| 180 | (1 << 2) | /* TZICs */ |
| 181 | (1 << 1) | /* VICs */ |
| 182 | (0 << 0) /* MFC */ |
| 183 | ; |
| 184 | __REG(PCLK_GATE) = |
| 185 | (0x1f << 28) | /* reserved */ |
| 186 | (0 << 27) | /* I2C1 */ |
| 187 | (0 << 26) | /* IIS2 */ |
| 188 | (1 << 25) | /* reserved */ |
| 189 | (0 << 24) | /* security key */ |
| 190 | (1 << 23) | /* chip ID */ |
| 191 | (0 << 22) | /* SPI1 */ |
| 192 | (0 << 21) | /* SPI0 */ |
| 193 | (0 << 20) | /* HSI RX */ |
| 194 | (0 << 19) | /* HSI TX */ |
| 195 | (1 << 18) | /* GPIO */ |
| 196 | (1 << 17) | /* I2C 0 */ |
| 197 | (1 << 16) | /* IIS1 */ |
| 198 | (1 << 15) | /* IIS0 */ |
| 199 | (0 << 14) | /* AC97 */ |
| 200 | (0 << 13) | /* TZPC */ |
| 201 | (0 << 12) | /* TS ADC */ |
| 202 | (0 << 11) | /* keypad */ |
| 203 | (0 << 10) | /* IRDA */ |
| 204 | (0 << 9) | /* PCM1 */ |
| 205 | (0 << 8) | /* PCM0 */ |
| 206 | (1 << 7) | /* PWM */ |
| 207 | (0 << 6) | /* RTC */ |
| 208 | (1 << 5) | /* WDC */ |
| 209 | (1 << 4) | /* UART3 */ |
| 210 | (1 << 3) | /* UART2 */ |
| 211 | (1 << 2) | /* UART1 */ |
| 212 | (1 << 1) | /* UART0 */ |
| 213 | (0 << 0) /* MFC */ |
| 214 | ; |
| 215 | |
| 216 | __REG(SCLK_GATE) = |
| 217 | (1 << 31) | |
| 218 | (0 << 30) | /* USB Host */ |
| 219 | (0 << 29) | /* HSMMC2 48MHz */ |
| 220 | (0 << 28) | /* HSMMC1 48MHz */ |
| 221 | (0 << 27) | /* HSMMC0 48MHz */ |
| 222 | (0 << 26) | /* HSMMC2 */ |
| 223 | (0 << 25) | /* HSMMC1 */ |
| 224 | (1 << 24) | /* HSMMC0 */ |
| 225 | (0 << 23) | /* SPI1 - 48MHz */ |
| 226 | (0 << 22) | /* SPI0 - 48MHz */ |
| 227 | (0 << 21) | /* SPI1 */ |
| 228 | (0 << 20) | /* SPI0 */ |
| 229 | (0 << 19) | /* TV DAC */ |
| 230 | (0 << 18) | /* TV encoder */ |
| 231 | (0 << 17) | /* scaler 27 */ |
| 232 | (0 << 16) | /* scaler */ |
| 233 | (1 << 15) | /* LCD 27MHz */ |
| 234 | (1 << 14) | /* LCD */ |
| 235 | (1 << 13) | /* camera and LCD */ |
| 236 | (1 << 12) | /* POST0 */ |
| 237 | (1 << 11) | /* AUDIO2 */ |
| 238 | (1 << 10) | /* POST0 again */ |
| 239 | (1 << 9) | /* IIS1 */ |
| 240 | (1 << 8) | /* IIS0 */ |
| 241 | (0 << 7) | /* security */ |
| 242 | (0 << 6) | /* IRDA */ |
| 243 | (1 << 5) | /* UART */ |
| 244 | (1 << 4) | /* reserved */ |
| 245 | (0 << 3) | /* MFC */ |
| 246 | (0 << 2) | /* Cam */ |
| 247 | (0 << 1) | /* JPEG */ |
| 248 | (1 << 0) /* reserved */ |
| 249 | ; |
| 250 | |
| 251 | |
| 252 | /* ---------------------------- Port A ---------------------------- */ |
| 253 | |
| 254 | __REG(GPACON) = |
| 255 | (2 << 0) | /* GPA0 - UART_RXD0 */ |
| 256 | (2 << 4) | /* GPA1 - UART_TXD0 */ |
| 257 | (2 << 8) | /* GPA2 - UART_CTS0 */ |
| 258 | (2 << 12) | /* GPA3 - UART_RTS0 */ |
| 259 | (2 << 16) | /* GPA4 - UART_RXD1 */ |
| 260 | (2 << 20) | /* GPA5 - UART_TXD1 */ |
| 261 | (2 << 24) | /* GPA6 - UART_CTS1 */ |
| 262 | (2 << 28) /* GPA7 - UART_RTS1 */ |
| 263 | ; |
| 264 | |
| 265 | __REG(GPAPUD) = /* pullup inputs */ |
| 266 | 0x2222 |
| 267 | ; |
| 268 | __REG(GPADAT) = 0; /* just for determinism */ |
| 269 | |
| 270 | __REG(GPACONSLP) = |
| 271 | (SIN << 0) | /* GPA0 bluetooth down in suspend*/ |
| 272 | (S0 << 2) | /* GPA1 */ |
| 273 | (SIN << 4) | /* GPA2 */ |
| 274 | (S0 << 6) | /* GPA3 */ |
| 275 | (SIN << 8) | /* GPA4 gsm */ |
| 276 | (SHOLD << 10) | /* GPA5 */ |
| 277 | (SIN << 12) | /* GPA6 */ |
| 278 | (SHOLD << 14) /* GPA7 */ |
| 279 | ; |
| 280 | __REG(GPAPUDSLP) = |
| 281 | (SPD << 0) | /* GPA0 */ |
| 282 | (SNP << 2) | /* GPA1 */ |
| 283 | (SPD << 4) | /* GPA2 */ |
| 284 | (SNP << 6) | /* GPA3 */ |
| 285 | (SPU << 8) | /* GPA4 */ |
| 286 | (SNP << 10) | /* GPA5 */ |
| 287 | (SPU << 12) | /* GPA6 */ |
| 288 | (SNP << 14) /* GPA7 */ |
| 289 | ; |
| 290 | |
| 291 | /* ---------------------------- Port B ---------------------------- */ |
| 292 | |
| 293 | __REG(GPBCON) = |
| 294 | (1 << 0) | /* GPB0 - (NC) output low */ |
| 295 | (1 << 4) | /* GPB1 - (NC) output low */ |
| 296 | (2 << 8) | /* GPB2 - UART_RXD3 */ |
| 297 | (2 << 12) | /* GPB3 - UART_TXD3 */ |
| 298 | (1 << 16) | /* GPB4 - (NC) output low */ |
| 299 | (1 << 20) | /* GPB5 - (I2C BB SCL) OUTPUT */ |
| 300 | (1 << 24) /* GPB6 - (I2C BB SDA) OUTPUT */ |
| 301 | ; |
| 302 | |
| 303 | __REG(GPBPUD) = /* all pullup and pulldown disabled */ |
| 304 | (SPU << (2 * 2)) /* pullup console rx */ |
| 305 | ; |
| 306 | |
| 307 | __REG(GPBDAT) = 0; /* just for determinism */ |
| 308 | |
| 309 | __REG(GPBCONSLP) = |
| 310 | (SHOLD << 0) | /* GPB0 */ |
| 311 | (SHOLD << 2) | /* GPB1 */ |
| 312 | (SIN << 4) | /* GPB2 */ |
| 313 | (SHOLD << 6) | /* GPB3 */ |
| 314 | (SHOLD << 8) | /* GPB4 */ |
| 315 | (SIN << 10) | /* GPB5 ext pullup */ |
| 316 | (SIN << 12) /* GPB6 ext pullup */ |
| 317 | ; |
| 318 | |
| 319 | __REG(GPBPUDSLP) = |
| 320 | (SNP << 0) | /* GPB0 */ |
| 321 | (SNP << 2) | /* GPB1 */ |
| 322 | (SPU << 4) | /* GPB2 */ |
| 323 | (SNP << 6) | /* GPB3 */ |
| 324 | (SNP << 8) | /* GPB4 */ |
| 325 | (SNP << 10) | /* GPB5 */ |
| 326 | (SNP << 12) /* GPB6 */ |
| 327 | ; |
| 328 | |
| 329 | /* ---------------------------- Port C ---------------------------- */ |
| 330 | |
| 331 | __REG(GPCCON) = |
| 332 | (0 << 0) | /* GPC0 - SPI_MISO0 INPUT motion sensor spi */ |
| 333 | (1 << 4) | /* GPC1 - SPI_CLK0 OUTPUT */ |
| 334 | (1 << 8) | /* GPC2 - SPI_MOSI0 OUTPUT */ |
| 335 | (1 << 12) | /* GPC3 - SPI_CS0 OUTPUT */ |
| 336 | (1 << 16) | /* GPC4 - (NC) OUTPUT lcm spi*/ |
| 337 | (1 << 20) | /* GPC5 - SPI_CLK1 OUTPUT */ |
| 338 | (1 << 24) | /* GPC6 - SPI_MOSI1 OUTPUT */ |
| 339 | (1 << 28) /* GPC7 - SPI_CS1 OUTPUT */ |
| 340 | ; |
| 341 | |
| 342 | __REG(GPCPUD) = |
| 343 | (SPD << 0) |
| 344 | ; |
| 345 | __REG(GPCDAT) = 0; /* just for determinism */ |
| 346 | |
| 347 | __REG(GPCCONSLP) = /* both peripherals down in suspend */ |
| 348 | (SIN << 0) | /* GPC0 */ |
| 349 | (S0 << 2) | /* GPC1 */ |
| 350 | (S0 << 4) | /* GPC2 */ |
| 351 | (S0 << 6) | /* GPC3 */ |
| 352 | (SIN << 8) | /* GPC4 */ |
| 353 | (S0 << 10) | /* GPC5 */ |
| 354 | (S0 << 12) | /* GPC6 */ |
| 355 | (S0 << 14) /* GPC7 */ |
| 356 | ; |
| 357 | |
| 358 | __REG(GPCPUDSLP) = |
| 359 | (SPD << 0) | /* GPC0 */ |
| 360 | (SNP << 2) | /* GPC1 */ |
| 361 | (SNP << 4) | /* GPC2 */ |
| 362 | (SNP << 6) | /* GPC3 */ |
| 363 | (SPD << 8) | /* GPC4 */ |
| 364 | (SNP << 10) | /* GPC5 */ |
| 365 | (SNP << 12) | /* GPC6 */ |
| 366 | (SNP << 14) /* GPC7 */ |
| 367 | ; |
| 368 | |
| 369 | /* ---------------------------- Port D ---------------------------- */ |
| 370 | |
| 371 | __REG(GPDCON) = |
| 372 | (3 << 0) | /* GPD0 - I2S_CLK0 */ |
| 373 | (3 << 4) | /* GPD1 - I2S_CDCLK0 */ |
| 374 | (3 << 8) | /* GPD2 - I2S_LRCLK0 */ |
| 375 | (3 << 12) | /* GPD3 - I2S_DI */ |
| 376 | (3 << 16) /* GPD4 - I2S_DO */ |
| 377 | ; |
| 378 | |
| 379 | __REG(GPDPUD) = 0; /* all pullup and pulldown disabled */ |
| 380 | |
| 381 | __REG(GPDDAT) = 0; /* just for determinism */ |
| 382 | |
| 383 | __REG(GPDCONSLP) = |
| 384 | (S0 << 0) | /* GPD0 */ |
| 385 | (S0 << 2) | /* GPD1 */ |
| 386 | (S0 << 4) | /* GPD2 */ |
| 387 | (SIN << 6) | /* GPD3 */ |
| 388 | (S0 << 8) /* GPD4 */ |
| 389 | ; |
| 390 | |
| 391 | __REG(GPDPUDSLP) = |
| 392 | (SNP << 0) | /* GPD0 */ |
| 393 | (SNP << 2) | /* GPD1 */ |
| 394 | (SNP << 4) | /* GPD2 */ |
| 395 | (SPD << 6) | /* GPD3 */ |
| 396 | (SNP << 8) /* GPD4 */ |
| 397 | ; |
| 398 | |
| 399 | /* ---------------------------- Port E ---------------------------- */ |
| 400 | |
| 401 | __REG(GPECON) = |
| 402 | (3 << 0) | /* GPE0 - PCM_SCLK1 */ |
| 403 | (3 << 4) | /* GPE1 - PCM_EXTCLK1 */ |
| 404 | (3 << 8) | /* GPE2 - PCM_FSYNC1 */ |
| 405 | (3 << 12) | /* GPE3 - PCM_SIN */ |
| 406 | (3 << 16) /* GPE4 - PCM_SOUT */ |
| 407 | ; |
| 408 | |
| 409 | __REG(GPEPUD) = 0; /* all pullup and pulldown disabled */ |
| 410 | |
| 411 | __REG(GPEDAT) = 0; /* just for determinism */ |
| 412 | |
| 413 | __REG(GPECONSLP) = |
| 414 | (S0 << 0) | /* GPE0 */ |
| 415 | (S0 << 2) | /* GPE1 */ |
| 416 | (S0 << 4) | /* GPE2 */ |
| 417 | (SIN << 6) | /* GPE3 */ |
| 418 | (S0 << 8) /* GPE4 */ |
| 419 | ; |
| 420 | |
| 421 | __REG(GPEPUDSLP) = |
| 422 | (SNP << 0) | /* GPE0 */ |
| 423 | (SNP << 2) | /* GPE1 */ |
| 424 | (SNP << 4) | /* GPE2 */ |
| 425 | (SPD << 6) | /* GPE3 */ |
| 426 | (SNP << 8) /* GPE4 */ |
| 427 | ; |
| 428 | |
| 429 | /* ---------------------------- Port F ---------------------------- */ |
| 430 | |
| 431 | __REG(GPFCON) = |
| 432 | (2 << 0) | /* GPF0 - CAMIF_CLK */ |
| 433 | (2 << 2) | /* GPF1 - CAMIF_HREF */ |
| 434 | (2 << 4) | /* GPF2 - CAMIF_PCLK */ |
| 435 | (2 << 6) | /* GPF3 - CAMIF_RSTn */ |
| 436 | (2 << 8) | /* GPF4 - CAMIF_VSYNC */ |
| 437 | (2 << 10) | /* GPF5 - CAMIF_YDATA0 */ |
| 438 | (2 << 12) | /* GPF6 - CAMIF_YDATA1 */ |
| 439 | (2 << 14) | /* GPF7 - CAMIF_YDATA2 */ |
| 440 | (2 << 16) | /* GPF8 - CAMIF_YDATA3 */ |
| 441 | (2 << 18) | /* GPF9 - CAMIF_YDATA4 */ |
| 442 | (2 << 20) | /* GPF10 - CAMIF_YDATA5 */ |
| 443 | (2 << 22) | /* GPF11 - CAMIF_YDATA6 */ |
| 444 | (2 << 24) | /* GPF12 - CAMIF_YDATA7 */ |
| 445 | (1 << 26) | /* GPF13 - OUTPUT Vibrator */ |
| 446 | (1 << 28) | /* GPF14 - output not CLKOUT0 */ |
| 447 | (1 << 30) /* GPF15 - OUTPUT CAM_PWRDN */ |
| 448 | ; |
| 449 | |
| 450 | __REG(GPFPUD) = |
| 451 | (SPD << (2 * 12)) | |
| 452 | (SPD << (2 * 11)) | |
| 453 | (SPD << (2 * 10)) | |
| 454 | (SPD << (2 * 9)) | |
| 455 | (SPD << (2 * 8)) | |
| 456 | (SPD << (2 * 7)) | |
| 457 | (SPD << (2 * 6)) | |
| 458 | (SPD << (2 * 5)); /* all cam data pulldown */ |
| 459 | |
| 460 | __REG(GPFDAT) = (1 << 15); /* assert CAM_PWRDN */ |
| 461 | |
| 462 | __REG(GPFCONSLP) = |
| 463 | (S0 << 0) | /* GPF0 */ |
| 464 | (S0 << 2) | /* GPF1 */ |
| 465 | (SIN << 4) | /* GPF2 */ |
| 466 | (S0 << 6) | /* GPF3 */ |
| 467 | (S0 << 8) | /* GPF4 */ |
| 468 | (SIN << 10) | /* GPF5 */ |
| 469 | (SIN << 12) | /* GPF6 */ |
| 470 | (SIN << 14) | /* GPF7 */ |
| 471 | (SIN << 16) | /* GPF8 */ |
| 472 | (SIN << 18) | /* GPF9 */ |
| 473 | (SIN << 20) | /* GPF10 */ |
| 474 | (SIN << 22) | /* GPF11 */ |
| 475 | (SIN << 24) | /* GPF12 */ |
| 476 | (S0 << 26) | /* GPF13 */ |
| 477 | (S0 << 28) | /* GPF14 */ |
| 478 | (S0 << 30) /* GPF15 */ |
| 479 | ; |
| 480 | |
| 481 | __REG(GPFPUDSLP) = |
| 482 | (SPD << 4) | /* GPF2 - pull down */ |
| 483 | (SPD << 10) | /* GPF5 - pull down */ |
| 484 | (SPD << 12) | /* GPF6 - pull down */ |
| 485 | (SPD << 14) | /* GPF7 - pull down */ |
| 486 | (SPD << 16) | /* GPF8 - pull down */ |
| 487 | (SPD << 18) | /* GPF9 - pull down */ |
| 488 | (SPD << 20) | /* GPF10 - pull down */ |
| 489 | (SPD << 22) | /* GPF11 - pull down */ |
| 490 | (SPD << 24) /* GPF12 - pull down */ |
| 491 | ; |
| 492 | |
| 493 | /* ---------------------------- Port G ---------------------------- */ |
| 494 | |
| 495 | __REG(GPGCON) = |
| 496 | (2 << 0) | /* GPG0 - MMC_CLK0 */ |
| 497 | (2 << 4) | /* GPG1 - MMC_CMD0 */ |
| 498 | (2 << 8) | /* GPG2 - MMC_DATA00 */ |
| 499 | (2 << 12) | /* GPG3 - MMC_DATA10 */ |
| 500 | (2 << 16) | /* GPG4 - MMC_DATA20 */ |
| 501 | (2 << 20) | /* GPG5 - MMC_DATA30 */ |
| 502 | (2 << 24) /* GPG6 - (NC) MMC CARD DETECT */ |
| 503 | ; |
| 504 | |
| 505 | __REG(GPGPUD) = (1 << (6 * 2)); /* pull down card detect */ |
| 506 | |
| 507 | __REG(GPGDAT) = 0; /* just for determinism */ |
| 508 | |
| 509 | __REG(GPGCONSLP) = |
| 510 | (SIN << 0) | /* GPG0 - it's not powered*/ |
| 511 | (SIN << 2) | /* GPG1 */ |
| 512 | (SIN << 4) | /* GPG2 */ |
| 513 | (SIN << 6) | /* GPG3 */ |
| 514 | (SIN << 8) | /* GPG4 */ |
| 515 | (SIN << 10) | /* GPG5 */ |
| 516 | (SIN << 12) /* GPG6 */ |
| 517 | ; |
| 518 | |
| 519 | __REG(GPGPUDSLP) = |
| 520 | (SPD << 0) | /* GPG0 - it's not powered*/ |
| 521 | (SPD << 2) | /* GPG1 */ |
| 522 | (SPD << 4) | /* GPG2 */ |
| 523 | (SPD << 6) | /* GPG3 */ |
| 524 | (SPD << 8) | /* GPG4 */ |
| 525 | (SPD << 10) | /* GPG5 */ |
| 526 | (SPD << 12) /* GPG6 */ |
| 527 | ; |
| 528 | |
| 529 | /* ---------------------------- Port H ---------------------------- */ |
| 530 | |
| 531 | __REG(GPHCON0) = |
| 532 | (1 << 0) | /* GPH0 - NC OUT 0 */ |
| 533 | (1 << 4) | /* GPH1 - NC OUT 0 */ |
| 534 | (1 << 8) | /* GPH2 - NC OUT 0 */ |
| 535 | (1 << 12) | /* GPH3 - NC OUT 0 */ |
| 536 | (1 << 16) | /* GPH4 - NC OUT 0 */ |
| 537 | (1 << 20) | /* GPH5 - NC OUT 0 */ |
| 538 | (1 << 24) | /* GPH6 - OUTPUT nBT_RESET */ |
| 539 | (0 << 28) /* GPH7 - INPUT HDQ */ |
| 540 | ; |
| 541 | __REG(GPHCON1) = |
| 542 | (1 << 0) | /* GPH8 - OUTPUT BT PIO5 */ |
| 543 | (0 << 4) /* GPH9 - INPUT LED INT */ |
| 544 | ; |
| 545 | |
| 546 | __REG(GPHPUD) = (SPU << (9 * 2)) | (SPU << (7 * 2)); |
| 547 | |
| 548 | __REG(GPHDAT) = 0; |
| 549 | |
| 550 | __REG(GPHCONSLP) = |
| 551 | (S0 << 0) | /* GPH0 */ |
| 552 | (S0 << 2) | /* GPH1 */ |
| 553 | (S0 << 4) | /* GPH2 */ |
| 554 | (S0 << 6) | /* GPH3 */ |
| 555 | (S0 << 8) | /* GPH4 */ |
| 556 | (S0 << 10) | /* GPH5 */ |
| 557 | (S0 << 12) | /* GPH6 */ |
| 558 | (SIN << 14) | /* GPH7 - INPUT (HDQ) */ |
| 559 | (S0 << 16) | /* GPH8 */ |
| 560 | (SIN << 18) /* GPH9 */ |
| 561 | ; |
| 562 | |
| 563 | __REG(GPHPUDSLP) = (SPU << (7 * 2)) | (SPU << (9 * 2)); |
| 564 | |
| 565 | /* ---------------------------- Port I ---------------------------- */ |
| 566 | |
| 567 | __REG(GPICON) = |
| 568 | (0 << 0) | /* GPI0 - INPUT version b0 */ |
| 569 | (0 << 2) | /* GPI1 - INPUT version b1 */ |
| 570 | (2 << 4) | /* GPI2 - LCD_VD2 */ |
| 571 | (2 << 6) | /* GPI3 - LCD_VD3 */ |
| 572 | (2 << 8) | /* GPI4 - LCD_VD4 */ |
| 573 | (2 << 10) | /* GPI5 - LCD_VD5 */ |
| 574 | (2 << 12) | /* GPI6 - LCD_VD6 */ |
| 575 | (2 << 14) | /* GPI7 - LCD_VD7 */ |
| 576 | (0 << 16) | /* GPI8 - INPUT version b2 */ |
| 577 | (2 << 18) | /* GPI9 - LCD_VD9 */ |
| 578 | (2 << 20) | /* GPI10 - LCD_VD10 */ |
| 579 | (2 << 22) | /* GPI11 - LCD_VD11 */ |
| 580 | (2 << 24) | /* GPI12 - LCD_VD12 */ |
| 581 | (2 << 26) | /* GPI13 - LCD_VD13 */ |
| 582 | (2 << 28) | /* GPI14 - LCD_VD14 */ |
| 583 | (2 << 30) /* GPI15 - LCD_VD15 */ |
| 584 | ; |
| 585 | |
| 586 | __REG(GPIPUD) = 0; /* all pullup and pulldown disabled */ |
| 587 | |
| 588 | __REG(GPIDAT) = 0; /* just for determinism */ |
| 589 | |
| 590 | __REG(GPICONSLP) = |
| 591 | (SIN << 0) | /* GPI0 - input */ |
| 592 | (SIN << 2) | /* GPI1 - input */ |
| 593 | (S0 << 4) | /* GPI2 - input */ |
| 594 | (S0 << 6) | /* GPI3 - input */ |
| 595 | (S0 << 8) | /* GPI4 - input */ |
| 596 | (S0 << 10) | /* GPI5 - input */ |
| 597 | (S0 << 12) | /* GPI6 - input */ |
| 598 | (S0 << 14) | /* GPI7 - input */ |
| 599 | (SIN << 16) | /* GPI8 - input */ |
| 600 | (S0 << 18) | /* GPI9 - input */ |
| 601 | (S0 << 20) | /* GPI10 - input */ |
| 602 | (S0 << 22) | /* GPI11 - input */ |
| 603 | (S0 << 24) | /* GPI12 - input */ |
| 604 | (S0 << 26) | /* GPI13 - input */ |
| 605 | (S0 << 28) | /* GPI14 - input */ |
| 606 | (S0 << 30) /* GPI15 - input */ |
| 607 | ; |
| 608 | |
| 609 | __REG(GPIPUDSLP) = |
| 610 | (1 << 0) | /* GPI0 - pull down */ |
| 611 | (1 << 2) | /* GPI1 - pull down */ |
| 612 | (1 << 16) /* GPI8 - pull down */ |
| 613 | ; |
| 614 | |
| 615 | /* ---------------------------- Port J ---------------------------- */ |
| 616 | |
| 617 | __REG(GPJCON) = |
| 618 | (2 << 0) | /* GPJ0 - LCD_VD16 */ |
| 619 | (2 << 2) | /* GPJ1 - LCD_VD17 */ |
| 620 | (2 << 4) | /* GPJ2 - LCD_VD18 */ |
| 621 | (2 << 6) | /* GPJ3 - LCD_VD19 */ |
| 622 | (2 << 8) | /* GPJ4 - LCD_VD20 */ |
| 623 | (2 << 10) | /* GPJ5 - LCD_VD21 */ |
| 624 | (2 << 12) | /* GPJ6 - LCD_VD22 */ |
| 625 | (2 << 14) | /* GPJ7 - LCD_VD23 */ |
| 626 | (2 << 16) | /* GPJ8 - LCD_HSYNC */ |
| 627 | (2 << 18) | /* GPJ9 - LCD_VSYNC */ |
| 628 | (2 << 20) | /* GPJ10 - LCD_VDEN */ |
| 629 | (2 << 22) /* GPJ11 - LCD_VCLK */ |
| 630 | ; |
| 631 | |
| 632 | __REG(GPJPUD) = 0; /* all pullup and pulldown disabled */ |
| 633 | |
| 634 | __REG(GPJDAT) = 0; /* just for determinism */ |
| 635 | |
| 636 | __REG(GPJCONSLP) = |
| 637 | (S0 << 0) | /* GPJ0 */ |
| 638 | (S0 << 2) | /* GPJ1 */ |
| 639 | (S0 << 4) | /* GPJ2 */ |
| 640 | (S0 << 6) | /* GPJ3 */ |
| 641 | (S0 << 8) | /* GPJ4 */ |
| 642 | (S0 << 10) | /* GPJ5 */ |
| 643 | (S0 << 12) | /* GPJ6 */ |
| 644 | (S0 << 14) | /* GPJ7 */ |
| 645 | (S0 << 16) | /* GPJ8 */ |
| 646 | (S0 << 18) | /* GPJ9 */ |
| 647 | (S0 << 20) | /* GPJ10 */ |
| 648 | (S0 << 22) /* GPJ11 */ |
| 649 | ; |
| 650 | |
| 651 | __REG(GPJPUDSLP) = |
| 652 | 0 |
| 653 | ; |
| 654 | |
| 655 | /* ---------------------------- Port K ---------------------------- */ |
| 656 | |
| 657 | __REG(GPKCON0) = |
| 658 | (1 << 0) | /* GPK0 - OUTPUT NC */ |
| 659 | (1 << 4) | /* GPK1 - OUTPUT NC */ |
| 660 | (1 << 8) | /* GPK2 - OUTPUT (nMODEM_ON) */ |
| 661 | |
| 662 | (1 << 12) | /* GPK3 - OUTPUT (LED_TRIG) */ |
| 663 | (1 << 16) | /* GPK4 - OUTPUT (LED_EN) */ |
| 664 | (0 << 20) | /* GPK5 - OUTPUT NC */ |
| 665 | (1 << 24) | /* GPK6 - OUTPUT (LCD_RESET) */ |
| 666 | (0 << 28) /* GPK7 - OUTPUT NC */ |
| 667 | ; |
| 668 | __REG(GPKCON1) = |
| 669 | (1 << 0) | /* GPK8 - OUTPUT NC */ |
| 670 | (1 << 4) | /* GPK9 - OUTPUT NC */ |
| 671 | (1 << 8) | /* GPK10 - OUTPUT NC */ |
| 672 | (1 << 12) | /* GPK11 - OUTPUT NC */ |
| 673 | (1 << 16) | /* GPK12 - OUTPUT NC */ |
| 674 | (1 << 20) | /* GPK13 - OUTPUT NC */ |
| 675 | (1 << 24) | /* GPK14 - OUTPUT NC */ |
| 676 | (1 << 28) /* GPK15 - OUTPUT NC */ |
| 677 | ; |
| 678 | |
| 679 | __REG(GPKPUD) = 0; |
| 680 | |
| 681 | __REG(GPKDAT) = /* rest output 0 */ |
| 682 | (SHOLD << (2 * 2)) | /* nMODEM_ON */ |
| 683 | (SHOLD << (2 * 3)) | /* LED_TRIG */ |
| 684 | (SHOLD << (2 * 4)) | /* LED_EN */ |
| 685 | (S0 << (2 * 6)) /* LCD_RESET */ |
| 686 | ; |
| 687 | |
| 688 | /* ---------------------------- Port L ---------------------------- */ |
| 689 | |
| 690 | __REG(GPLCON0) = |
| 691 | (1 << 0) | /* GPL0 - OUTPUT (NC) */ |
| 692 | (1 << 4) | /* GPL1 - OUTPUT (NC) */ |
| 693 | (1 << 8) | /* GPL2 - OUTPUT (NC) */ |
| 694 | (1 << 12) | /* GPL3 - OUTPUT (NC) */ |
| 695 | (1 << 16) | /* GPL4 - OUTPUT (NC) */ |
| 696 | (1 << 20) | /* GPL5 - OUTPUT (NC) */ |
| 697 | (1 << 24) | /* GPL6 - OUTPUT (NC) */ |
| 698 | (1 << 28) /* GPL7 - OUTPUT (NC) */ |
| 699 | ; |
| 700 | __REG(GPLCON1) = |
| 701 | (1 << 0) | /* GPL8 - OUTPUT (NC) */ |
| 702 | (1 << 4) | /* GPL9 - OUTPUT (NC) */ |
| 703 | (1 << 8) | /* GPL10 - OUTPUT (NC) */ |
| 704 | (1 << 12) | /* GPL11 - OUTPUT (NC) */ |
| 705 | (1 << 16) | /* GPL12 - OUTPUT (NC) */ |
| 706 | (1 << 20) | /* GPL13 - OUTPUT (NC) */ |
| 707 | (1 << 24) /* GPL14 - OUTPUT (NC) */ |
| 708 | ; |
| 709 | |
| 710 | __REG(GPLPUD) = 0; /* all pullup and pulldown disabled */ |
| 711 | |
| 712 | __REG(GPLDAT) = 0; |
| 713 | |
| 714 | |
| 715 | /* ---------------------------- Port M ---------------------------- */ |
| 716 | |
| 717 | __REG(GPMCON) = |
| 718 | (1 << 0) | /* GPM0 - OUTPUT (TP_RESET) */ |
| 719 | (1 << 4) | /* GPM1 - OUTPUT (NC) */ |
| 720 | (1 << 8) | /* GPM2 - OUTPUT (NC) */ |
| 721 | (1 << 12) | /* GPM3 - OUTPUT (NC) */ |
| 722 | (0 << 16) | /* GPM4 - INPUT (nUSB_FLT) */ |
| 723 | (0 << 20) /* GPM5 - INPUT (nUSB_OC) */ |
| 724 | ; |
| 725 | |
| 726 | __REG(GPMPUD) = (2 << (4 * 2)) | (2 << (5 * 2)); /* Pup on inputs */ |
| 727 | |
| 728 | __REG(GPMDAT) = 0; |
| 729 | |
| 730 | /* ---------------------------- Port N ---------------------------- */ |
| 731 | |
| 732 | __REG(GPNCON) = |
| 733 | (2 << 0) | /* GPN0 - EXINT0 nG1INT1 */ |
| 734 | (2 << 2) | /* GPN1 - EXINT1 KEY_MINUS */ |
| 735 | (2 << 4) | /* GPN2 - EXINT2 KEY_PLUS */ |
| 736 | (2 << 6) | /* GPN3 - EXINT3 PWR_IND */ |
| 737 | (2 << 8) | /* GPN4 - EXINT4 PWR_IRQ */ |
| 738 | (2 << 10) | /* GPN5 - EXINT5 nTOUCH */ |
| 739 | (2 << 12) | /* GPN6 - EXINT6 nJACK_INSERT */ |
| 740 | (1 << 14) | /* GPN7 - EXINT7 NC OUTPUT */ |
| 741 | (2 << 16) | /* GPN8 - EXINT8 nHOLD */ |
| 742 | (2 << 18) | /* GPN9 - EXINT9 WLAN_WAKEUP */ |
| 743 | (2 << 20) | /* GPN10 - EXINT10 nG1INT2 */ |
| 744 | (2 << 22) | /* GPN11 - EXINT11 nIO1 */ |
| 745 | (2 << 24) | /* GPN12 - EXINT12 nONKEYWAKE */ |
| 746 | (0 << 26) | /* GPN13 - INPUT (iROM CFG0) */ |
| 747 | (0 << 28) | /* GPN14 - INPUT (iROM CFG1) */ |
| 748 | (0 << 30) /* GPN15 - INPUT (iROM CFG2) */ |
| 749 | ; |
| 750 | |
| 751 | __REG(GPNPUD) = |
| 752 | (SPD << 0) | /* GPN0 - EXINT0 nG1INT1 */ |
| 753 | (SPU << 2) | /* GPN1 - EXINT1 KEY_MINUS */ |
| 754 | (SPU << 4) | /* GPN2 - EXINT2 KEY_PLUS */ |
| 755 | (SPU << 6) | /* GPN3 - EXINT3 PWR_IND */ |
| 756 | (SNP << 8) | /* GPN4 - EXINT4 PWR_IRQ */ |
| 757 | (SPU << 10) | /* GPN5 - EXINT5 nTOUCH */ |
| 758 | (SNP << 12) | /* GPN6 - EXINT6 nJACK_INSERT */ |
| 759 | (SNP << 14) | /* GPN7 - EXINT7 NC OP */ |
| 760 | (SPU << 16) | /* GPN8 - EXINT8 nHOLD */ |
| 761 | (SPU << 18) | /* GPN9 - EXINT9 BT_WAKEUP */ |
| 762 | (SPD << 20) | /* GPN10 - EXINT10 nG1INT2 */ |
| 763 | (SPD << 22) | /* GPN11 - EXINT11 nIO1 */ |
| 764 | (SPU << 24) | /* GPN12 - EXINT12 nONKEYWAKE */ |
| 765 | (SPD << 26) | /* GPN13 - INPUT (iROM CFG0) */ |
| 766 | (SPD << 28) | /* GPN14 - INPUT (iROM CFG1) */ |
| 767 | (SPD << 30) /* GPN15 - INPUT (iROM CFG2) */ |
| 768 | ; |
| 769 | |
| 770 | __REG(GPNDAT) = 0; |
| 771 | |
| 772 | |
| 773 | /* ---------------------------- Port O ---------------------------- */ |
| 774 | |
| 775 | __REG(GPOCON) = |
| 776 | (2 << 0) | /* GPO0 - XM0CS2 (nNANDCS0) */ |
| 777 | (1 << 2) | /* GPO1 - OUTPUT (nMODEM_RESET) */ |
| 778 | (1 << 4) | /* GPO2 - OUTPUT (NC) */ |
| 779 | (1 << 6) | /* GPO3 - OUTPUT (NC) */ |
| 780 | (1 << 8) | /* GPO4 - OUTPUT (NC) */ |
| 781 | (1 << 10) | /* GPO5 - OUTPUT (NC) */ |
| 782 | (1 << 12) | /* GPO6 - OUTPUT (NC) */ |
| 783 | (1 << 14) | /* GPO7 - OUTPUT (NC) */ |
| 784 | (1 << 16) | /* GPO8 - OUTPUT (NC) */ |
| 785 | (1 << 18) | /* GPO9 - OUTPUT (NC) */ |
| 786 | (1 << 20) | /* GPO10 - OUTPUT (NC) */ |
| 787 | (1 << 22) | /* GPO11 - OUTPUT (NC) */ |
| 788 | (1 << 24) | /* GPO12 - OUTPUT (NC) */ |
| 789 | (1 << 26) | /* GPO13 - OUTPUT (NC) */ |
| 790 | (1 << 28) | /* GPO14 - OUTPUT (NC) */ |
| 791 | (1 << 30) /* GPO15 - OUTPUT (NC) */ |
| 792 | ; |
| 793 | |
| 794 | __REG(GPOPUD) = 0; /* no pulling */ |
| 795 | |
| 796 | __REG(GPODAT) = (1 << 15); /* assert CAM_PWRDN */ |
| 797 | |
| 798 | __REG(GPOCONSLP) = |
| 799 | (SHOLD << 0) | /* GPO0 - hold state */ |
| 800 | (SHOLD << 2) | /* GPO1 - OUTPUT 1 (do not reset modem) */ |
| 801 | (S0 << 4) | /* GPO2 - OUTPUT 0 */ |
| 802 | (S0 << 6) | /* GPO3 - OUTPUT 0 */ |
| 803 | (S0 << 8) | /* GPO4 - OUTPUT 0 */ |
| 804 | (S0 << 10) | /* GPO5 - OUTPUT 0 */ |
| 805 | (S0 << 12) | /* GPO6 - OUTPUT 0 */ |
| 806 | (S0 << 14) | /* GPO7 - OUTPUT 0 */ |
| 807 | (S0 << 16) | /* GPO8 - OUTPUT 0 */ |
| 808 | (S0 << 18) | /* GPO9 - OUTPUT 0 */ |
| 809 | (S0 << 20) | /* GPO10 - OUTPUT 0 */ |
| 810 | (S0 << 22) | /* GPO11 - OUTPUT 0 */ |
| 811 | (S0 << 24) | /* GPO12 - OUTPUT 0 */ |
| 812 | (S0 << 26) | /* GPO13 - OUTPUT 0 */ |
| 813 | (S0 << 28) | /* GPO14 - OUTPUT 0 */ |
| 814 | (S0 << 30) /* GPO15 - OUTPUT 0 */ |
| 815 | ; |
| 816 | |
| 817 | __REG(GPOPUDSLP) = |
| 818 | 0 |
| 819 | ; |
| 820 | |
| 821 | /* ---------------------------- Port P ---------------------------- */ |
| 822 | |
| 823 | __REG(GPPCON) = |
| 824 | (1 << 0) | /* GPP0 - input (NC) */ |
| 825 | (1 << 2) | /* GPP1 - input (NC) */ |
| 826 | (1 << 4) | /* GPP2 - input (NC) */ |
| 827 | (1 << 6) | /* GPP3 - input (NC) */ |
| 828 | (1 << 8) | /* GPP4 - input (NC) */ |
| 829 | (1 << 10) | /* GPP5 - input (NC) */ |
| 830 | (1 << 12) | /* GPP6 - input (NC) */ |
| 831 | (1 << 14) | /* GPP7 - input (NC) */ |
| 832 | (1 << 16) | /* GPP8 - input (NC) */ |
| 833 | (1 << 18) | /* GPP9 - input (NC) */ |
| 834 | (1 << 20) | /* GPP10 - input (NC) */ |
| 835 | (1 << 22) | /* GPP11 - input (NC) */ |
| 836 | (1 << 24) | /* GPP12 - input (NC) */ |
| 837 | (1 << 26) | /* GPP13 - input (NC) */ |
| 838 | (1 << 28) /* GPP14 - input (NC) */ |
| 839 | ; |
| 840 | |
| 841 | __REG(GPPPUD) = 0; /* no pull */ |
| 842 | |
| 843 | __REG(GPPDAT) = 0; |
| 844 | |
| 845 | __REG(GPPCONSLP) = |
| 846 | (S0 << 0) | /* GPP0 - OUTPUT 0 */ |
| 847 | (S0 << 2) | /* GPP1 - OUTPUT 0 */ |
| 848 | (S0 << 4) | /* GPP2 - OUTPUT 0 */ |
| 849 | (S0 << 6) | /* GPP3 - OUTPUT 0 */ |
| 850 | (S0 << 8) | /* GPP4 - OUTPUT 0 */ |
| 851 | (S0 << 10) | /* GPP5 - OUTPUT 0 */ |
| 852 | (S0 << 12) | /* GPP6 - OUTPUT 0 */ |
| 853 | (S0 << 14) | /* GPP7 - OUTPUT 0 */ |
| 854 | (S0 << 16) | /* GPP8 - OUTPUT 0 */ |
| 855 | (S0 << 18) | /* GPP9 - OUTPUT 0 */ |
| 856 | (S0 << 20) | /* GPP10 - OUTPUT 0 */ |
| 857 | (S0 << 22) | /* GPP11 - OUTPUT 0 */ |
| 858 | (S0 << 24) | /* GPP12 - OUTPUT 0 */ |
| 859 | (S0 << 26) | /* GPP13 - OUTPUT 0 */ |
| 860 | (S0 << 28) /* GPP14 - OUTPUT 0 */ |
| 861 | ; |
| 862 | |
| 863 | __REG(GPPPUDSLP) = 0; |
| 864 | |
| 865 | /* ---------------------------- Port Q ---------------------------- */ |
| 866 | |
| 867 | __REG(GPQCON) = |
| 868 | (1 << 0) | /* GPQ0 - OUTPUT (NC) */ |
| 869 | (1 << 2) | /* GPQ1 - OUTPUT (NC) */ |
| 870 | (1 << 4) | /* GPQ2 - OUTPUT (NC) */ |
| 871 | (1 << 6) | /* GPQ3 - OUTPUT (NC) */ |
| 872 | (1 << 8) | /* GPQ4 - OUTPUT (NC) */ |
| 873 | (1 << 10) | /* GPQ5 - OUTPUT (NC) */ |
| 874 | (1 << 12) | /* GPQ6 - OUTPUT (NC) */ |
| 875 | (1 << 14) | /* GPQ7 - OUTPUT (NC) */ |
| 876 | (1 << 16) /* GPQ8 - OUTPUT (NC) */ |
| 877 | ; |
| 878 | |
| 879 | __REG(GPQPUD) = 0; /* no pull */ |
| 880 | |
| 881 | __REG(GPQDAT) = 0; |
| 882 | |
| 883 | __REG(GPQCONSLP) = |
| 884 | (S0 << 0) | /* GPQ0 - OUTPUT 0 */ |
| 885 | (S0 << 2) | /* GPQ1 - OUTPUT 0 */ |
| 886 | (S0 << 4) | /* GPQ2 - OUTPUT 0 */ |
| 887 | (S0 << 6) | /* GPQ3 - OUTPUT 0 */ |
| 888 | (S0 << 8) | /* GPQ4 - OUTPUT 0 */ |
| 889 | (S0 << 10) | /* GPQ5 - OUTPUT 0 */ |
| 890 | (S0 << 12) | /* GPQ6 - OUTPUT 0 */ |
| 891 | (S0 << 14) | /* GPQ7 - OUTPUT 0 */ |
| 892 | (S0 << 16) /* GPQ8 - OUTPUT 0 */ |
| 893 | ; |
| 894 | |
| 895 | __REG(GPQPUDSLP) = 0; |
| 896 | |
| 897 | /* LCD Controller enable */ |
| 898 | |
| 899 | __REG(0x7410800c) = 0; |
| 900 | __REG(0x7f0081a0) = 0xbfc115c1; |
| 901 | |
| 902 | /* |
| 903 | * We have to talk to the PMU a little bit |
| 904 | */ |
| 905 | for (n = 0; n < ARRAY_SIZE(om_3d7k_pcf50633_init); n++) |
| 906 | i2c_write_sync(&bb_s3c6410, PCF50633_I2C_ADS, |
| 907 | om_3d7k_pcf50633_init[n].index, |
| 908 | om_3d7k_pcf50633_init[n].value); |
| 909 | |
| 910 | } |
| 911 | |
| 912 | int om_3d7k_get_pcb_revision(void) |
| 913 | { |
| 914 | u32 v = __REG(GPIDAT); |
| 915 | /* |
| 916 | * PCB rev is 3 bit code (info from Dkay) |
| 917 | * (b2, b1, b0) = (0,0,1) => pcb rev A1 |
| 918 | * maximum rev = A7 |
| 919 | * bit0 = GPI8 |
| 920 | * bit1 = GPI1 |
| 921 | * bit2 = GPI0 |
| 922 | */ |
| 923 | |
| 924 | return ( |
| 925 | ((v & (1 << 8)) ? 1 : 0) | |
| 926 | ((v & (1 << 1)) ? 2 : 0) | |
| 927 | ((v & (1 << 0)) ? 4 : 0) |
| 928 | ); |
| 929 | } |
| 930 | |
| 931 | const struct board_variant const * get_board_variant_om_3d7k(void) |
| 932 | { |
| 933 | return &board_variants[om_3d7k_get_pcb_revision()]; |
| 934 | } |
| 935 | |
| 936 | |
