Root/qiboot/src/drivers/glamo-init.c

1/*
2 * (C) Copyright 2007 by OpenMoko, Inc.
3 * Author: Harald Welte <laforge@openmoko.org>
4 * Andy Green <andy@openmoko.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <qi.h>
23#include <glamo-regs.h>
24
25#define GLAMO_REG(x) (*(volatile unsigned short *)(0x08000000 + x))
26
27static void glamo_reg_write(u16 reg, u16 val)
28{
29    GLAMO_REG(reg) = val;
30}
31
32static u16 glamo_reg_read(u16 reg)
33{
34    return GLAMO_REG(reg);
35}
36
37
38static u16 u16a_gen_init_0x0000[] = {
39    0x2020, 0x3650, 0x0002, 0x01FF, 0x0000, 0x0000, 0x0000, 0x0000,
40    0x000D, 0x000B, 0x00EE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
41    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
42    0x1801 /*0x1839*/, 0x0000, 0x2000, 0x0001, 0x0100, 0x0000, 0x0000, 0x0000,
43    0x05DB, 0x5231, 0x09C3, 0x8261, 0x0003, 0x0000, 0x0000, 0x0000,
44    0x000F, 0x101E, 0xC0C3, 0x101E, 0x000F, 0x0001, 0x030F, 0x020F,
45    0x080F, 0x0F0F
46};
47
48static u16 u16a_gen_init_0x0200[] = {
49    0x0EF0, 0x07FF, 0x0000, 0x0080, 0x0344, 0x0600, 0x0000, 0x0000,
50    0x0000, 0x0000, 0x4000, 0xF00E, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
51    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
52    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
53    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
54    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
55    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
56    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
57    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
58    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
59    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
60    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
61    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
62    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
63    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
64    0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
65    0x0873, 0xAFAF, 0x0108, 0x0010, 0x0000, 0x0000, 0x0000, 0x0000,
66    0x0000, 0x1002, 0x6006, 0x00FF, 0x0001, 0x0020, 0x0000, 0x0000,
67    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
68    0x3210, 0x5432, 0xE100, 0x01D6
69};
70
71
72void glamo_core_init(void)
73{
74    int bp;
75
76    /* power up PLL1 and PLL2 */
77    glamo_reg_write(GLAMO_REG_PLL_GEN7, 0x0000);
78    glamo_reg_write(GLAMO_REG_PLL_GEN3, 0x0400);
79
80    /* enable memory clock and get it out of deep pwrdown */
81    glamo_reg_write(GLAMO_REG_CLOCK_MEMORY,
82        glamo_reg_read(GLAMO_REG_CLOCK_MEMORY) | 8);
83    glamo_reg_write(GLAMO_REG_MEM_DRAM2,
84            glamo_reg_read(GLAMO_REG_MEM_DRAM2) & (~(1 << 12)));
85    glamo_reg_write(GLAMO_REG_MEM_DRAM1,
86            glamo_reg_read(GLAMO_REG_MEM_DRAM1) & (~(1 << 12)));
87    /*
88     * we just fill up the general hostbus and LCD register sets
89     * with magic values taken from the Linux framebuffer init action
90     */
91    for (bp = 0; bp < ARRAY_SIZE(u16a_gen_init_0x0000); bp++)
92        glamo_reg_write(0x0 | (bp << 1),
93                u16a_gen_init_0x0000[bp]);
94
95    for (bp = 0; bp < ARRAY_SIZE(u16a_gen_init_0x0200); bp++)
96        glamo_reg_write(0x200 | (bp << 1),
97                u16a_gen_init_0x0200[bp]);
98
99    /* spin until PLL1 lock */
100    while (!(glamo_reg_read(GLAMO_REG_PLL_GEN5) & 1))
101        ;
102}
103
104

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