| 1 | /* |
| 2 | * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver |
| 3 | * |
| 4 | * Copyright (C) 2007 OpenMoko, Inc, Andy Green <andy@openmoko.com> |
| 5 | * Based on the Glamo MCI driver that was --> |
| 6 | * |
| 7 | * Copyright (C) 2007 OpenMoko, Inc, Andy Green <andy@openmoko.com> |
| 8 | * Based on S3C MMC driver that was: |
| 9 | * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de> |
| 10 | * |
| 11 | * and |
| 12 | * |
| 13 | * Based on S3C MMC driver that was (original copyright notice ---->) |
| 14 | * |
| 15 | * (C) Copyright 2006 by OpenMoko, Inc. |
| 16 | * Author: Harald Welte <laforge@openmoko.org> |
| 17 | * |
| 18 | * based on u-boot pxa MMC driver and linux/drivers/mmc/s3c2410mci.c |
| 19 | * (C) 2005-2005 Thomas Kleffel |
| 20 | * |
| 21 | * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de> |
| 22 | * |
| 23 | * This program is free software; you can redistribute it and/or modify |
| 24 | * it under the terms of the GNU General Public License version 2 as |
| 25 | * published by the Free Software Foundation. |
| 26 | */ |
| 27 | |
| 28 | #include <qi.h> |
| 29 | #include <mmc.h> |
| 30 | |
| 31 | #include <glamo-regs.h> |
| 32 | #include <glamo-mmc.h> |
| 33 | |
| 34 | #define CONFIG_GLAMO_BASE 0x08000000 |
| 35 | |
| 36 | #define MMC_BLOCK_SIZE_BITS 9 |
| 37 | |
| 38 | #define GLAMO_REG(x) (*(volatile u16 *)(CONFIG_GLAMO_BASE + x)) |
| 39 | #define GLAMO_INTRAM_OFFSET (8 * 1024 * 1024) |
| 40 | #define GLAMO_FB_SIZE ((8 * 1024 * 1024) - 0x10000) |
| 41 | #define GLAMO_START_OF_MMC_INTMEM ((volatile u16 *)(CONFIG_GLAMO_BASE + \ |
| 42 | GLAMO_INTRAM_OFFSET + GLAMO_FB_SIZE)) |
| 43 | |
| 44 | static int ccnt; |
| 45 | //static mmc_csd_t mmc_csd; |
| 46 | static int mmc_ready = 0; |
| 47 | //static int wide = 0; |
| 48 | static enum card_type card_type = CARDTYPE_NONE; |
| 49 | |
| 50 | |
| 51 | #define MULTI_READ_BLOCKS_PER_COMMAND 64 |
| 52 | |
| 53 | int mmc_read(unsigned long src, u8 *dst, int size); |
| 54 | |
| 55 | #define UNSTUFF_BITS(resp,start,size) \ |
| 56 | ({ \ |
| 57 | const int __size = size; \ |
| 58 | const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \ |
| 59 | const int __off = 3 - ((start) / 32); \ |
| 60 | const int __shft = (start) & 31; \ |
| 61 | u32 __res; \ |
| 62 | \ |
| 63 | __res = resp[__off] >> __shft; \ |
| 64 | if (__size + __shft > 32) \ |
| 65 | __res |= resp[__off-1] << ((32 - __shft) & 31); \ |
| 66 | __res & __mask; \ |
| 67 | }) |
| 68 | |
| 69 | |
| 70 | static void |
| 71 | glamo_reg_write(u16 val, u16 reg) |
| 72 | { |
| 73 | GLAMO_REG(reg) = val; |
| 74 | } |
| 75 | |
| 76 | static u16 |
| 77 | glamo_reg_read(u16 reg) |
| 78 | { |
| 79 | return GLAMO_REG(reg); |
| 80 | } |
| 81 | |
| 82 | unsigned char CRC7(u8 * pu8, int cnt) |
| 83 | { |
| 84 | u8 crc = 0; |
| 85 | |
| 86 | while (cnt--) { |
| 87 | int n; |
| 88 | u8 d = *pu8++; |
| 89 | for (n = 0; n < 8; n++) { |
| 90 | crc <<= 1; |
| 91 | if ((d & 0x80) ^ (crc & 0x80)) |
| 92 | crc ^= 0x09; |
| 93 | d <<= 1; |
| 94 | } |
| 95 | } |
| 96 | return (crc << 1) | 1; |
| 97 | } |
| 98 | |
| 99 | unsigned long mmc_bread(int dev_num, unsigned long blknr, unsigned long blkcnt, |
| 100 | void *dst) |
| 101 | { |
| 102 | int ret; |
| 103 | |
| 104 | if (!blkcnt) |
| 105 | return 0; |
| 106 | |
| 107 | /* printf("mmc_bread(%d, %ld, %ld, %p)\n", dev_num, blknr, blkcnt, dst); */ |
| 108 | ret = mmc_read(blknr, dst, blkcnt); |
| 109 | if (ret) |
| 110 | return ret; |
| 111 | |
| 112 | return blkcnt; |
| 113 | } |
| 114 | |
| 115 | /* MMC_DEFAULT_RCA should probably be just 1, but this may break other code |
| 116 | that expects it to be shifted. */ |
| 117 | static u16 rca = MMC_DEFAULT_RCA >> 16; |
| 118 | |
| 119 | static void do_pio_read(u16 *buf, int count_words) |
| 120 | { |
| 121 | volatile u16 *from_ptr = GLAMO_START_OF_MMC_INTMEM; |
| 122 | |
| 123 | while (count_words--) |
| 124 | *buf++ = *from_ptr++; |
| 125 | } |
| 126 | |
| 127 | static void do_pio_write(u16 *buf, int count_words) |
| 128 | { |
| 129 | volatile u16 *to_ptr = GLAMO_START_OF_MMC_INTMEM; |
| 130 | |
| 131 | while (count_words--) |
| 132 | *to_ptr++ = *buf++; |
| 133 | } |
| 134 | |
| 135 | |
| 136 | static int mmc_cmd(int opcode, int arg, int flags, |
| 137 | int data_size, int data_blocks, |
| 138 | int will_stop, u16 *resp) |
| 139 | { |
| 140 | u16 * pu16 = (u16 *)&resp[0]; |
| 141 | u16 * reg_resp = (u16 *)(CONFIG_GLAMO_BASE + GLAMO_REGOFS_MMC + |
| 142 | GLAMO_REG_MMC_CMD_RSP1); |
| 143 | u16 status; |
| 144 | int n; |
| 145 | u8 u8a[6]; |
| 146 | u16 fire = 0; |
| 147 | int cmd_is_stop = 0; |
| 148 | int error = 0; |
| 149 | |
| 150 | #if 0 |
| 151 | printf("mmc_cmd(opcode=%d, arg=0x%08X, flags=0x%x, " |
| 152 | "data_size=%d, data_blocks=%d, will_stop=%d, resp=%p)\n", |
| 153 | opcode, arg, flags, data_size, data_blocks, will_stop, resp); |
| 154 | #endif |
| 155 | switch (opcode) { |
| 156 | case MMC_STOP_TRANSMISSION: |
| 157 | cmd_is_stop = 1; |
| 158 | break; |
| 159 | default: |
| 160 | break; |
| 161 | } |
| 162 | |
| 163 | ccnt++; |
| 164 | |
| 165 | /* this guy has data to read/write? */ |
| 166 | if ((!cmd_is_stop) && (flags & (MMC_DATA_WRITE | MMC_DATA_READ))) { |
| 167 | /* |
| 168 | * the S-Media-internal RAM offset for our MMC buffer |
| 169 | */ |
| 170 | glamo_reg_write((u16)GLAMO_FB_SIZE, |
| 171 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_WDATADS1); |
| 172 | glamo_reg_write((u16)(GLAMO_FB_SIZE >> 16), |
| 173 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_WDATADS2); |
| 174 | glamo_reg_write((u16)GLAMO_FB_SIZE, |
| 175 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_RDATADS1); |
| 176 | glamo_reg_write((u16)(GLAMO_FB_SIZE >> 16), |
| 177 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_RDATADS2); |
| 178 | |
| 179 | /* set up the block info */ |
| 180 | glamo_reg_write(data_size, GLAMO_REGOFS_MMC + |
| 181 | GLAMO_REG_MMC_DATBLKLEN); |
| 182 | glamo_reg_write(data_blocks, GLAMO_REGOFS_MMC + |
| 183 | GLAMO_REG_MMC_DATBLKCNT); |
| 184 | } |
| 185 | |
| 186 | /* if we can't do it, reject as busy */ |
| 187 | if (!glamo_reg_read(GLAMO_REGOFS_MMC + GLAMO_REG_MMC_RB_STAT1) & |
| 188 | GLAMO_STAT1_MMC_IDLE) |
| 189 | return -1; |
| 190 | |
| 191 | /* create an array in wire order for CRC computation */ |
| 192 | u8a[0] = 0x40 | (opcode & 0x3f); |
| 193 | u8a[1] = (arg >> 24); |
| 194 | u8a[2] = (arg >> 16); |
| 195 | u8a[3] = (arg >> 8); |
| 196 | u8a[4] = arg; |
| 197 | u8a[5] = CRC7(&u8a[0], 5); /* CRC7 on first 5 bytes of packet */ |
| 198 | |
| 199 | /* issue the wire-order array including CRC in register order */ |
| 200 | glamo_reg_write((u8a[4] << 8) | u8a[5], |
| 201 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_CMD_REG1); |
| 202 | glamo_reg_write((u8a[2] << 8) | u8a[3], |
| 203 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_CMD_REG2); |
| 204 | glamo_reg_write((u8a[0] << 8) | u8a[1], |
| 205 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_CMD_REG3); |
| 206 | |
| 207 | /* command index toggle */ |
| 208 | fire |= (ccnt & 1) << 12; |
| 209 | |
| 210 | /* set type of command */ |
| 211 | switch (mmc_cmd_type(flags)) { |
| 212 | case MMC_CMD_BC: |
| 213 | fire |= GLAMO_FIRE_MMC_CMDT_BNR; |
| 214 | break; |
| 215 | case MMC_CMD_BCR: |
| 216 | fire |= GLAMO_FIRE_MMC_CMDT_BR; |
| 217 | break; |
| 218 | case MMC_CMD_AC: |
| 219 | fire |= GLAMO_FIRE_MMC_CMDT_AND; |
| 220 | break; |
| 221 | case MMC_CMD_ADTC: |
| 222 | fire |= GLAMO_FIRE_MMC_CMDT_AD; |
| 223 | break; |
| 224 | } |
| 225 | /* |
| 226 | * if it expects a response, set the type expected |
| 227 | * |
| 228 | * R1, Length : 48bit, Normal response |
| 229 | * R1b, Length : 48bit, same R1, but added card busy status |
| 230 | * R2, Length : 136bit (really 128 bits with CRC snipped) |
| 231 | * R3, Length : 48bit (OCR register value) |
| 232 | * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card |
| 233 | * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card |
| 234 | * R6, Length : 48bit (RCA register) |
| 235 | * R7, Length : 48bit (interface condition, VHS(voltage supplied), |
| 236 | * check pattern, CRC7) |
| 237 | */ |
| 238 | switch (mmc_resp_type(flags)) { |
| 239 | case MMC_RSP_R6: /* same index as R7 and R1 */ |
| 240 | fire |= GLAMO_FIRE_MMC_RSPT_R1; |
| 241 | break; |
| 242 | case MMC_RSP_R1B: |
| 243 | fire |= GLAMO_FIRE_MMC_RSPT_R1b; |
| 244 | break; |
| 245 | case MMC_RSP_R2: |
| 246 | fire |= GLAMO_FIRE_MMC_RSPT_R2; |
| 247 | break; |
| 248 | case MMC_RSP_R3: |
| 249 | fire |= GLAMO_FIRE_MMC_RSPT_R3; |
| 250 | break; |
| 251 | /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */ |
| 252 | } |
| 253 | /* |
| 254 | * From the command index, set up the command class in the host ctrllr |
| 255 | * |
| 256 | * missing guys present on chip but couldn't figure out how to use yet: |
| 257 | * 0x0 "stream read" |
| 258 | * 0x9 "cancel running command" |
| 259 | */ |
| 260 | switch (opcode) { |
| 261 | case MMC_READ_SINGLE_BLOCK: |
| 262 | fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */ |
| 263 | break; |
| 264 | case MMC_SWITCH: /* 64 byte payload */ |
| 265 | case 0x33: /* observed issued by MCI */ |
| 266 | case MMC_READ_MULTIPLE_BLOCK: |
| 267 | /* we will get an interrupt off this */ |
| 268 | if (!will_stop) |
| 269 | /* multiblock no stop */ |
| 270 | fire |= GLAMO_FIRE_MMC_CC_MBRNS; |
| 271 | else |
| 272 | /* multiblock with stop */ |
| 273 | fire |= GLAMO_FIRE_MMC_CC_MBRS; |
| 274 | break; |
| 275 | case MMC_WRITE_BLOCK: |
| 276 | fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */ |
| 277 | break; |
| 278 | case MMC_WRITE_MULTIPLE_BLOCK: |
| 279 | if (will_stop) |
| 280 | /* multiblock with stop */ |
| 281 | fire |= GLAMO_FIRE_MMC_CC_MBWS; |
| 282 | else |
| 283 | /* multiblock NO stop-- 'RESERVED'? */ |
| 284 | fire |= GLAMO_FIRE_MMC_CC_MBWNS; |
| 285 | break; |
| 286 | case MMC_STOP_TRANSMISSION: |
| 287 | fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */ |
| 288 | break; |
| 289 | default: |
| 290 | fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */ |
| 291 | break; |
| 292 | } |
| 293 | /* enforce timeout */ |
| 294 | glamo_reg_write(0xfff, GLAMO_REGOFS_MMC + GLAMO_REG_MMC_TIMEOUT); |
| 295 | |
| 296 | /* Generate interrupt on txfer; drive strength max */ |
| 297 | glamo_reg_write((glamo_reg_read(GLAMO_REGOFS_MMC + |
| 298 | GLAMO_REG_MMC_BASIC) & 0xfe) | |
| 299 | 0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT | |
| 300 | GLAMO_BASIC_MMC_EN_COMPL_INT | |
| 301 | GLAMO_BASIC_MMC_EN_DR_STR0 | |
| 302 | GLAMO_BASIC_MMC_EN_DR_STR1, |
| 303 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_BASIC); |
| 304 | |
| 305 | /* send the command out on the wire */ |
| 306 | /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */ |
| 307 | glamo_reg_write(fire, GLAMO_REGOFS_MMC + GLAMO_REG_MMC_CMD_FIRE); |
| 308 | |
| 309 | /* |
| 310 | * we must spin until response is ready or timed out |
| 311 | * -- we don't get interrupts unless there is a bulk rx |
| 312 | */ |
| 313 | do |
| 314 | status = glamo_reg_read(GLAMO_REGOFS_MMC + |
| 315 | GLAMO_REG_MMC_RB_STAT1); |
| 316 | while ((((status >> 15) & 1) != (ccnt & 1)) || |
| 317 | (!(status & (GLAMO_STAT1_MMC_RB_RRDY | |
| 318 | GLAMO_STAT1_MMC_RTOUT | |
| 319 | GLAMO_STAT1_MMC_DTOUT | |
| 320 | GLAMO_STAT1_MMC_BWERR | |
| 321 | GLAMO_STAT1_MMC_BRERR)))); |
| 322 | |
| 323 | if (status & (GLAMO_STAT1_MMC_RTOUT | GLAMO_STAT1_MMC_DTOUT)) |
| 324 | error = -4; |
| 325 | if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) |
| 326 | error = -5; |
| 327 | |
| 328 | if (cmd_is_stop) |
| 329 | return 0; |
| 330 | |
| 331 | if (error) { |
| 332 | #if 0 |
| 333 | puts("cmd 0x"); |
| 334 | print8(opcode); |
| 335 | puts(", arg 0x"); |
| 336 | print8(arg); |
| 337 | puts(", flags 0x"); |
| 338 | print32(flags); |
| 339 | puts("\n"); |
| 340 | puts("Error after cmd: 0x"); |
| 341 | print32(error); |
| 342 | puts("\n"); |
| 343 | #endif |
| 344 | goto done; |
| 345 | } |
| 346 | /* |
| 347 | * mangle the response registers in two different exciting |
| 348 | * undocumented ways discovered by trial and error |
| 349 | */ |
| 350 | if (mmc_resp_type(flags) == MMC_RSP_R2) |
| 351 | /* grab the response */ |
| 352 | for (n = 0; n < 8; n++) /* super mangle power 1 */ |
| 353 | pu16[n ^ 6] = reg_resp[n]; |
| 354 | else |
| 355 | for (n = 0; n < 3; n++) /* super mangle power 2 */ |
| 356 | pu16[n] = (reg_resp[n] >> 8) | |
| 357 | (reg_resp[n + 1] << 8); |
| 358 | /* |
| 359 | * if we don't have bulk data to take care of, we're done |
| 360 | */ |
| 361 | if (!(flags & (MMC_DATA_READ | MMC_DATA_WRITE))) |
| 362 | goto done; |
| 363 | |
| 364 | /* enforce timeout */ |
| 365 | glamo_reg_write(0xfff, GLAMO_REGOFS_MMC + GLAMO_REG_MMC_TIMEOUT); |
| 366 | /* |
| 367 | * spin |
| 368 | */ |
| 369 | while (!(glamo_reg_read(GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) |
| 370 | ; |
| 371 | /* ack this interrupt source */ |
| 372 | glamo_reg_write(GLAMO_IRQ_MMC, GLAMO_REG_IRQ_CLEAR); |
| 373 | |
| 374 | if (status & GLAMO_STAT1_MMC_DTOUT) |
| 375 | error = -1; |
| 376 | if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) |
| 377 | error = -2; |
| 378 | if (status & GLAMO_STAT1_MMC_RTOUT) |
| 379 | error = -5; |
| 380 | if (error) { |
| 381 | // printf("cmd 0x%x, arg 0x%x flags 0x%x\n", opcode, arg, flags); |
| 382 | #if 0 |
| 383 | puts("Error after resp: 0x"); |
| 384 | print32(status); |
| 385 | puts("\n"); |
| 386 | #endif |
| 387 | goto done; |
| 388 | } |
| 389 | #if 0 |
| 390 | if (flags & MMC_DATA_READ) { |
| 391 | volatile u8 * pu8 = (volatile u8 *)GLAMO_START_OF_MMC_INTMEM; |
| 392 | for (n = 0; n < 512; n += 16) { |
| 393 | int n1; |
| 394 | for (n1 = 0; n1 < 16; n1++) { |
| 395 | printf("%02X ", pu8[n + n1]); |
| 396 | } |
| 397 | printf("\n"); |
| 398 | } |
| 399 | } |
| 400 | #endif |
| 401 | return 0; |
| 402 | |
| 403 | done: |
| 404 | return error; |
| 405 | } |
| 406 | |
| 407 | static void glamo_mci_reset(void) |
| 408 | { |
| 409 | /* reset MMC controller */ |
| 410 | glamo_reg_write(GLAMO_CLOCK_MMC_RESET | GLAMO_CLOCK_MMC_DG_TCLK | |
| 411 | GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK | |
| 412 | GLAMO_CLOCK_MMC_EN_M9CLK, |
| 413 | GLAMO_REG_CLOCK_MMC); |
| 414 | /* and disable reset */ |
| 415 | glamo_reg_write(GLAMO_CLOCK_MMC_DG_TCLK | |
| 416 | GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK | |
| 417 | GLAMO_CLOCK_MMC_EN_M9CLK, |
| 418 | GLAMO_REG_CLOCK_MMC); |
| 419 | } |
| 420 | |
| 421 | |
| 422 | |
| 423 | int mmc_read(unsigned long src, u8 *dst, int size) |
| 424 | { |
| 425 | int resp; |
| 426 | u8 response[16]; |
| 427 | int size_original = size; |
| 428 | int lump; |
| 429 | |
| 430 | if (((int)dst) & 1) { |
| 431 | puts("Bad align on dst\n"); |
| 432 | return 0; |
| 433 | } |
| 434 | |
| 435 | resp = mmc_cmd(MMC_SET_BLOCKLEN, MMC_BLOCK_SIZE, |
| 436 | MMC_CMD_AC | MMC_RSP_R1, 0, 0, 0, |
| 437 | (u16 *)&response[0]); |
| 438 | if (resp) |
| 439 | return resp; |
| 440 | |
| 441 | while (size) { |
| 442 | /* glamo mmc times out as this increases too much */ |
| 443 | lump = MULTI_READ_BLOCKS_PER_COMMAND; |
| 444 | if (lump > size) |
| 445 | lump = size; |
| 446 | |
| 447 | switch (card_type) { |
| 448 | case CARDTYPE_SDHC: /* block addressing */ |
| 449 | resp = mmc_cmd(MMC_READ_MULTIPLE_BLOCK, |
| 450 | src, |
| 451 | MMC_CMD_ADTC | MMC_RSP_R1 | |
| 452 | MMC_DATA_READ, MMC_BLOCK_SIZE, lump, 1, |
| 453 | (u16 *)&response[0]); |
| 454 | break; |
| 455 | default: /* byte addressing */ |
| 456 | resp = mmc_cmd(MMC_READ_MULTIPLE_BLOCK, src * MMC_BLOCK_SIZE, |
| 457 | MMC_CMD_ADTC | MMC_RSP_R1 | MMC_DATA_READ, |
| 458 | MMC_BLOCK_SIZE, lump, 1, |
| 459 | (u16 *)&response[0]); |
| 460 | break; |
| 461 | } |
| 462 | |
| 463 | if (resp) |
| 464 | return resp; |
| 465 | |
| 466 | /* final speed 16MHz */ |
| 467 | glamo_reg_write((glamo_reg_read(GLAMO_REG_CLOCK_GEN8) & |
| 468 | 0xff00) | 2, GLAMO_REG_CLOCK_GEN8); |
| 469 | |
| 470 | |
| 471 | do_pio_read((u16 *)dst, lump * MMC_BLOCK_SIZE >> 1); |
| 472 | |
| 473 | if (size) |
| 474 | size -= lump; |
| 475 | |
| 476 | dst += lump * MMC_BLOCK_SIZE; |
| 477 | src += lump; |
| 478 | |
| 479 | resp = mmc_cmd(MMC_STOP_TRANSMISSION, 0, |
| 480 | MMC_CMD_AC | MMC_RSP_R1B, 0, 0, 0, |
| 481 | (u16 *)&response[0]); |
| 482 | if (resp) |
| 483 | return resp; |
| 484 | |
| 485 | } |
| 486 | |
| 487 | return size_original; |
| 488 | } |
| 489 | |
| 490 | int mmc_write(u8 *src, unsigned long dst, int size) |
| 491 | { |
| 492 | int resp; |
| 493 | u8 response[16]; |
| 494 | int size_original = size; |
| 495 | |
| 496 | if ((!size) || (size & (MMC_BLOCK_SIZE - 1))) { |
| 497 | puts("Bad size 0x"); |
| 498 | print32(size); |
| 499 | return 0; |
| 500 | } |
| 501 | |
| 502 | if (((int)dst) & 1) { |
| 503 | puts("Bad align on dst\n"); |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | resp = mmc_cmd(MMC_SET_BLOCKLEN, MMC_BLOCK_SIZE, |
| 508 | MMC_CMD_AC | MMC_RSP_R1, 0, 0, 0, |
| 509 | (u16 *)&response[0]); |
| 510 | |
| 511 | while (size) { |
| 512 | do_pio_write((u16 *)src, MMC_BLOCK_SIZE >> 1); |
| 513 | switch (card_type) { |
| 514 | case CARDTYPE_SDHC: /* block addressing */ |
| 515 | resp = mmc_cmd(MMC_WRITE_BLOCK, |
| 516 | dst >> MMC_BLOCK_SIZE_BITS, |
| 517 | MMC_CMD_ADTC | MMC_RSP_R1 | |
| 518 | MMC_DATA_WRITE, |
| 519 | MMC_BLOCK_SIZE, 1, 0, |
| 520 | (u16 *)&response[0]); |
| 521 | break; |
| 522 | default: /* byte addressing */ |
| 523 | resp = mmc_cmd(MMC_WRITE_BLOCK, dst, |
| 524 | MMC_CMD_ADTC | MMC_RSP_R1 | |
| 525 | MMC_DATA_WRITE, |
| 526 | MMC_BLOCK_SIZE, 1, 0, |
| 527 | (u16 *)&response[0]); |
| 528 | break; |
| 529 | } |
| 530 | if (size >= MMC_BLOCK_SIZE) |
| 531 | size -= MMC_BLOCK_SIZE; |
| 532 | else |
| 533 | size = 0; |
| 534 | dst += MMC_BLOCK_SIZE; |
| 535 | src += MMC_BLOCK_SIZE; |
| 536 | } |
| 537 | return size_original; |
| 538 | } |
| 539 | |
| 540 | #if 0 |
| 541 | static void print_mmc_cid(mmc_cid_t *cid) |
| 542 | { |
| 543 | puts("MMC found. Card desciption is:\n"); |
| 544 | puts("Manufacturer ID = "); |
| 545 | print8(cid->id[0]); |
| 546 | print8(cid->id[1]); |
| 547 | print8(cid->id[2]); |
| 548 | /* |
| 549 | puts("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev); |
| 550 | cid->hwrev = cid->fwrev = 0; |
| 551 | puts("Product Name = %s\n",cid->name); |
| 552 | printf("Serial Number = %02x%02x%02x\n", |
| 553 | cid->sn[0], cid->sn[1], cid->sn[2]); |
| 554 | printf("Month = %d\n",cid->month); |
| 555 | printf("Year = %d\n",1997 + cid->year); |
| 556 | */ |
| 557 | } |
| 558 | #endif |
| 559 | static void print_sd_cid(const struct sd_cid *cid) |
| 560 | { |
| 561 | puts(" Card Type: "); |
| 562 | switch (card_type) { |
| 563 | case CARDTYPE_NONE: |
| 564 | puts("(None) / "); |
| 565 | break; |
| 566 | case CARDTYPE_MMC: |
| 567 | puts("MMC / "); |
| 568 | break; |
| 569 | case CARDTYPE_SD: |
| 570 | puts("SD / "); |
| 571 | break; |
| 572 | case CARDTYPE_SD20: |
| 573 | puts("SD 2.0 / "); |
| 574 | break; |
| 575 | case CARDTYPE_SDHC: |
| 576 | puts("SD 2.0 SDHC / "); |
| 577 | break; |
| 578 | } |
| 579 | |
| 580 | puts("Mfr: 0x"); |
| 581 | print8(cid->mid); |
| 582 | puts(", OEM \""); |
| 583 | this_board->putc(cid->oid_0); |
| 584 | this_board->putc(cid->oid_1); |
| 585 | puts("\" / "); |
| 586 | |
| 587 | this_board->putc(cid->pnm_0); |
| 588 | this_board->putc(cid->pnm_1); |
| 589 | this_board->putc(cid->pnm_2); |
| 590 | this_board->putc(cid->pnm_3); |
| 591 | this_board->putc(cid->pnm_4); |
| 592 | puts("\", rev "); |
| 593 | printdec(cid->prv >> 4); |
| 594 | puts("."); |
| 595 | printdec(cid->prv & 15); |
| 596 | puts(" / s/n: "); |
| 597 | printdec(cid->psn_0 << 24 | cid->psn_1 << 16 | cid->psn_2 << 8 | |
| 598 | cid->psn_3); |
| 599 | puts(" / date: "); |
| 600 | printdec(cid->mdt_1 & 15); |
| 601 | puts("/"); |
| 602 | printdec(2000 + ((cid->mdt_0 & 15) << 4)+((cid->mdt_1 & 0xf0) >> 4)); |
| 603 | puts("\n"); |
| 604 | |
| 605 | /* printf("CRC: 0x%02x, b0 = %d\n", |
| 606 | cid->crc >> 1, cid->crc & 1); */ |
| 607 | } |
| 608 | |
| 609 | |
| 610 | int mmc_init(int verbose) |
| 611 | { |
| 612 | int retries = 1000, rc = -1; |
| 613 | int resp; |
| 614 | u8 response[16]; |
| 615 | // mmc_cid_t *mmc_cid = (mmc_cid_t *)response; |
| 616 | struct sd_cid *sd_cid = (struct sd_cid *)response; |
| 617 | u32 hcs = 0; |
| 618 | |
| 619 | card_type = CARDTYPE_NONE; |
| 620 | |
| 621 | /* enable engine */ |
| 622 | |
| 623 | glamo_reg_write(GLAMO_CLOCK_MMC_EN_M9CLK | |
| 624 | GLAMO_CLOCK_MMC_EN_TCLK | |
| 625 | GLAMO_CLOCK_MMC_DG_M9CLK | |
| 626 | GLAMO_CLOCK_MMC_DG_TCLK, GLAMO_REG_CLOCK_MMC); |
| 627 | glamo_reg_write(glamo_reg_read(GLAMO_REG_HOSTBUS(2)) | |
| 628 | GLAMO_HOSTBUS2_MMIO_EN_MMC, GLAMO_REG_HOSTBUS(2)); |
| 629 | |
| 630 | /* controller reset */ |
| 631 | |
| 632 | glamo_mci_reset(); |
| 633 | |
| 634 | /* start the clock -- slowly (50MHz / 250 == 195kHz */ |
| 635 | |
| 636 | glamo_reg_write((glamo_reg_read(GLAMO_REG_CLOCK_GEN8) & 0xff00) | 250, |
| 637 | GLAMO_REG_CLOCK_GEN8); |
| 638 | |
| 639 | /* enable clock to divider input */ |
| 640 | |
| 641 | glamo_reg_write(glamo_reg_read( |
| 642 | GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK, |
| 643 | GLAMO_REG_CLOCK_GEN5_1); |
| 644 | |
| 645 | udelay(100000); |
| 646 | |
| 647 | /* set bus width to 1 */ |
| 648 | |
| 649 | glamo_reg_write((glamo_reg_read(GLAMO_REGOFS_MMC + |
| 650 | GLAMO_REG_MMC_BASIC) & |
| 651 | (~GLAMO_BASIC_MMC_EN_4BIT_DATA)), |
| 652 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_BASIC); |
| 653 | |
| 654 | /* reset */ |
| 655 | |
| 656 | resp = mmc_cmd(MMC_GO_IDLE_STATE, 0, MMC_CMD_BCR, 0, 0, 0, |
| 657 | (u16 *)&response[0]); |
| 658 | |
| 659 | udelay(100000); |
| 660 | udelay(100000); |
| 661 | udelay(100000); |
| 662 | udelay(100000); |
| 663 | |
| 664 | /* SDHC card? */ |
| 665 | |
| 666 | resp = mmc_cmd(SD_SEND_IF_COND, 0x000001aa, |
| 667 | MMC_CMD_BCR | MMC_RSP_R7, 0, 0, 0, |
| 668 | (u16 *)&response[0]); |
| 669 | if (!resp && (response[0] == 0xaa)) { |
| 670 | card_type = CARDTYPE_SD20; /* 2.0 SD, may not be SDHC */ |
| 671 | hcs = 0x40000000; |
| 672 | } |
| 673 | |
| 674 | /* Well, either way let's say hello in SD card protocol */ |
| 675 | |
| 676 | while (retries--) { |
| 677 | |
| 678 | udelay(10000); |
| 679 | |
| 680 | resp = mmc_cmd(MMC_APP_CMD, 0x00000000, |
| 681 | MMC_CMD_AC | MMC_RSP_R1, 0, 0, 0, |
| 682 | (u16 *)&response[0]); |
| 683 | if (resp) |
| 684 | continue; |
| 685 | resp = mmc_cmd(SD_APP_OP_COND, hcs | 0x00300000, |
| 686 | MMC_CMD_BCR | MMC_RSP_R3, 0, 0, 0, |
| 687 | (u16 *)&response[0]); |
| 688 | if (resp) |
| 689 | continue; |
| 690 | |
| 691 | if (response[3] & (1 << 6)) { /* asserts block addressing */ |
| 692 | retries = -2; |
| 693 | card_type = CARDTYPE_SDHC; |
| 694 | } |
| 695 | if (response[3] & (1 << 7)) { /* not busy */ |
| 696 | if (card_type == CARDTYPE_NONE) |
| 697 | card_type = CARDTYPE_SD; |
| 698 | retries = -2; |
| 699 | break; |
| 700 | } |
| 701 | } |
| 702 | if (retries == -1) { |
| 703 | puts("no response\n"); |
| 704 | return 1; |
| 705 | } |
| 706 | |
| 707 | if (card_type == CARDTYPE_NONE) { |
| 708 | retries = 10; |
| 709 | puts("failed to detect SD Card, trying MMC\n"); |
| 710 | do { |
| 711 | resp = mmc_cmd(MMC_SEND_OP_COND, 0x00ffc000, |
| 712 | MMC_CMD_BCR | MMC_RSP_R3, 0, 0, 0, |
| 713 | (u16 *)&response[0]); |
| 714 | udelay(50); |
| 715 | } while (retries-- && !(response[3] & 0x80)); |
| 716 | if (retries >= 0) |
| 717 | card_type = CARDTYPE_MMC; |
| 718 | else |
| 719 | return 1; |
| 720 | } |
| 721 | |
| 722 | /* fill in device description */ |
| 723 | #if 0 |
| 724 | mmc_dev.if_type = IF_TYPE_MMC; |
| 725 | mmc_dev.part_type = PART_TYPE_DOS; |
| 726 | mmc_dev.dev = 0; |
| 727 | mmc_dev.lun = 0; |
| 728 | mmc_dev.type = 0; |
| 729 | mmc_dev.removable = 0; |
| 730 | mmc_dev.block_read = mmc_bread; |
| 731 | mmc_dev.blksz = 512; |
| 732 | mmc_dev.lba = 1 << 16; /* 64K x 512 blocks = 32MB default */ |
| 733 | #endif |
| 734 | /* try to get card id */ |
| 735 | resp = mmc_cmd(MMC_ALL_SEND_CID, hcs, |
| 736 | MMC_CMD_BCR | MMC_RSP_R2, 0, 0, 0, |
| 737 | (u16 *)&response[0]); |
| 738 | if (resp) |
| 739 | return 1; |
| 740 | |
| 741 | switch (card_type) { |
| 742 | case CARDTYPE_MMC: |
| 743 | /* TODO configure mmc driver depending on card |
| 744 | attributes */ |
| 745 | #if 0 |
| 746 | if (verbose) |
| 747 | print_mmc_cid(mmc_cid); |
| 748 | sprintf((char *) mmc_dev.vendor, |
| 749 | "Man %02x%02x%02x Snr %02x%02x%02x", |
| 750 | mmc_cid->id[0], mmc_cid->id[1], mmc_cid->id[2], |
| 751 | mmc_cid->sn[0], mmc_cid->sn[1], mmc_cid->sn[2]); |
| 752 | sprintf((char *) mmc_dev.product, "%s", mmc_cid->name); |
| 753 | sprintf((char *) mmc_dev.revision, "%x %x", |
| 754 | mmc_cid->hwrev, mmc_cid->fwrev); |
| 755 | #endif |
| 756 | /* MMC exists, get CSD too */ |
| 757 | resp = mmc_cmd(MMC_SET_RELATIVE_ADDR, MMC_DEFAULT_RCA, |
| 758 | MMC_CMD_AC | MMC_RSP_R1, 0, 0, 0, |
| 759 | (u16 *)&response[0]); |
| 760 | break; |
| 761 | |
| 762 | case CARDTYPE_SD: |
| 763 | case CARDTYPE_SD20: |
| 764 | case CARDTYPE_SDHC: |
| 765 | |
| 766 | if (verbose) |
| 767 | print_sd_cid(sd_cid); |
| 768 | #if 0 |
| 769 | sprintf((char *) mmc_dev.vendor, |
| 770 | "Man %02 OEM %c%c \"%c%c%c%c%c\"", |
| 771 | sd_cid->mid, sd_cid->oid_0, sd_cid->oid_1, |
| 772 | sd_cid->pnm_0, sd_cid->pnm_1, sd_cid->pnm_2, |
| 773 | sd_cid->pnm_3, sd_cid->pnm_4); |
| 774 | sprintf((char *) mmc_dev.product, "%d", |
| 775 | sd_cid->psn_0 << 24 | sd_cid->psn_1 << 16 | |
| 776 | sd_cid->psn_2 << 8 | sd_cid->psn_3); |
| 777 | sprintf((char *) mmc_dev.revision, "%d.%d", |
| 778 | sd_cid->prv >> 4, sd_cid->prv & 15); |
| 779 | #endif |
| 780 | resp = mmc_cmd(SD_SEND_RELATIVE_ADDR, MMC_DEFAULT_RCA, |
| 781 | MMC_CMD_BCR | MMC_RSP_R6, 0, 0, 0, |
| 782 | (u16 *)&response[0]); |
| 783 | rca = response[2] | (response[3] << 8); |
| 784 | break; |
| 785 | |
| 786 | default: |
| 787 | return 1; |
| 788 | } |
| 789 | |
| 790 | /* grab the CSD */ |
| 791 | |
| 792 | resp = mmc_cmd(MMC_SEND_CSD, rca << 16, |
| 793 | MMC_CMD_AC | MMC_RSP_R2, 0, 0, 0, |
| 794 | (u16 *)&response[0]); |
| 795 | if (!resp) { |
| 796 | mmc_csd_t *csd = (mmc_csd_t *)response; |
| 797 | |
| 798 | // memcpy(&mmc_csd, csd, sizeof(csd)); |
| 799 | rc = 0; |
| 800 | mmc_ready = 1; |
| 801 | /* FIXME add verbose printout for csd */ |
| 802 | /* printf("READ_BL_LEN=%u, C_SIZE_MULT=%u, C_SIZE=%u\n", |
| 803 | csd->read_bl_len, csd->c_size_mult1, |
| 804 | csd->c_size); */ |
| 805 | // mmc_dev.blksz = 512; |
| 806 | // mmc_dev.lba = (((unsigned long)1 << csd->c_size_mult1) * |
| 807 | // (unsigned long)csd->c_size) >> 9; |
| 808 | |
| 809 | switch (card_type) { |
| 810 | case CARDTYPE_SDHC: |
| 811 | puts(" SDHC size: "); |
| 812 | printdec((UNSTUFF_BITS(((u32 *)&response[0]), 48, 22) |
| 813 | + 1) / 2); |
| 814 | break; |
| 815 | default: |
| 816 | puts(" MMC/SD size: "); |
| 817 | printdec((((unsigned long)1 << csd->c_size_mult1) * |
| 818 | (unsigned long)(csd->c_size)) >> 10); |
| 819 | } |
| 820 | puts(" MiB\n"); |
| 821 | } |
| 822 | |
| 823 | resp = mmc_cmd(MMC_SELECT_CARD, rca<<16, MMC_CMD_AC | MMC_RSP_R1, |
| 824 | 0, 0, 0, (u16 *)&response[0]); |
| 825 | if (resp) |
| 826 | return 1; |
| 827 | |
| 828 | #ifdef CONFIG_MMC_WIDE |
| 829 | /* yay 4-bit! */ |
| 830 | if (card_type == CARDTYPE_SD || card_type == CARDTYPE_SDHC) { |
| 831 | resp = mmc_cmd(MMC_APP_CMD, rca<<16, MMC_CMD_AC | MMC_RSP_R1, |
| 832 | 0, 0, 0, (u16 *)&response[0]); |
| 833 | resp = mmc_cmd(MMC_SWITCH, 0x02, MMC_CMD_AC | MMC_RSP_R1B, |
| 834 | 0, 0, 0, (u16 *)&response[0]); |
| 835 | wide = 1; |
| 836 | glamo_reg_write(glamo_reg_read(GLAMO_REGOFS_MMC + |
| 837 | GLAMO_REG_MMC_BASIC) | GLAMO_BASIC_MMC_EN_4BIT_DATA, |
| 838 | GLAMO_REGOFS_MMC + GLAMO_REG_MMC_BASIC); |
| 839 | } |
| 840 | #endif |
| 841 | |
| 842 | /* set the clock to slow until first bulk completes (for slow SDHC) */ |
| 843 | |
| 844 | glamo_reg_write((glamo_reg_read(GLAMO_REG_CLOCK_GEN8) & 0xff00) | 32, |
| 845 | GLAMO_REG_CLOCK_GEN8); |
| 846 | |
| 847 | return rc; |
| 848 | } |
| 849 | |
| 850 | |
| 851 | |
| 852 | |
