| 1 | /* |
| 2 | * linux/include/asm-arm/io.h |
| 3 | * |
| 4 | * Copyright (C) 1996-2000 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Modifications: |
| 11 | * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both |
| 12 | * constant addresses and variable addresses. |
| 13 | * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture |
| 14 | * specific IO header files. |
| 15 | * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. |
| 16 | * 04-Apr-1999 PJB Added check_signature. |
| 17 | * 12-Dec-1999 RMK More cleanups |
| 18 | * 18-Jun-2000 RMK Removed virt_to_* and friends definitions |
| 19 | */ |
| 20 | #ifndef __ASM_ARM_IO_H |
| 21 | #define __ASM_ARM_IO_H |
| 22 | |
| 23 | #ifdef __KERNEL__ |
| 24 | |
| 25 | #include <linux/types.h> |
| 26 | #include <asm/byteorder.h> |
| 27 | #include <asm/memory.h> |
| 28 | #if 0 /* XXX###XXX */ |
| 29 | #include <asm/arch/hardware.h> |
| 30 | #endif /* XXX###XXX */ |
| 31 | |
| 32 | static inline void sync(void) |
| 33 | { |
| 34 | } |
| 35 | |
| 36 | /* |
| 37 | * Given a physical address and a length, return a virtual address |
| 38 | * that can be used to access the memory range with the caching |
| 39 | * properties specified by "flags". |
| 40 | */ |
| 41 | typedef unsigned long phys_addr_t; |
| 42 | |
| 43 | #define MAP_NOCACHE (0) |
| 44 | #define MAP_WRCOMBINE (0) |
| 45 | #define MAP_WRBACK (0) |
| 46 | #define MAP_WRTHROUGH (0) |
| 47 | |
| 48 | static inline void * |
| 49 | map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) |
| 50 | { |
| 51 | return (void *)paddr; |
| 52 | } |
| 53 | |
| 54 | /* |
| 55 | * Take down a mapping set up by map_physmem(). |
| 56 | */ |
| 57 | static inline void unmap_physmem(void *vaddr, unsigned long flags) |
| 58 | { |
| 59 | |
| 60 | } |
| 61 | |
| 62 | /* |
| 63 | * Generic virtual read/write. Note that we don't support half-word |
| 64 | * read/writes. We define __arch_*[bl] here, and leave __arch_*w |
| 65 | * to the architecture specific code. |
| 66 | */ |
| 67 | #define __arch_getb(a) (*(volatile unsigned char *)(a)) |
| 68 | #define __arch_getw(a) (*(volatile unsigned short *)(a)) |
| 69 | #define __arch_getl(a) (*(volatile unsigned int *)(a)) |
| 70 | |
| 71 | #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) |
| 72 | #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) |
| 73 | #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) |
| 74 | |
| 75 | extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); |
| 76 | extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); |
| 77 | extern void __raw_writesl(unsigned int addr, const void *data, int longlen); |
| 78 | |
| 79 | extern void __raw_readsb(unsigned int addr, void *data, int bytelen); |
| 80 | extern void __raw_readsw(unsigned int addr, void *data, int wordlen); |
| 81 | extern void __raw_readsl(unsigned int addr, void *data, int longlen); |
| 82 | |
| 83 | #define __raw_writeb(v,a) __arch_putb(v,a) |
| 84 | #define __raw_writew(v,a) __arch_putw(v,a) |
| 85 | #define __raw_writel(v,a) __arch_putl(v,a) |
| 86 | |
| 87 | #define __raw_readb(a) __arch_getb(a) |
| 88 | #define __raw_readw(a) __arch_getw(a) |
| 89 | #define __raw_readl(a) __arch_getl(a) |
| 90 | |
| 91 | #define writeb(v,a) __arch_putb(v,a) |
| 92 | #define writew(v,a) __arch_putw(v,a) |
| 93 | #define writel(v,a) __arch_putl(v,a) |
| 94 | |
| 95 | #define readb(a) __arch_getb(a) |
| 96 | #define readw(a) __arch_getw(a) |
| 97 | #define readl(a) __arch_getl(a) |
| 98 | |
| 99 | /* |
| 100 | * The compiler seems to be incapable of optimising constants |
| 101 | * properly. Spell it out to the compiler in some cases. |
| 102 | * These are only valid for small values of "off" (< 1<<12) |
| 103 | */ |
| 104 | #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) |
| 105 | #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) |
| 106 | #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) |
| 107 | |
| 108 | #define __raw_base_readb(base,off) __arch_base_getb(base,off) |
| 109 | #define __raw_base_readw(base,off) __arch_base_getw(base,off) |
| 110 | #define __raw_base_readl(base,off) __arch_base_getl(base,off) |
| 111 | |
| 112 | /* |
| 113 | * Now, pick up the machine-defined IO definitions |
| 114 | */ |
| 115 | #if 0 /* XXX###XXX */ |
| 116 | #include <asm/arch/io.h> |
| 117 | #endif /* XXX###XXX */ |
| 118 | |
| 119 | /* |
| 120 | * IO port access primitives |
| 121 | * ------------------------- |
| 122 | * |
| 123 | * The ARM doesn't have special IO access instructions; all IO is memory |
| 124 | * mapped. Note that these are defined to perform little endian accesses |
| 125 | * only. Their primary purpose is to access PCI and ISA peripherals. |
| 126 | * |
| 127 | * Note that for a big endian machine, this implies that the following |
| 128 | * big endian mode connectivity is in place, as described by numerious |
| 129 | * ARM documents: |
| 130 | * |
| 131 | * PCI: D0-D7 D8-D15 D16-D23 D24-D31 |
| 132 | * ARM: D24-D31 D16-D23 D8-D15 D0-D7 |
| 133 | * |
| 134 | * The machine specific io.h include defines __io to translate an "IO" |
| 135 | * address to a memory address. |
| 136 | * |
| 137 | * Note that we prevent GCC re-ordering or caching values in expressions |
| 138 | * by introducing sequence points into the in*() definitions. Note that |
| 139 | * __raw_* do not guarantee this behaviour. |
| 140 | * |
| 141 | * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. |
| 142 | */ |
| 143 | #ifdef __io |
| 144 | #define outb(v,p) __raw_writeb(v,__io(p)) |
| 145 | #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) |
| 146 | #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p)) |
| 147 | |
| 148 | #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) |
| 149 | #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) |
| 150 | #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) |
| 151 | |
| 152 | #define outsb(p,d,l) __raw_writesb(__io(p),d,l) |
| 153 | #define outsw(p,d,l) __raw_writesw(__io(p),d,l) |
| 154 | #define outsl(p,d,l) __raw_writesl(__io(p),d,l) |
| 155 | |
| 156 | #define insb(p,d,l) __raw_readsb(__io(p),d,l) |
| 157 | #define insw(p,d,l) __raw_readsw(__io(p),d,l) |
| 158 | #define insl(p,d,l) __raw_readsl(__io(p),d,l) |
| 159 | #endif |
| 160 | |
| 161 | #define outb_p(val,port) outb((val),(port)) |
| 162 | #define outw_p(val,port) outw((val),(port)) |
| 163 | #define outl_p(val,port) outl((val),(port)) |
| 164 | #define inb_p(port) inb((port)) |
| 165 | #define inw_p(port) inw((port)) |
| 166 | #define inl_p(port) inl((port)) |
| 167 | |
| 168 | #define outsb_p(port,from,len) outsb(port,from,len) |
| 169 | #define outsw_p(port,from,len) outsw(port,from,len) |
| 170 | #define outsl_p(port,from,len) outsl(port,from,len) |
| 171 | #define insb_p(port,to,len) insb(port,to,len) |
| 172 | #define insw_p(port,to,len) insw(port,to,len) |
| 173 | #define insl_p(port,to,len) insl(port,to,len) |
| 174 | |
| 175 | /* |
| 176 | * ioremap and friends. |
| 177 | * |
| 178 | * ioremap takes a PCI memory address, as specified in |
| 179 | * linux/Documentation/IO-mapping.txt. If you want a |
| 180 | * physical address, use __ioremap instead. |
| 181 | */ |
| 182 | extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); |
| 183 | extern void __iounmap(void *addr); |
| 184 | |
| 185 | /* |
| 186 | * Generic ioremap support. |
| 187 | * |
| 188 | * Define: |
| 189 | * iomem_valid_addr(off,size) |
| 190 | * iomem_to_phys(off) |
| 191 | */ |
| 192 | #ifdef iomem_valid_addr |
| 193 | #define __arch_ioremap(off,sz,nocache) \ |
| 194 | ({ \ |
| 195 | unsigned long _off = (off), _size = (sz); \ |
| 196 | void *_ret = (void *)0; \ |
| 197 | if (iomem_valid_addr(_off, _size)) \ |
| 198 | _ret = __ioremap(iomem_to_phys(_off),_size,0); \ |
| 199 | _ret; \ |
| 200 | }) |
| 201 | |
| 202 | #define __arch_iounmap __iounmap |
| 203 | #endif |
| 204 | |
| 205 | #define ioremap(off,sz) __arch_ioremap((off),(sz),0) |
| 206 | #define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) |
| 207 | #define iounmap(_addr) __arch_iounmap(_addr) |
| 208 | |
| 209 | /* |
| 210 | * DMA-consistent mapping functions. These allocate/free a region of |
| 211 | * uncached, unwrite-buffered mapped memory space for use with DMA |
| 212 | * devices. This is the "generic" version. The PCI specific version |
| 213 | * is in pci.h |
| 214 | */ |
| 215 | extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); |
| 216 | extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); |
| 217 | extern void consistent_sync(void *vaddr, size_t size, int rw); |
| 218 | |
| 219 | /* |
| 220 | * String version of IO memory access ops: |
| 221 | */ |
| 222 | extern void _memcpy_fromio(void *, unsigned long, size_t); |
| 223 | extern void _memcpy_toio(unsigned long, const void *, size_t); |
| 224 | extern void _memset_io(unsigned long, int, size_t); |
| 225 | |
| 226 | extern void __readwrite_bug(const char *fn); |
| 227 | |
| 228 | /* |
| 229 | * If this architecture has PCI memory IO, then define the read/write |
| 230 | * macros. These should only be used with the cookie passed from |
| 231 | * ioremap. |
| 232 | */ |
| 233 | #ifdef __mem_pci |
| 234 | |
| 235 | #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) |
| 236 | #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) |
| 237 | #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) |
| 238 | |
| 239 | #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) |
| 240 | #define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c)) |
| 241 | #define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c)) |
| 242 | |
| 243 | #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) |
| 244 | #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) |
| 245 | #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) |
| 246 | |
| 247 | #define eth_io_copy_and_sum(s,c,l,b) \ |
| 248 | eth_copy_and_sum((s),__mem_pci(c),(l),(b)) |
| 249 | |
| 250 | static inline int |
| 251 | check_signature(unsigned long io_addr, const unsigned char *signature, |
| 252 | int length) |
| 253 | { |
| 254 | int retval = 0; |
| 255 | do { |
| 256 | if (readb(io_addr) != *signature) |
| 257 | goto out; |
| 258 | io_addr++; |
| 259 | signature++; |
| 260 | length--; |
| 261 | } while (length); |
| 262 | retval = 1; |
| 263 | out: |
| 264 | return retval; |
| 265 | } |
| 266 | |
| 267 | #elif !defined(readb) |
| 268 | |
| 269 | #define readb(addr) (__readwrite_bug("readb"),0) |
| 270 | #define readw(addr) (__readwrite_bug("readw"),0) |
| 271 | #define readl(addr) (__readwrite_bug("readl"),0) |
| 272 | #define writeb(v,addr) __readwrite_bug("writeb") |
| 273 | #define writew(v,addr) __readwrite_bug("writew") |
| 274 | #define writel(v,addr) __readwrite_bug("writel") |
| 275 | |
| 276 | #define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum") |
| 277 | |
| 278 | #define check_signature(io,sig,len) (0) |
| 279 | |
| 280 | #endif /* __mem_pci */ |
| 281 | |
| 282 | /* |
| 283 | * If this architecture has ISA IO, then define the isa_read/isa_write |
| 284 | * macros. |
| 285 | */ |
| 286 | #ifdef __mem_isa |
| 287 | |
| 288 | #define isa_readb(addr) __raw_readb(__mem_isa(addr)) |
| 289 | #define isa_readw(addr) __raw_readw(__mem_isa(addr)) |
| 290 | #define isa_readl(addr) __raw_readl(__mem_isa(addr)) |
| 291 | #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) |
| 292 | #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) |
| 293 | #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) |
| 294 | #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) |
| 295 | #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) |
| 296 | #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) |
| 297 | |
| 298 | #define isa_eth_io_copy_and_sum(a,b,c,d) \ |
| 299 | eth_copy_and_sum((a),__mem_isa(b),(c),(d)) |
| 300 | |
| 301 | static inline int |
| 302 | isa_check_signature(unsigned long io_addr, const unsigned char *signature, |
| 303 | int length) |
| 304 | { |
| 305 | int retval = 0; |
| 306 | do { |
| 307 | if (isa_readb(io_addr) != *signature) |
| 308 | goto out; |
| 309 | io_addr++; |
| 310 | signature++; |
| 311 | length--; |
| 312 | } while (length); |
| 313 | retval = 1; |
| 314 | out: |
| 315 | return retval; |
| 316 | } |
| 317 | |
| 318 | #else /* __mem_isa */ |
| 319 | |
| 320 | #define isa_readb(addr) (__readwrite_bug("isa_readb"),0) |
| 321 | #define isa_readw(addr) (__readwrite_bug("isa_readw"),0) |
| 322 | #define isa_readl(addr) (__readwrite_bug("isa_readl"),0) |
| 323 | #define isa_writeb(val,addr) __readwrite_bug("isa_writeb") |
| 324 | #define isa_writew(val,addr) __readwrite_bug("isa_writew") |
| 325 | #define isa_writel(val,addr) __readwrite_bug("isa_writel") |
| 326 | #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") |
| 327 | #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") |
| 328 | #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") |
| 329 | |
| 330 | #define isa_eth_io_copy_and_sum(a,b,c,d) \ |
| 331 | __readwrite_bug("isa_eth_io_copy_and_sum") |
| 332 | |
| 333 | #define isa_check_signature(io,sig,len) (0) |
| 334 | |
| 335 | #endif /* __mem_isa */ |
| 336 | #endif /* __KERNEL__ */ |
| 337 | #endif /* __ASM_ARM_IO_H */ |
| 338 | |
