| 1 | /************************************************************************** |
| 2 | * * |
| 3 | * PROJECT : MIPS port for uC/OS-II * |
| 4 | * * |
| 5 | * MODULE : SYSDEFS.h * |
| 6 | * * |
| 7 | * AUTHOR : Michael Anburaj * |
| 8 | * URL : http://geocities.com/michaelanburaj/ * |
| 9 | * EMAIL: michaelanburaj@hotmail.com * |
| 10 | * * |
| 11 | * PROCESSOR : MIPS 4Kc (32 bit RISC) - ATLAS board * |
| 12 | * * |
| 13 | * TOOL-CHAIN : SDE & Cygnus * |
| 14 | * * |
| 15 | * DESCRIPTION : * |
| 16 | * System definitions header file. * |
| 17 | * * |
| 18 | **************************************************************************/ |
| 19 | |
| 20 | #ifndef __SYSDEFS_H__ |
| 21 | #define __SYSDEFS_H__ |
| 22 | |
| 23 | |
| 24 | /* ********************************************************************* */ |
| 25 | /* Module configuration */ |
| 26 | |
| 27 | |
| 28 | /* ********************************************************************* */ |
| 29 | /* Interface macro & data definition */ |
| 30 | |
| 31 | #ifdef _ASSEMBLER_ |
| 32 | |
| 33 | /******** ASSEMBLER SPECIFIC DEFINITIONS ********/ |
| 34 | |
| 35 | #ifdef __ghs__ |
| 36 | #define ALIGN(x) .##align (1 << (x)) |
| 37 | #else |
| 38 | #define ALIGN(x) .##align (x) |
| 39 | #endif |
| 40 | |
| 41 | #ifdef __ghs__ |
| 42 | #define SET_MIPS3() |
| 43 | #define SET_MIPS0() |
| 44 | #define SET_PUSH() |
| 45 | #define SET_POP() |
| 46 | #else |
| 47 | #define SET_MIPS3() .##set mips3 |
| 48 | #define SET_MIPS0() .##set mips0 |
| 49 | #define SET_PUSH() .##set push |
| 50 | #define SET_POP() .##set pop |
| 51 | #endif |
| 52 | |
| 53 | /* Different assemblers have different requirements for how to |
| 54 | * indicate that the next section is bss : |
| 55 | * |
| 56 | * Some use : .bss |
| 57 | * Others use : .section bss |
| 58 | * |
| 59 | * We select which to use based on _BSS_OLD_, which may be defined |
| 60 | * in makefile. |
| 61 | */ |
| 62 | #ifdef _BSS_OLD_ |
| 63 | #define BSS .##section bss |
| 64 | #else |
| 65 | #define BSS .##bss |
| 66 | #endif |
| 67 | |
| 68 | #define LEAF(name)\ |
| 69 | .##text;\ |
| 70 | .##globl name;\ |
| 71 | .##ent name;\ |
| 72 | name: |
| 73 | |
| 74 | |
| 75 | #define SLEAF(name)\ |
| 76 | .##text;\ |
| 77 | .##ent name;\ |
| 78 | name: |
| 79 | |
| 80 | |
| 81 | #ifdef __ghs__ |
| 82 | #define END(name)\ |
| 83 | .##end name |
| 84 | #else |
| 85 | #define END(name)\ |
| 86 | .##size name,.-name;\ |
| 87 | .##end name |
| 88 | #endif |
| 89 | |
| 90 | |
| 91 | #define EXTERN(name) |
| 92 | |
| 93 | #else |
| 94 | |
| 95 | #define U64 unsigned long long |
| 96 | #define U32 unsigned int |
| 97 | #define U16 unsigned short |
| 98 | #define U8 unsigned char |
| 99 | #define S64 signed long long |
| 100 | #define S32 int |
| 101 | #define S16 short int |
| 102 | #define S8 signed char |
| 103 | #define bool U8 |
| 104 | |
| 105 | #ifndef _SIZE_T_ |
| 106 | #define _SIZE_T_ |
| 107 | #ifdef __ghs__ |
| 108 | typedef unsigned int size_t; |
| 109 | #else |
| 110 | typedef unsigned long size_t; |
| 111 | #endif |
| 112 | #endif |
| 113 | |
| 114 | /* Sets the result on bPort */ |
| 115 | #define BIT_SET(bPort,bBitMask) (bPort |= bBitMask) |
| 116 | #define BIT_CLR(bPort,bBitMask) (bPort &= ~bBitMask) |
| 117 | |
| 118 | /* Returns the result */ |
| 119 | #define GET_BIT_SET(bPort,bBitMask) (bPort | bBitMask) |
| 120 | #define GET_BIT_CLR(bPort,bBitMask) (bPort & ~bBitMask) |
| 121 | |
| 122 | /* Returns 0 if the condition is False & a non-zero value if it is True */ |
| 123 | #define TEST_BIT_SET(bPort,bBitMask) (bPort & bBitMask) |
| 124 | #define TEST_BIT_CLR(bPort,bBitMask) ((~bPort) & bBitMask) |
| 125 | |
| 126 | /* Split union definitions */ |
| 127 | typedef union tunSU16 |
| 128 | { |
| 129 | U16 hwHW; |
| 130 | struct tst2U8 |
| 131 | { |
| 132 | U8 bB0; |
| 133 | U8 bB1; |
| 134 | }st2U8; |
| 135 | }tunSU16; |
| 136 | |
| 137 | typedef union tunSU32 |
| 138 | { |
| 139 | U32 wW; |
| 140 | struct tst2U16 |
| 141 | { |
| 142 | U16 hwHW0; |
| 143 | U16 hwHW1; |
| 144 | }st2U16; |
| 145 | struct tst4U8 |
| 146 | { |
| 147 | U8 bB0; |
| 148 | U8 bB1; |
| 149 | U8 bB2; |
| 150 | U8 bB3; |
| 151 | }st4U8; |
| 152 | }tunSU32; |
| 153 | |
| 154 | #endif /* #ifdef _ASSEMBLER_ */ |
| 155 | |
| 156 | |
| 157 | /******** DEFINITIONS FOR BOTH ASSEMBLER AND C ********/ |
| 158 | |
| 159 | |
| 160 | #define NO_ERR 0x00000000 /* operation completed successfully */ |
| 161 | #define ERR 0xffffffff /* operation completed not successfully */ |
| 162 | |
| 163 | #define False 0 |
| 164 | #define True !False |
| 165 | |
| 166 | #define NULL ((void *)0) |
| 167 | #define MIN(x,y) ((x) < (y) ? (x) : (y)) |
| 168 | #define MAX(x,y) ((x) > (y) ? (x) : (y)) |
| 169 | |
| 170 | #define MAXUINT(w) (\ |
| 171 | ((w) == sizeof(U8)) ? 0xFFU :\ |
| 172 | ((w) == sizeof(U16)) ? 0xFFFFU :\ |
| 173 | ((w) == sizeof(U32)) ? 0xFFFFFFFFU : 0\ |
| 174 | ) |
| 175 | |
| 176 | #define MAXINT(w) (\ |
| 177 | ((w) == sizeof(S8)) ? 0x7F :\ |
| 178 | ((w) == sizeof(S16)) ? 0x7FFF :\ |
| 179 | ((w) == sizeof(S32)) ? 0x7FFFFFFF : 0\ |
| 180 | ) |
| 181 | |
| 182 | #define MSK(n) ((1 << (n)) - 1) |
| 183 | |
| 184 | #define KUSEG_MSK 0x80000000 |
| 185 | #define KSEG_MSK 0xE0000000 |
| 186 | #define KUSEGBASE 0x00000000 |
| 187 | #define KSEG0BASE 0x80000000 |
| 188 | #define KSEG1BASE 0xA0000000 |
| 189 | #define KSSEGBASE 0xC0000000 |
| 190 | #define KSEG3BASE 0xE0000000 |
| 191 | |
| 192 | /* Below macros perform the following functions : |
| 193 | * |
| 194 | * KSEG0 : Converts KSEG0/1 or physical addr (below 0.5GB) to KSEG0. |
| 195 | * KSEG1 : Converts KSEG0/1 or physical addr (below 0.5GB) to KSEG1. |
| 196 | * PHYS : Converts KSEG0/1 or physical addr (below 0.5GB) to physical address. |
| 197 | * KSSEG : Not relevant for converting, but used for determining range. |
| 198 | * KSEG3 : Not relevant for converting, but used for determining range. |
| 199 | * KUSEG : Not relevant for converting, but used for determining range. |
| 200 | * KSEG0A : Same as KSEG0 but operates on register rather than constant. |
| 201 | * KSEG1A : Same as KSEG1 but operates on register rather than constant. |
| 202 | * PHYSA : Same as PHYS but operates on register rather than constant. |
| 203 | * CACHED : Alias for KSEG0 macro . |
| 204 | * (Note that KSEG0 cache attribute is determined by K0 |
| 205 | * field of Config register, but this is typically cached). |
| 206 | * UNCACHED : Alias for KSEG1 macro . |
| 207 | */ |
| 208 | #ifdef _ASSEMBLER_ |
| 209 | #define KSEG0(addr) (((addr) & ~KSEG_MSK) | KSEG0BASE) |
| 210 | #define KSEG1(addr) (((addr) & ~KSEG_MSK) | KSEG1BASE) |
| 211 | #define KSSEG(addr) (((addr) & ~KSEG_MSK) | KSSEGBASE) |
| 212 | #define KSEG3(addr) (((addr) & ~KSEG_MSK) | KSEG3BASE) |
| 213 | #define KUSEG(addr) (((addr) & ~KUSEG_MSK) | KUSEGBASE) |
| 214 | #define PHYS(addr) ( (addr) & ~KSEG_MSK) |
| 215 | #define KSEG0A(reg) and reg, ~KSEG_MSK; or reg, KSEG0BASE |
| 216 | #define KSEG1A(reg) and reg, ~KSEG_MSK; or reg, KSEG1BASE |
| 217 | #define PHYSA(reg) and reg, ~KSEG_MSK |
| 218 | #else |
| 219 | #define KSEG0(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG0BASE) |
| 220 | #define KSEG1(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG1BASE) |
| 221 | #define KSSEG(addr) (((U32)(addr) & ~KSEG_MSK) | KSSEGBASE) |
| 222 | #define KSEG3(addr) (((U32)(addr) & ~KSEG_MSK) | KSEG3BASE) |
| 223 | #define KUSEG(addr) (((U32)(addr) & ~KUSEG_MSK) | KUSEGBASE) |
| 224 | #define PHYS(addr) ((U32)(addr) & ~KSEG_MSK) |
| 225 | #endif |
| 226 | |
| 227 | #define CACHED(addr) KSEG0(addr) |
| 228 | #define UNCACHED(addr) KSEG1(addr) |
| 229 | |
| 230 | |
| 231 | #ifdef _ASSEMBLER_ |
| 232 | /* Macroes to access variables at constant addresses |
| 233 | * Compensates for signed 16 bit displacement |
| 234 | * Typical use: li a0, HIKSEG1(ATLAS_ASCIIWORD) |
| 235 | * sw v1, LO_OFFS(ATLAS_ASCIIWORD)(a0) |
| 236 | */ |
| 237 | #define HIKSEG0(addr) ((KSEG0(addr) + 0x8000) & 0xffff0000) |
| 238 | #define HIKSEG1(addr) ((KSEG1(addr) + 0x8000) & 0xffff0000) |
| 239 | #define HI_PART(addr) (((addr) + 0x8000) & 0xffff0000) |
| 240 | #define LO_OFFS(addr) ((addr) & 0xffff) |
| 241 | #endif |
| 242 | |
| 243 | |
| 244 | /* Most/Least significant 32 bit from 64 bit double word */ |
| 245 | #define HI32(data64) ((U32)(data64 >> 32)) |
| 246 | #define LO32(data64) ((U32)(data64 & 0xFFFFFFFF)) |
| 247 | |
| 248 | #define REG8( addr ) (*(volatile U8 *) (addr)) |
| 249 | #define REG16( addr ) (*(volatile U16 *)(addr)) |
| 250 | #define REG32( addr ) (*(volatile U32 *)(addr)) |
| 251 | #define REG64( addr ) (*(volatile U64 *)(addr)) |
| 252 | |
| 253 | |
| 254 | /* Register field mapping */ |
| 255 | #define REGFIELD(reg, rfld) (((reg) & rfld##_MSK) >> rfld##_SHF) |
| 256 | |
| 257 | /* absolute register address, access */ |
| 258 | #define REGA(addr) REG32(addr) |
| 259 | |
| 260 | /* physical register address, access: base address + offsett */ |
| 261 | #define REGP(base,phys) REG32( (U32)(base) + (phys) ) |
| 262 | |
| 263 | /* relative register address, access: base address + offsett */ |
| 264 | #define REG(base,offs) REG32( (U32)(base) + offs##_##OFS ) |
| 265 | |
| 266 | /* relative register address, access: base address + offsett */ |
| 267 | #define REG_8(base,offs) REG8( (U32)(base) + offs##_##OFS ) |
| 268 | |
| 269 | /* relative register address, access: base address + offsett */ |
| 270 | #define REG_16(base,offs) REG16( (U32)(base) + offs##_##OFS ) |
| 271 | |
| 272 | /* relative register address, access: base address + offsett */ |
| 273 | #define REG_64(base,offs) REG64( (U32)(base) + offs##_##OFS ) |
| 274 | |
| 275 | /************************************** |
| 276 | * Macroes not used by YAMON any more |
| 277 | * (kept for backwards compatibility) |
| 278 | */ |
| 279 | /* register read field */ |
| 280 | #define REGARD(addr,fld) ((REGA(addr) & addr##_##fld##_##MSK) \ |
| 281 | >> addr##_##fld##_##SHF) |
| 282 | |
| 283 | /* register write numeric field value */ |
| 284 | #define REGAWRI(addr,fld,intval) ((REGA(addr) & ~(addr##_##fld##_##MSK))\ |
| 285 | | ((intval) << addr##_##fld##_##SHF)) |
| 286 | |
| 287 | /* register write enumerated field value */ |
| 288 | #define REGAWRE(addr,fld,enumval) ((REGA(addr) & ~(addr##_##fld##_##MSK))\ |
| 289 | | ((addr##_##fld##_##enumval) << addr##_##fld##_##SHF)) |
| 290 | |
| 291 | |
| 292 | /* Examples: |
| 293 | * |
| 294 | * exccode = REGARD(CPU_CAUSE,EXC); |
| 295 | * |
| 296 | * REGA(SDR_CONTROL) = REGAWRI(OSG_CONTROL,TMO,17) |
| 297 | * | REGAWRE(OSG_CONTROL,DTYPE,PC1); |
| 298 | */ |
| 299 | |
| 300 | |
| 301 | /* register read field */ |
| 302 | #define REGRD(base,offs,fld) ((REG(base,offs) & offs##_##fld##_##MSK) \ |
| 303 | >> offs##_##fld##_##SHF) |
| 304 | |
| 305 | /* register write numeric field value */ |
| 306 | #define REGWRI(base,offs,fld,intval)((REG(base,offs)& ~(offs##_##fld##_##MSK))\ |
| 307 | | (((intval) << offs##_##fld##_##SHF) & offs##_##fld##_##MSK)) |
| 308 | |
| 309 | /* register write enumerated field value */ |
| 310 | #define REGWRE(base,offs,fld,enumval)((REG(base,offs) & ~(offs##_##fld##_##MSK))\ |
| 311 | | ((offs##_##fld##_##enumval) << offs##_##fld##_##SHF)) |
| 312 | |
| 313 | |
| 314 | /* physical register read field */ |
| 315 | #define REGPRD(base,phys,fld) ((REGP(base,phys) & phys##_##fld##_##MSK) \ |
| 316 | >> phys##_##fld##_##SHF) |
| 317 | |
| 318 | /* physical register write numeric field value */ |
| 319 | #define REGPWRI(base,phys,fld,intval)((REGP(base,phys)& ~(phys##_##fld##_##MSK))\ |
| 320 | | ((intval) << phys##_##fld##_##SHF)) |
| 321 | |
| 322 | /* physical register write enumerated field value */ |
| 323 | #define REGPWRE(base,phys,fld,enumval)((REGP(base,phys) & ~(phys##_##fld##_##MSK))\ |
| 324 | | ((phys##_##fld##_##enumval) << phys##_##fld##_##SHF)) |
| 325 | /* |
| 326 | * End of macroes not used by YAMON any more |
| 327 | *********************************************/ |
| 328 | |
| 329 | /* Endian related macros */ |
| 330 | |
| 331 | #define SWAP_BYTEADDR32( addr ) ( (addr) ^ 0x3 ) |
| 332 | #define SWAP_U16ADDR32( addr ) ( (addr) ^ 0x2 ) |
| 333 | |
| 334 | /* Set byte address to little endian format */ |
| 335 | #ifdef EL |
| 336 | #define SWAP_BYTEADDR_EL(addr) addr |
| 337 | #else |
| 338 | #define SWAP_BYTEADDR_EL(addr) SWAP_BYTEADDR32( addr ) |
| 339 | #endif |
| 340 | |
| 341 | /* Set byte address to big endian format */ |
| 342 | #ifdef EB |
| 343 | #define SWAP_BYTEADDR_EB(addr) addr |
| 344 | #else |
| 345 | #define SWAP_BYTEADDR_EB(addr) SWAP_BYTEADDR32( addr ) |
| 346 | #endif |
| 347 | |
| 348 | /* Set U16 address to little endian format */ |
| 349 | #ifdef EL |
| 350 | #define SWAP_U16ADDR_EL(addr) addr |
| 351 | #else |
| 352 | #define SWAP_U16ADDR_EL(addr) SWAP_U16ADDR32( addr ) |
| 353 | #endif |
| 354 | |
| 355 | /* Set U16 address to big endian format */ |
| 356 | #ifdef EB |
| 357 | #define SWAP_U16ADDR_EB(addr) addr |
| 358 | #else |
| 359 | #define SWAP_U16ADDR_EB(addr) SWAP_U16ADDR32( addr ) |
| 360 | #endif |
| 361 | |
| 362 | #ifdef EL |
| 363 | #define REGW32LE(addr, data) REG32(addr) = (data) |
| 364 | #define REGR32LE(addr, data) (data) = REG32(addr) |
| 365 | #else |
| 366 | #define REGW32LE(addr, data) REG32(addr) = SWAPEND32(data) |
| 367 | #define REGR32LE(addr, data) (data) = REG32(addr), (data) = SWAPEND32(data) |
| 368 | #endif |
| 369 | |
| 370 | /* Set of 'LE'-macros, convert by BE: */ |
| 371 | #ifdef EL |
| 372 | #define CPU_TO_LE32( value ) (value) |
| 373 | #define LE32_TO_CPU( value ) (value) |
| 374 | |
| 375 | #define CPU_TO_LE16( value ) (value) |
| 376 | #define LE16_TO_CPU( value ) (value) |
| 377 | #else |
| 378 | #define CPU_TO_LE32( value ) ( ( ((U32)value) << 24) | \ |
| 379 | ((0x0000FF00UL & ((U32)value)) << 8) | \ |
| 380 | ((0x00FF0000UL & ((U32)value)) >> 8) | \ |
| 381 | ( ((U32)value) >> 24) ) |
| 382 | #define LE32_TO_CPU( value ) CPU_TO_LE32( value ) |
| 383 | |
| 384 | #define CPU_TO_LE16( value ) ( ((U16)(((U16)value) << 8)) | \ |
| 385 | ((U16)(((U16)value) >> 8)) ) |
| 386 | #define LE16_TO_CPU( value ) CPU_TO_LE16( value ) |
| 387 | #endif |
| 388 | |
| 389 | /* Set of 'BE'-macros, convert by LE: */ |
| 390 | #ifdef EB |
| 391 | #define CPU_TO_BE32( value ) (value) |
| 392 | #define BE32_TO_CPU( value ) (value) |
| 393 | |
| 394 | #define CPU_TO_BE16( value ) (value) |
| 395 | #define BE16_TO_CPU( value ) (value) |
| 396 | #else |
| 397 | #define CPU_TO_BE32( value ) ( ( ((U32)value) << 24) | \ |
| 398 | ((0x0000FF00UL & ((U32)value)) << 8) | \ |
| 399 | ((0x00FF0000UL & ((U32)value)) >> 8) | \ |
| 400 | ( ((U32)value) >> 24) ) |
| 401 | #define BE32_TO_CPU( value ) CPU_TO_BE32( value ) |
| 402 | |
| 403 | #define CPU_TO_BE16( value ) ( ((U16)(((U16)value) << 8)) | \ |
| 404 | ((U16)(((U16)value) >> 8)) ) |
| 405 | #define BE16_TO_CPU( value ) CPU_TO_BE16( value ) |
| 406 | #endif |
| 407 | |
| 408 | |
| 409 | /* Control characters */ |
| 410 | #define CTRL_A ('A'-0x40) |
| 411 | #define CTRL_B ('B'-0x40) |
| 412 | #define CTRL_C ('C'-0x40) |
| 413 | #define CTRL_D ('D'-0x40) |
| 414 | #define CTRL_E ('E'-0x40) |
| 415 | #define CTRL_F ('F'-0x40) |
| 416 | #define CTRL_H ('H'-0x40) |
| 417 | #define CTRL_K ('K'-0x40) |
| 418 | #define CTRL_N ('N'-0x40) |
| 419 | #define CTRL_P ('P'-0x40) |
| 420 | #define CTRL_U ('U'-0x40) |
| 421 | #define BACKSPACE 0x08 |
| 422 | #define DEL 0x7F |
| 423 | #define TAB 0x09 |
| 424 | #define CR 0x0D /* Enter Key */ |
| 425 | #define LF 0x0A |
| 426 | #define ESC 0x1B |
| 427 | #define SP 0x20 |
| 428 | #define CSI 0x9B |
| 429 | |
| 430 | |
| 431 | /* DEF2STR(x) converts #define symbol to string */ |
| 432 | #define DEF2STR1(x) #x |
| 433 | #define DEF2STR(x) DEF2STR1(x) |
| 434 | |
| 435 | |
| 436 | /* ********************************************************************* */ |
| 437 | /* Interface function definition */ |
| 438 | |
| 439 | |
| 440 | /* ********************************************************************* */ |
| 441 | |
| 442 | #endif /*__SYSDEFS_H__*/ |
| 443 | |