Xué video camera

Xué video camera Commit Details

Date:	2010-12-29 00:15:58 (12 years 9 months ago)
Author:	Andrés Calderón
Commit:	6cf11e503985e27bc497ed7b387fc1f2661598e6
Message:	IC charger inserted in the PCB
Files:	xue-rnc/ether.sch (1 diff) xue-rnc/expansion.sch (1 diff) xue-rnc/flash.sch (1 diff) xue-rnc/fpga1.sch (1 diff) xue-rnc/fpga2.sch (1 diff) xue-rnc/psu.sch (5 diffs) xue-rnc/sdram.sch (1 diff) xue-rnc/usb.sch (1 diff) xue-rnc/xue-rnc.brd (296 diffs) xue-rnc/xue-rnc.net (52 diffs) xue-rnc/xue-rnc.pro (2 diffs) xue-rnc/xue-rnc.sch (1 diff)

Change Details

xue-rnc/ether.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/expansion.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/flash.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/fpga1.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/fpga2.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/psu.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03
...	...
580	580	P 9000 2350
581	581	F 0 "R98" V 9080 2350 50 0000 C CNN
582	582	F 1 "R" V 9000 2350 50 0000 C CNN
	583	F 2 "0402" H 9000 2350 60 0001 C CNN
583	584	1 9000 2350
584	585	1 0 0 -1
585	586	$EndComp
...	...
598	599	P 12200 3050
599	600	F 0 "R100" V 12280 3050 50 0000 C CNN
600	601	F 1 "R" V 12200 3050 50 0000 C CNN
	602	F 2 "0402" H 12200 3050 60 0001 C CNN
601	603	1 12200 3050
602	604	1 0 0 -1
603	605	$EndComp
...	...
607	609	P 11900 3050
608	610	F 0 "R99" V 11980 3050 50 0000 C CNN
609	611	F 1 "R" V 11900 3050 50 0000 C CNN
	612	F 2 "0402" H 11900 3050 60 0001 C CNN
610	613	1 11900 3050
611	614	1 0 0 -1
612	615	$EndComp
...	...
673	676	P 10850 2350
674	677	F 0 "U13" H 10850 2350 60 0000 C CNN
675	678	F 1 "BQ2407[0,1]" H 10850 2450 60 0000 C CNN
	679	F 2 "PVQFN-N20" H 10850 2350 60 0001 C CNN
676	680	1 10850 2350
677	681	1 0 0 -1
678	682	$EndComp

xue-rnc/sdram.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/usb.sch
1		EESchema Schematic File Version 2 date Tue 28 Dec 2010 11:57:10 AM COT
	1	EESchema Schematic File Version 2 date Tue 28 Dec 2010 06:06:23 PM COT
2	2	LIBS:power
3	3	LIBS:r_pack2
4	4	LIBS:v0402mhs03

xue-rnc/xue-rnc.brd
1		PCBNEW-BOARD Version 1 date Sun 26 Dec 2010 07:07:39 PM COT
	1	PCBNEW-BOARD Version 1 date Tue 28 Dec 2010 06:09:47 PM COT
2	2
3	3	# Created by Pcbnew(2010-10-01 BZR 2513)-testing
4	4
...	...
6	6	LayerCount 6
7	7	Ly 1FFF801F
8	8	EnabledLayers 13FF801F
9		Links 814
10		NoConn 134
	9	Links 835
	10	NoConn 155
11	11	Di 45633 12844 74358 63523
12	12	Ndraw 6
13	13	Ntrack 4940
14	14	Nzone 0
15	15	BoardThickness 630
16		Nmodule 206
17		Nnets 330
	16	Nmodule 215
	17	Nnets 337
18	18	$EndGENERAL
19	19
20	20	$SHEETDESCR
21	21	Sheet A4 11700 8267
22	22	Title ""
23		Date "27 dec 2010"
	23	Date "28 dec 2010"
24	24	Rev ""
25	25	Comp ""
26	26	Comment1 ""
...	...
115	115	St ~
116	116	$EndEQUIPOT
117	117	$EQUIPOT
118		Na 10 "/ether/ETH_INT"
	118	Na 10 "/ether/ETH_CRS"
119	119	St ~
120	120	$EndEQUIPOT
121	121	$EQUIPOT
122		Na 11 "/ether/ETH_LED0"
	122	Na 11 "/ether/ETH_INT"
123	123	St ~
124	124	$EndEQUIPOT
125	125	$EQUIPOT
126		Na 12 "/ether/ETH_LED1"
	126	Na 12 "/ether/ETH_LED0"
127	127	St ~
128	128	$EndEQUIPOT
129	129	$EQUIPOT
130		Na 13 "/ether/ETH_PLL1.8V"
	130	Na 13 "/ether/ETH_LED1"
131	131	St ~
132	132	$EndEQUIPOT
133	133	$EQUIPOT
134		Na 14 "/ether/ETH_RXD0"
	134	Na 14 "/ether/ETH_MDC"
135	135	St ~
136	136	$EndEQUIPOT
137	137	$EQUIPOT
138		Na 15 "/ether/ETH_RXD2"
	138	Na 15 "/ether/ETH_MDIO"
139	139	St ~
140	140	$EndEQUIPOT
141	141	$EQUIPOT
142		Na 16 "/ether/ETH_RXD3"
	142	Na 16 "/ether/ETH_PLL1.8V"
143	143	St ~
144	144	$EndEQUIPOT
145	145	$EQUIPOT
146		Na 17 "/ether/ETH_TXC"
	146	Na 17 "/ether/ETH_RXC"
147	147	St ~
148	148	$EndEQUIPOT
149	149	$EQUIPOT
150		Na 18 "/ether/ETH_TXD0"
	150	Na 18 "/ether/ETH_RXDV"
151	151	St ~
152	152	$EndEQUIPOT
153	153	$EQUIPOT
154		Na 19 "/ether/ETH_TXD2"
	154	Na 19 "/ether/ETH_TXD0"
155	155	St ~
156	156	$EndEQUIPOT
157	157	$EQUIPOT
...	...
187	187	St ~
188	188	$EndEQUIPOT
189	189	$EQUIPOT
190		Na 28 "/expansion/FPGA_BANK0_IO_12"
	190	Na 28 "/expansion/FPGA_BANK0_IO_10"
191	191	St ~
192	192	$EndEQUIPOT
193	193	$EQUIPOT
194		Na 29 "/expansion/FPGA_BANK0_IO_15"
	194	Na 29 "/expansion/FPGA_BANK0_IO_11"
195	195	St ~
196	196	$EndEQUIPOT
197	197	$EQUIPOT
198		Na 30 "/expansion/FPGA_BANK0_IO_17"
	198	Na 30 "/expansion/FPGA_BANK0_IO_15"
199	199	St ~
200	200	$EndEQUIPOT
201	201	$EQUIPOT
202		Na 31 "/expansion/FPGA_BANK0_IO_18"
	202	Na 31 "/expansion/FPGA_BANK0_IO_17"
203	203	St ~
204	204	$EndEQUIPOT
205	205	$EQUIPOT
206		Na 32 "/expansion/FPGA_BANK0_IO_21"
	206	Na 32 "/expansion/FPGA_BANK0_IO_2"
207	207	St ~
208	208	$EndEQUIPOT
209	209	$EQUIPOT
210		Na 33 "/expansion/FPGA_BANK0_IO_25"
	210	Na 33 "/expansion/FPGA_BANK0_IO_20"
211	211	St ~
212	212	$EndEQUIPOT
213	213	$EQUIPOT
214		Na 34 "/expansion/FPGA_BANK0_IO_27"
	214	Na 34 "/expansion/FPGA_BANK0_IO_21"
215	215	St ~
216	216	$EndEQUIPOT
217	217	$EQUIPOT
218		Na 35 "/expansion/FPGA_BANK0_IO_28"
	218	Na 35 "/expansion/FPGA_BANK0_IO_29"
219	219	St ~
220	220	$EndEQUIPOT
221	221	$EQUIPOT
222		Na 36 "/expansion/FPGA_BANK0_IO_32"
	222	Na 36 "/expansion/FPGA_BANK0_IO_3"
223	223	St ~
224	224	$EndEQUIPOT
225	225	$EQUIPOT
226		Na 37 "/expansion/FPGA_BANK0_IO_36"
	226	Na 37 "/expansion/FPGA_BANK0_IO_32"
227	227	St ~
228	228	$EndEQUIPOT
229	229	$EQUIPOT
230		Na 38 "/expansion/FPGA_BANK0_IO_38"
	230	Na 38 "/expansion/FPGA_BANK0_IO_34"
231	231	St ~
232	232	$EndEQUIPOT
233	233	$EQUIPOT
234		Na 39 "/expansion/FPGA_BANK0_IO_39"
	234	Na 39 "/expansion/FPGA_BANK0_IO_38"
235	235	St ~
236	236	$EndEQUIPOT
237	237	$EQUIPOT
238		Na 40 "/expansion/FPGA_BANK0_IO_43"
	238	Na 40 "/expansion/FPGA_BANK0_IO_39"
239	239	St ~
240	240	$EndEQUIPOT
241	241	$EQUIPOT
242		Na 41 "/expansion/FPGA_BANK0_IO_46"
	242	Na 41 "/expansion/FPGA_BANK0_IO_40"
243	243	St ~
244	244	$EndEQUIPOT
245	245	$EQUIPOT
246		Na 42 "/expansion/FPGA_BANK0_IO_49"
	246	Na 42 "/expansion/FPGA_BANK0_IO_43"
247	247	St ~
248	248	$EndEQUIPOT
249	249	$EQUIPOT
250		Na 43 "/expansion/FPGA_BANK0_IO_5"
	250	Na 43 "/expansion/FPGA_BANK0_IO_46"
251	251	St ~
252	252	$EndEQUIPOT
253	253	$EQUIPOT
254		Na 44 "/expansion/FPGA_BANK0_IO_50"
	254	Na 44 "/expansion/FPGA_BANK0_IO_47"
255	255	St ~
256	256	$EndEQUIPOT
257	257	$EQUIPOT
258		Na 45 "/expansion/FPGA_BANK0_IO_52"
	258	Na 45 "/expansion/FPGA_BANK0_IO_5"
259	259	St ~
260	260	$EndEQUIPOT
261	261	$EQUIPOT
262		Na 46 "/expansion/FPGA_BANK0_IO_53"
	262	Na 46 "/expansion/FPGA_BANK0_IO_50"
263	263	St ~
264	264	$EndEQUIPOT
265	265	$EQUIPOT
...	...
267	267	St ~
268	268	$EndEQUIPOT
269	269	$EQUIPOT
270		Na 48 "/expansion/FPGA_BANK0_IO_56"
	270	Na 48 "/expansion/FPGA_BANK0_IO_6"
271	271	St ~
272	272	$EndEQUIPOT
273	273	$EQUIPOT
274		Na 49 "/expansion/FPGA_BANK0_IO_63"
	274	Na 49 "/expansion/FPGA_BANK0_IO_7"
275	275	St ~
276	276	$EndEQUIPOT
277	277	$EQUIPOT
...	...
279	279	St ~
280	280	$EndEQUIPOT
281	281	$EQUIPOT
282		Na 51 "/flash/NF_D3"
	282	Na 51 "/flash/NF_ALE"
283	283	St ~
284	284	$EndEQUIPOT
285	285	$EQUIPOT
286		Na 52 "/flash/NF_D5"
	286	Na 52 "/flash/NF_CLE"
287	287	St ~
288	288	$EndEQUIPOT
289	289	$EQUIPOT
290		Na 53 "/flash/NF_RNB"
	290	Na 53 "/flash/NF_CS1_N"
291	291	St ~
292	292	$EndEQUIPOT
293	293	$EQUIPOT
294		Na 54 "/flash/NF_WE_N"
	294	Na 54 "/flash/NF_D0"
295	295	St ~
296	296	$EndEQUIPOT
297	297	$EQUIPOT
298		Na 55 "/flash/SD_CMD"
	298	Na 55 "/flash/NF_D1"
299	299	St ~
300	300	$EndEQUIPOT
301	301	$EQUIPOT
302		Na 56 "/flash/SD_DAT0"
	302	Na 56 "/flash/NF_D3"
303	303	St ~
304	304	$EndEQUIPOT
305	305	$EQUIPOT
306		Na 57 "/flash/SD_DAT2"
	306	Na 57 "/flash/NF_D5"
307	307	St ~
308	308	$EndEQUIPOT
309	309	$EQUIPOT
310		Na 58 "/fpga1/ETH_CRS"
	310	Na 58 "/flash/NF_D7"
311	311	St ~
312	312	$EndEQUIPOT
313	313	$EQUIPOT
314		Na 59 "/fpga1/ETH_MDC"
	314	Na 59 "/flash/NF_RE_N"
315	315	St ~
316	316	$EndEQUIPOT
317	317	$EQUIPOT
318		Na 60 "/fpga1/ETH_MDIO"
	318	Na 60 "/flash/SD_DAT2"
319	319	St ~
320	320	$EndEQUIPOT
321	321	$EQUIPOT
...	...
323	323	St ~
324	324	$EndEQUIPOT
325	325	$EQUIPOT
326		Na 62 "/fpga1/ETH_RXC"
	326	Na 62 "/fpga1/ETH_RXD0"
327	327	St ~
328	328	$EndEQUIPOT
329	329	$EQUIPOT
...	...
331	331	St ~
332	332	$EndEQUIPOT
333	333	$EQUIPOT
334		Na 64 "/fpga1/ETH_RXDV"
	334	Na 64 "/fpga1/ETH_RXD2"
335	335	St ~
336	336	$EndEQUIPOT
337	337	$EQUIPOT
338		Na 65 "/fpga1/ETH_RXER"
	338	Na 65 "/fpga1/ETH_RXD3"
339	339	St ~
340	340	$EndEQUIPOT
341	341	$EQUIPOT
342		Na 66 "/fpga1/ETH_TXD1"
	342	Na 66 "/fpga1/ETH_RXER"
343	343	St ~
344	344	$EndEQUIPOT
345	345	$EQUIPOT
346		Na 67 "/fpga1/ETH_TXEN"
	346	Na 67 "/fpga1/ETH_TXC"
347	347	St ~
348	348	$EndEQUIPOT
349	349	$EQUIPOT
350		Na 68 "/fpga1/FPGA_BANK0_IO_10"
	350	Na 68 "/fpga1/ETH_TXD1"
351	351	St ~
352	352	$EndEQUIPOT
353	353	$EQUIPOT
354		Na 69 "/fpga1/FPGA_BANK0_IO_11"
	354	Na 69 "/fpga1/ETH_TXD2"
355	355	St ~
356	356	$EndEQUIPOT
357	357	$EQUIPOT
358		Na 70 "/fpga1/FPGA_BANK0_IO_14"
	358	Na 70 "/fpga1/ETH_TXEN"
359	359	St ~
360	360	$EndEQUIPOT
361	361	$EQUIPOT
362		Na 71 "/fpga1/FPGA_BANK0_IO_2"
	362	Na 71 "/fpga1/FPGA_BANK0_IO_12"
363	363	St ~
364	364	$EndEQUIPOT
365	365	$EQUIPOT
366		Na 72 "/fpga1/FPGA_BANK0_IO_20"
	366	Na 72 "/fpga1/FPGA_BANK0_IO_14"
367	367	St ~
368	368	$EndEQUIPOT
369	369	$EQUIPOT
370		Na 73 "/fpga1/FPGA_BANK0_IO_22"
	370	Na 73 "/fpga1/FPGA_BANK0_IO_18"
371	371	St ~
372	372	$EndEQUIPOT
373	373	$EQUIPOT
374		Na 74 "/fpga1/FPGA_BANK0_IO_24"
	374	Na 74 "/fpga1/FPGA_BANK0_IO_22"
375	375	St ~
376	376	$EndEQUIPOT
377	377	$EQUIPOT
378		Na 75 "/fpga1/FPGA_BANK0_IO_29"
	378	Na 75 "/fpga1/FPGA_BANK0_IO_24"
379	379	St ~
380	380	$EndEQUIPOT
381	381	$EQUIPOT
382		Na 76 "/fpga1/FPGA_BANK0_IO_3"
	382	Na 76 "/fpga1/FPGA_BANK0_IO_25"
383	383	St ~
384	384	$EndEQUIPOT
385	385	$EQUIPOT
386		Na 77 "/fpga1/FPGA_BANK0_IO_30"
	386	Na 77 "/fpga1/FPGA_BANK0_IO_27"
387	387	St ~
388	388	$EndEQUIPOT
389	389	$EQUIPOT
390		Na 78 "/fpga1/FPGA_BANK0_IO_33"
	390	Na 78 "/fpga1/FPGA_BANK0_IO_28"
391	391	St ~
392	392	$EndEQUIPOT
393	393	$EQUIPOT
394		Na 79 "/fpga1/FPGA_BANK0_IO_34"
	394	Na 79 "/fpga1/FPGA_BANK0_IO_30"
395	395	St ~
396	396	$EndEQUIPOT
397	397	$EQUIPOT
398		Na 80 "/fpga1/FPGA_BANK0_IO_40"
	398	Na 80 "/fpga1/FPGA_BANK0_IO_33"
399	399	St ~
400	400	$EndEQUIPOT
401	401	$EQUIPOT
402		Na 81 "/fpga1/FPGA_BANK0_IO_44"
	402	Na 81 "/fpga1/FPGA_BANK0_IO_36"
403	403	St ~
404	404	$EndEQUIPOT
405	405	$EQUIPOT
406		Na 82 "/fpga1/FPGA_BANK0_IO_45"
	406	Na 82 "/fpga1/FPGA_BANK0_IO_44"
407	407	St ~
408	408	$EndEQUIPOT
409	409	$EQUIPOT
410		Na 83 "/fpga1/FPGA_BANK0_IO_47"
	410	Na 83 "/fpga1/FPGA_BANK0_IO_45"
411	411	St ~
412	412	$EndEQUIPOT
413	413	$EQUIPOT
...	...
415	415	St ~
416	416	$EndEQUIPOT
417	417	$EQUIPOT
418		Na 85 "/fpga1/FPGA_BANK0_IO_51"
	418	Na 85 "/fpga1/FPGA_BANK0_IO_49"
419	419	St ~
420	420	$EndEQUIPOT
421	421	$EQUIPOT
422		Na 86 "/fpga1/FPGA_BANK0_IO_57"
	422	Na 86 "/fpga1/FPGA_BANK0_IO_51"
423	423	St ~
424	424	$EndEQUIPOT
425	425	$EQUIPOT
426		Na 87 "/fpga1/FPGA_BANK0_IO_58"
	426	Na 87 "/fpga1/FPGA_BANK0_IO_52"
427	427	St ~
428	428	$EndEQUIPOT
429	429	$EQUIPOT
430		Na 88 "/fpga1/FPGA_BANK0_IO_6"
	430	Na 88 "/fpga1/FPGA_BANK0_IO_53"
431	431	St ~
432	432	$EndEQUIPOT
433	433	$EQUIPOT
434		Na 89 "/fpga1/FPGA_BANK0_IO_60"
	434	Na 89 "/fpga1/FPGA_BANK0_IO_56"
435	435	St ~
436	436	$EndEQUIPOT
437	437	$EQUIPOT
438		Na 90 "/fpga1/FPGA_BANK0_IO_62"
	438	Na 90 "/fpga1/FPGA_BANK0_IO_57"
439	439	St ~
440	440	$EndEQUIPOT
441	441	$EQUIPOT
442		Na 91 "/fpga1/FPGA_BANK0_IO_7"
	442	Na 91 "/fpga1/FPGA_BANK0_IO_58"
443	443	St ~
444	444	$EndEQUIPOT
445	445	$EQUIPOT
446		Na 92 "/fpga1/FPGA_BANK0_IO_8"
	446	Na 92 "/fpga1/FPGA_BANK0_IO_60"
447	447	St ~
448	448	$EndEQUIPOT
449	449	$EQUIPOT
450		Na 93 "/fpga1/NF_ALE"
	450	Na 93 "/fpga1/FPGA_BANK0_IO_62"
451	451	St ~
452	452	$EndEQUIPOT
453	453	$EQUIPOT
454		Na 94 "/fpga1/NF_CLE"
	454	Na 94 "/fpga1/FPGA_BANK0_IO_63"
455	455	St ~
456	456	$EndEQUIPOT
457	457	$EQUIPOT
458		Na 95 "/fpga1/NF_CS1_N"
	458	Na 95 "/fpga1/FPGA_BANK0_IO_8"
459	459	St ~
460	460	$EndEQUIPOT
461	461	$EQUIPOT
462		Na 96 "/fpga1/NF_D0"
	462	Na 96 "/fpga1/NF_D2"
463	463	St ~
464	464	$EndEQUIPOT
465	465	$EQUIPOT
466		Na 97 "/fpga1/NF_D1"
	466	Na 97 "/fpga1/NF_D4"
467	467	St ~
468	468	$EndEQUIPOT
469	469	$EQUIPOT
470		Na 98 "/fpga1/NF_D2"
	470	Na 98 "/fpga1/NF_D6"
471	471	St ~
472	472	$EndEQUIPOT
473	473	$EQUIPOT
474		Na 99 "/fpga1/NF_D4"
	474	Na 99 "/fpga1/NF_RNB"
475	475	St ~
476	476	$EndEQUIPOT
477	477	$EQUIPOT
478		Na 100 "/fpga1/NF_D6"
	478	Na 100 "/fpga1/NF_WE_N"
479	479	St ~
480	480	$EndEQUIPOT
481	481	$EQUIPOT
482		Na 101 "/fpga1/NF_D7"
	482	Na 101 "/fpga1/PROG_CCLK"
483	483	St ~
484	484	$EndEQUIPOT
485	485	$EQUIPOT
486		Na 102 "/fpga1/NF_RE_N"
	486	Na 102 "/fpga1/PROG_CSO"
487	487	St ~
488	488	$EndEQUIPOT
489	489	$EQUIPOT
490		Na 103 "/fpga1/PROG_CCLK"
	490	Na 103 "/fpga1/PROG_MISO0"
491	491	St ~
492	492	$EndEQUIPOT
493	493	$EQUIPOT
494		Na 104 "/fpga1/PROG_CSO"
	494	Na 104 "/fpga1/PROG_MISO1"
495	495	St ~
496	496	$EndEQUIPOT
497	497	$EQUIPOT
498		Na 105 "/fpga1/PROG_MISO0"
	498	Na 105 "/fpga1/PROG_MISO2"
499	499	St ~
500	500	$EndEQUIPOT
501	501	$EQUIPOT
502		Na 106 "/fpga1/PROG_MISO1"
	502	Na 106 "/fpga1/PROG_MISO3"
503	503	St ~
504	504	$EndEQUIPOT
505	505	$EQUIPOT
506		Na 107 "/fpga1/PROG_MISO2"
	506	Na 107 "/fpga1/SD_CLK"
507	507	St ~
508	508	$EndEQUIPOT
509	509	$EQUIPOT
510		Na 108 "/fpga1/PROG_MISO3"
	510	Na 108 "/fpga1/SD_CMD"
511	511	St ~
512	512	$EndEQUIPOT
513	513	$EQUIPOT
514		Na 109 "/fpga1/SD_CLK"
	514	Na 109 "/fpga1/SD_DAT0"
515	515	St ~
516	516	$EndEQUIPOT
517	517	$EQUIPOT
...	...
527	527	St ~
528	528	$EndEQUIPOT
529	529	$EQUIPOT
530		Na 113 "/fpga2/M0_A1"
	530	Na 113 "/fpga2/M0_A10"
531	531	St ~
532	532	$EndEQUIPOT
533	533	$EQUIPOT
534		Na 114 "/fpga2/M0_A11"
	534	Na 114 "/fpga2/M0_A12"
535	535	St ~
536	536	$EndEQUIPOT
537	537	$EQUIPOT
...	...
539	539	St ~
540	540	$EndEQUIPOT
541	541	$EQUIPOT
542		Na 116 "/fpga2/M0_A3"
	542	Na 116 "/fpga2/M0_A4"
543	543	St ~
544	544	$EndEQUIPOT
545	545	$EQUIPOT
546		Na 117 "/fpga2/M0_A4"
	546	Na 117 "/fpga2/M0_A5"
547	547	St ~
548	548	$EndEQUIPOT
549	549	$EQUIPOT
550		Na 118 "/fpga2/M0_A5"
	550	Na 118 "/fpga2/M0_A7"
551	551	St ~
552	552	$EndEQUIPOT
553	553	$EQUIPOT
554		Na 119 "/fpga2/M0_A6"
	554	Na 119 "/fpga2/M0_A8"
555	555	St ~
556	556	$EndEQUIPOT
557	557	$EQUIPOT
558		Na 120 "/fpga2/M0_A7"
	558	Na 120 "/fpga2/M0_A9"
559	559	St ~
560	560	$EndEQUIPOT
561	561	$EQUIPOT
562		Na 121 "/fpga2/M0_A9"
	562	Na 121 "/fpga2/M0_BA0"
563	563	St ~
564	564	$EndEQUIPOT
565	565	$EQUIPOT
...	...
567	567	St ~
568	568	$EndEQUIPOT
569	569	$EQUIPOT
570		Na 123 "/fpga2/M0_CLK#"
	570	Na 123 "/fpga2/M0_CLK"
571	571	St ~
572	572	$EndEQUIPOT
573	573	$EQUIPOT
...	...
587	587	St ~
588	588	$EndEQUIPOT
589	589	$EQUIPOT
590		Na 128 "/fpga2/M0_DQ12"
	590	Na 128 "/fpga2/M0_DQ15"
591	591	St ~
592	592	$EndEQUIPOT
593	593	$EQUIPOT
594		Na 129 "/fpga2/M0_DQ13"
	594	Na 129 "/fpga2/M0_DQ2"
595	595	St ~
596	596	$EndEQUIPOT
597	597	$EQUIPOT
598		Na 130 "/fpga2/M0_DQ14"
	598	Na 130 "/fpga2/M0_DQ3"
599	599	St ~
600	600	$EndEQUIPOT
601	601	$EQUIPOT
602		Na 131 "/fpga2/M0_DQ15"
	602	Na 131 "/fpga2/M0_DQ6"
603	603	St ~
604	604	$EndEQUIPOT
605	605	$EQUIPOT
606		Na 132 "/fpga2/M0_DQ3"
	606	Na 132 "/fpga2/M0_DQ7"
607	607	St ~
608	608	$EndEQUIPOT
609	609	$EQUIPOT
610		Na 133 "/fpga2/M0_DQ5"
	610	Na 133 "/fpga2/M0_DQ9"
611	611	St ~
612	612	$EndEQUIPOT
613	613	$EQUIPOT
614		Na 134 "/fpga2/M0_DQ7"
	614	Na 134 "/fpga2/M0_LDM"
615	615	St ~
616	616	$EndEQUIPOT
617	617	$EQUIPOT
618		Na 135 "/fpga2/M0_LDM"
	618	Na 135 "/fpga2/M0_LDQS"
619	619	St ~
620	620	$EndEQUIPOT
621	621	$EQUIPOT
622		Na 136 "/fpga2/M0_LDQS"
	622	Na 136 "/fpga2/M0_UDM"
623	623	St ~
624	624	$EndEQUIPOT
625	625	$EQUIPOT
626		Na 137 "/fpga2/M0_UDQS"
	626	Na 137 "/fpga2/M1_A0"
627	627	St ~
628	628	$EndEQUIPOT
629	629	$EQUIPOT
630		Na 138 "/fpga2/M0_WE#"
	630	Na 138 "/fpga2/M1_A11"
631	631	St ~
632	632	$EndEQUIPOT
633	633	$EQUIPOT
634		Na 139 "/fpga2/M1_A0"
	634	Na 139 "/fpga2/M1_A2"
635	635	St ~
636	636	$EndEQUIPOT
637	637	$EQUIPOT
638		Na 140 "/fpga2/M1_A1"
	638	Na 140 "/fpga2/M1_A6"
639	639	St ~
640	640	$EndEQUIPOT
641	641	$EQUIPOT
642		Na 141 "/fpga2/M1_A12"
	642	Na 141 "/fpga2/M1_A7"
643	643	St ~
644	644	$EndEQUIPOT
645	645	$EQUIPOT
646		Na 142 "/fpga2/M1_A2"
	646	Na 142 "/fpga2/M1_A8"
647	647	St ~
648	648	$EndEQUIPOT
649	649	$EQUIPOT
650		Na 143 "/fpga2/M1_A5"
	650	Na 143 "/fpga2/M1_A9"
651	651	St ~
652	652	$EndEQUIPOT
653	653	$EQUIPOT
654		Na 144 "/fpga2/M1_A6"
	654	Na 144 "/fpga2/M1_BA1"
655	655	St ~
656	656	$EndEQUIPOT
657	657	$EQUIPOT
658		Na 145 "/fpga2/M1_A7"
	658	Na 145 "/fpga2/M1_CKE"
659	659	St ~
660	660	$EndEQUIPOT
661	661	$EQUIPOT
662		Na 146 "/fpga2/M1_A8"
	662	Na 146 "/fpga2/M1_CLK"
663	663	St ~
664	664	$EndEQUIPOT
665	665	$EQUIPOT
666		Na 147 "/fpga2/M1_A9"
	666	Na 147 "/fpga2/M1_CLK#"
667	667	St ~
668	668	$EndEQUIPOT
669	669	$EQUIPOT
670		Na 148 "/fpga2/M1_CAS#"
	670	Na 148 "/fpga2/M1_CS#"
671	671	St ~
672	672	$EndEQUIPOT
673	673	$EQUIPOT
674		Na 149 "/fpga2/M1_CLK"
	674	Na 149 "/fpga2/M1_DQ0"
675	675	St ~
676	676	$EndEQUIPOT
677	677	$EQUIPOT
678		Na 150 "/fpga2/M1_CLK#"
	678	Na 150 "/fpga2/M1_DQ10"
679	679	St ~
680	680	$EndEQUIPOT
681	681	$EQUIPOT
682		Na 151 "/fpga2/M1_CS#"
	682	Na 151 "/fpga2/M1_DQ11"
683	683	St ~
684	684	$EndEQUIPOT
685	685	$EQUIPOT
686		Na 152 "/fpga2/M1_DQ0"
	686	Na 152 "/fpga2/M1_DQ14"
687	687	St ~
688	688	$EndEQUIPOT
689	689	$EQUIPOT
690		Na 153 "/fpga2/M1_DQ1"
	690	Na 153 "/fpga2/M1_DQ15"
691	691	St ~
692	692	$EndEQUIPOT
693	693	$EQUIPOT
694		Na 154 "/fpga2/M1_DQ10"
	694	Na 154 "/fpga2/M1_DQ2"
695	695	St ~
696	696	$EndEQUIPOT
697	697	$EQUIPOT
698		Na 155 "/fpga2/M1_DQ12"
	698	Na 155 "/fpga2/M1_DQ3"
699	699	St ~
700	700	$EndEQUIPOT
701	701	$EQUIPOT
702		Na 156 "/fpga2/M1_DQ13"
	702	Na 156 "/fpga2/M1_DQ4"
703	703	St ~
704	704	$EndEQUIPOT
705	705	$EQUIPOT
706		Na 157 "/fpga2/M1_DQ15"
	706	Na 157 "/fpga2/M1_DQ7"
707	707	St ~
708	708	$EndEQUIPOT
709	709	$EQUIPOT
710		Na 158 "/fpga2/M1_DQ2"
	710	Na 158 "/fpga2/M1_DQ8"
711	711	St ~
712	712	$EndEQUIPOT
713	713	$EQUIPOT
714		Na 159 "/fpga2/M1_DQ5"
	714	Na 159 "/fpga2/M1_DQ9"
715	715	St ~
716	716	$EndEQUIPOT
717	717	$EQUIPOT
718		Na 160 "/fpga2/M1_DQ8"
	718	Na 160 "/fpga2/M1_LDM"
719	719	St ~
720	720	$EndEQUIPOT
721	721	$EQUIPOT
722		Na 161 "/fpga2/M1_DQ9"
	722	Na 161 "/fpga2/M1_UDQS"
723	723	St ~
724	724	$EndEQUIPOT
725	725	$EQUIPOT
726		Na 162 "/fpga2/M1_LDM"
	726	Na 162 "/fpga2/R_M0_A0"
727	727	St ~
728	728	$EndEQUIPOT
729	729	$EQUIPOT
730		Na 163 "/fpga2/M1_LDQS"
	730	Na 163 "/fpga2/R_M0_A1"
731	731	St ~
732	732	$EndEQUIPOT
733	733	$EQUIPOT
734		Na 164 "/fpga2/R_M0_A0"
	734	Na 164 "/fpga2/R_M0_A10"
735	735	St ~
736	736	$EndEQUIPOT
737	737	$EQUIPOT
738		Na 165 "/fpga2/R_M0_A1"
	738	Na 165 "/fpga2/R_M0_A11"
739	739	St ~
740	740	$EndEQUIPOT
741	741	$EQUIPOT
742		Na 166 "/fpga2/R_M0_A10"
	742	Na 166 "/fpga2/R_M0_A12"
743	743	St ~
744	744	$EndEQUIPOT
745	745	$EQUIPOT
746		Na 167 "/fpga2/R_M0_A11"
	746	Na 167 "/fpga2/R_M0_A2"
747	747	St ~
748	748	$EndEQUIPOT
749	749	$EQUIPOT
750		Na 168 "/fpga2/R_M0_A12"
	750	Na 168 "/fpga2/R_M0_A3"
751	751	St ~
752	752	$EndEQUIPOT
753	753	$EQUIPOT
754		Na 169 "/fpga2/R_M0_A2"
	754	Na 169 "/fpga2/R_M0_A4"
755	755	St ~
756	756	$EndEQUIPOT
757	757	$EQUIPOT
758		Na 170 "/fpga2/R_M0_A3"
	758	Na 170 "/fpga2/R_M0_A5"
759	759	St ~
760	760	$EndEQUIPOT
761	761	$EQUIPOT
762		Na 171 "/fpga2/R_M0_A4"
	762	Na 171 "/fpga2/R_M0_A6"
763	763	St ~
764	764	$EndEQUIPOT
765	765	$EQUIPOT
766		Na 172 "/fpga2/R_M0_A5"
	766	Na 172 "/fpga2/R_M0_A7"
767	767	St ~
768	768	$EndEQUIPOT
769	769	$EQUIPOT
770		Na 173 "/fpga2/R_M0_A6"
	770	Na 173 "/fpga2/R_M0_A8"
771	771	St ~
772	772	$EndEQUIPOT
773	773	$EQUIPOT
774		Na 174 "/fpga2/R_M0_A7"
	774	Na 174 "/fpga2/R_M0_A9"
775	775	St ~
776	776	$EndEQUIPOT
777	777	$EQUIPOT
778		Na 175 "/fpga2/R_M0_A8"
	778	Na 175 "/fpga2/R_M0_BA0"
779	779	St ~
780	780	$EndEQUIPOT
781	781	$EQUIPOT
782		Na 176 "/fpga2/R_M0_A9"
	782	Na 176 "/fpga2/R_M0_BA1"
783	783	St ~
784	784	$EndEQUIPOT
785	785	$EQUIPOT
786		Na 177 "/fpga2/R_M0_BA0"
	786	Na 177 "/fpga2/R_M0_CAS#"
787	787	St ~
788	788	$EndEQUIPOT
789	789	$EQUIPOT
790		Na 178 "/fpga2/R_M0_BA1"
	790	Na 178 "/fpga2/R_M0_CKE"
791	791	St ~
792	792	$EndEQUIPOT
793	793	$EQUIPOT
794		Na 179 "/fpga2/R_M0_CAS#"
	794	Na 179 "/fpga2/R_M0_DQ0"
795	795	St ~
796	796	$EndEQUIPOT
797	797	$EQUIPOT
798		Na 180 "/fpga2/R_M0_CKE"
	798	Na 180 "/fpga2/R_M0_DQ1"
799	799	St ~
800	800	$EndEQUIPOT
801	801	$EQUIPOT
802		Na 181 "/fpga2/R_M0_DQ0"
	802	Na 181 "/fpga2/R_M0_DQ10"
803	803	St ~
804	804	$EndEQUIPOT
805	805	$EQUIPOT
806		Na 182 "/fpga2/R_M0_DQ1"
	806	Na 182 "/fpga2/R_M0_DQ11"
807	807	St ~
808	808	$EndEQUIPOT
809	809	$EQUIPOT
810		Na 183 "/fpga2/R_M0_DQ10"
	810	Na 183 "/fpga2/R_M0_DQ12"
811	811	St ~
812	812	$EndEQUIPOT
813	813	$EQUIPOT
814		Na 184 "/fpga2/R_M0_DQ11"
	814	Na 184 "/fpga2/R_M0_DQ13"
815	815	St ~
816	816	$EndEQUIPOT
817	817	$EQUIPOT
818		Na 185 "/fpga2/R_M0_DQ12"
	818	Na 185 "/fpga2/R_M0_DQ14"
819	819	St ~
820	820	$EndEQUIPOT
821	821	$EQUIPOT
822		Na 186 "/fpga2/R_M0_DQ13"
	822	Na 186 "/fpga2/R_M0_DQ15"
823	823	St ~
824	824	$EndEQUIPOT
825	825	$EQUIPOT
826		Na 187 "/fpga2/R_M0_DQ14"
	826	Na 187 "/fpga2/R_M0_DQ2"
827	827	St ~
828	828	$EndEQUIPOT
829	829	$EQUIPOT
830		Na 188 "/fpga2/R_M0_DQ15"
	830	Na 188 "/fpga2/R_M0_DQ3"
831	831	St ~
832	832	$EndEQUIPOT
833	833	$EQUIPOT
834		Na 189 "/fpga2/R_M0_DQ2"
	834	Na 189 "/fpga2/R_M0_DQ4"
835	835	St ~
836	836	$EndEQUIPOT
837	837	$EQUIPOT
838		Na 190 "/fpga2/R_M0_DQ3"
	838	Na 190 "/fpga2/R_M0_DQ5"
839	839	St ~
840	840	$EndEQUIPOT
841	841	$EQUIPOT
842		Na 191 "/fpga2/R_M0_DQ4"
	842	Na 191 "/fpga2/R_M0_DQ6"
843	843	St ~
844	844	$EndEQUIPOT
845	845	$EQUIPOT
846		Na 192 "/fpga2/R_M0_DQ5"
	846	Na 192 "/fpga2/R_M0_DQ7"
847	847	St ~
848	848	$EndEQUIPOT
849	849	$EQUIPOT
850		Na 193 "/fpga2/R_M0_DQ6"
	850	Na 193 "/fpga2/R_M0_DQ8"
851	851	St ~
852	852	$EndEQUIPOT
853	853	$EQUIPOT
854		Na 194 "/fpga2/R_M0_DQ7"
	854	Na 194 "/fpga2/R_M0_DQ9"
855	855	St ~
856	856	$EndEQUIPOT
857	857	$EQUIPOT
858		Na 195 "/fpga2/R_M0_DQ8"
	858	Na 195 "/fpga2/R_M0_LDM"
859	859	St ~
860	860	$EndEQUIPOT
861	861	$EQUIPOT
862		Na 196 "/fpga2/R_M0_DQ9"
	862	Na 196 "/fpga2/R_M0_LDQS"
863	863	St ~
864	864	$EndEQUIPOT
865	865	$EQUIPOT
866		Na 197 "/fpga2/R_M0_LDM"
	866	Na 197 "/fpga2/R_M0_RAS#"
867	867	St ~
868	868	$EndEQUIPOT
869	869	$EQUIPOT
870		Na 198 "/fpga2/R_M0_LDQS"
	870	Na 198 "/fpga2/R_M0_UDM"
871	871	St ~
872	872	$EndEQUIPOT
873	873	$EQUIPOT
874		Na 199 "/fpga2/R_M0_RAS#"
	874	Na 199 "/fpga2/R_M0_UDQS"
875	875	St ~
876	876	$EndEQUIPOT
877	877	$EQUIPOT
878		Na 200 "/fpga2/R_M0_UDM"
	878	Na 200 "/fpga2/R_M0_WE#"
879	879	St ~
880	880	$EndEQUIPOT
881	881	$EQUIPOT
882		Na 201 "/fpga2/R_M0_UDQS"
	882	Na 201 "/fpga2/R_M1_A0"
883	883	St ~
884	884	$EndEQUIPOT
885	885	$EQUIPOT
886		Na 202 "/fpga2/R_M0_WE#"
	886	Na 202 "/fpga2/R_M1_A1"
887	887	St ~
888	888	$EndEQUIPOT
889	889	$EQUIPOT
890		Na 203 "/fpga2/R_M1_A0"
	890	Na 203 "/fpga2/R_M1_A10"
891	891	St ~
892	892	$EndEQUIPOT
893	893	$EQUIPOT
894		Na 204 "/fpga2/R_M1_A1"
	894	Na 204 "/fpga2/R_M1_A11"
895	895	St ~
896	896	$EndEQUIPOT
897	897	$EQUIPOT
898		Na 205 "/fpga2/R_M1_A10"
	898	Na 205 "/fpga2/R_M1_A12"
899	899	St ~
900	900	$EndEQUIPOT
901	901	$EQUIPOT
902		Na 206 "/fpga2/R_M1_A11"
	902	Na 206 "/fpga2/R_M1_A2"
903	903	St ~
904	904	$EndEQUIPOT
905	905	$EQUIPOT
906		Na 207 "/fpga2/R_M1_A12"
	906	Na 207 "/fpga2/R_M1_A3"
907	907	St ~
908	908	$EndEQUIPOT
909	909	$EQUIPOT
910		Na 208 "/fpga2/R_M1_A2"
	910	Na 208 "/fpga2/R_M1_A4"
911	911	St ~
912	912	$EndEQUIPOT
913	913	$EQUIPOT
914		Na 209 "/fpga2/R_M1_A3"
	914	Na 209 "/fpga2/R_M1_A5"
915	915	St ~
916	916	$EndEQUIPOT
917	917	$EQUIPOT
918		Na 210 "/fpga2/R_M1_A4"
	918	Na 210 "/fpga2/R_M1_A6"
919	919	St ~
920	920	$EndEQUIPOT
921	921	$EQUIPOT
922		Na 211 "/fpga2/R_M1_A5"
	922	Na 211 "/fpga2/R_M1_A7"
923	923	St ~
924	924	$EndEQUIPOT
925	925	$EQUIPOT
926		Na 212 "/fpga2/R_M1_A6"
	926	Na 212 "/fpga2/R_M1_A8"
927	927	St ~
928	928	$EndEQUIPOT
929	929	$EQUIPOT
930		Na 213 "/fpga2/R_M1_A7"
	930	Na 213 "/fpga2/R_M1_A9"
931	931	St ~
932	932	$EndEQUIPOT
933	933	$EQUIPOT
934		Na 214 "/fpga2/R_M1_A8"
	934	Na 214 "/fpga2/R_M1_BA0"
935	935	St ~
936	936	$EndEQUIPOT
937	937	$EQUIPOT
938		Na 215 "/fpga2/R_M1_A9"
	938	Na 215 "/fpga2/R_M1_BA1"
939	939	St ~
940	940	$EndEQUIPOT
941	941	$EQUIPOT
942		Na 216 "/fpga2/R_M1_BA0"
	942	Na 216 "/fpga2/R_M1_CAS#"
943	943	St ~
944	944	$EndEQUIPOT
945	945	$EQUIPOT
946		Na 217 "/fpga2/R_M1_BA1"
	946	Na 217 "/fpga2/R_M1_CKE"
947	947	St ~
948	948	$EndEQUIPOT
949	949	$EQUIPOT
950		Na 218 "/fpga2/R_M1_CAS#"
	950	Na 218 "/fpga2/R_M1_CS#"
951	951	St ~
952	952	$EndEQUIPOT
953	953	$EQUIPOT
954		Na 219 "/fpga2/R_M1_CKE"
	954	Na 219 "/fpga2/R_M1_DQ0"
955	955	St ~
956	956	$EndEQUIPOT
957	957	$EQUIPOT
958		Na 220 "/fpga2/R_M1_CS#"
	958	Na 220 "/fpga2/R_M1_DQ1"
959	959	St ~
960	960	$EndEQUIPOT
961	961	$EQUIPOT
962		Na 221 "/fpga2/R_M1_DQ0"
	962	Na 221 "/fpga2/R_M1_DQ10"
963	963	St ~
964	964	$EndEQUIPOT
965	965	$EQUIPOT
966		Na 222 "/fpga2/R_M1_DQ1"
	966	Na 222 "/fpga2/R_M1_DQ11"
967	967	St ~
968	968	$EndEQUIPOT
969	969	$EQUIPOT
970		Na 223 "/fpga2/R_M1_DQ10"
	970	Na 223 "/fpga2/R_M1_DQ12"
971	971	St ~
972	972	$EndEQUIPOT
973	973	$EQUIPOT
974		Na 224 "/fpga2/R_M1_DQ11"
	974	Na 224 "/fpga2/R_M1_DQ13"
975	975	St ~
976	976	$EndEQUIPOT
977	977	$EQUIPOT
978		Na 225 "/fpga2/R_M1_DQ12"
	978	Na 225 "/fpga2/R_M1_DQ14"
979	979	St ~
980	980	$EndEQUIPOT
981	981	$EQUIPOT
982		Na 226 "/fpga2/R_M1_DQ13"
	982	Na 226 "/fpga2/R_M1_DQ15"
983	983	St ~
984	984	$EndEQUIPOT
985	985	$EQUIPOT
986		Na 227 "/fpga2/R_M1_DQ14"
	986	Na 227 "/fpga2/R_M1_DQ2"
987	987	St ~
988	988	$EndEQUIPOT
989	989	$EQUIPOT
990		Na 228 "/fpga2/R_M1_DQ15"
	990	Na 228 "/fpga2/R_M1_DQ3"
991	991	St ~
992	992	$EndEQUIPOT
993	993	$EQUIPOT
994		Na 229 "/fpga2/R_M1_DQ2"
	994	Na 229 "/fpga2/R_M1_DQ4"
995	995	St ~
996	996	$EndEQUIPOT
997	997	$EQUIPOT
998		Na 230 "/fpga2/R_M1_DQ3"
	998	Na 230 "/fpga2/R_M1_DQ5"
999	999	St ~
1000	1000	$EndEQUIPOT
1001	1001	$EQUIPOT
1002		Na 231 "/fpga2/R_M1_DQ4"
	1002	Na 231 "/fpga2/R_M1_DQ6"
1003	1003	St ~
1004	1004	$EndEQUIPOT
1005	1005	$EQUIPOT
1006		Na 232 "/fpga2/R_M1_DQ5"
	1006	Na 232 "/fpga2/R_M1_DQ7"
1007	1007	St ~
1008	1008	$EndEQUIPOT
1009	1009	$EQUIPOT
1010		Na 233 "/fpga2/R_M1_DQ6"
	1010	Na 233 "/fpga2/R_M1_DQ8"
1011	1011	St ~
1012	1012	$EndEQUIPOT
1013	1013	$EQUIPOT
1014		Na 234 "/fpga2/R_M1_DQ7"
	1014	Na 234 "/fpga2/R_M1_DQ9"
1015	1015	St ~
1016	1016	$EndEQUIPOT
1017	1017	$EQUIPOT
1018		Na 235 "/fpga2/R_M1_DQ8"
	1018	Na 235 "/fpga2/R_M1_LDM"
1019	1019	St ~
1020	1020	$EndEQUIPOT
1021	1021	$EQUIPOT
1022		Na 236 "/fpga2/R_M1_DQ9"
	1022	Na 236 "/fpga2/R_M1_LDQS"
1023	1023	St ~
1024	1024	$EndEQUIPOT
1025	1025	$EQUIPOT
1026		Na 237 "/fpga2/R_M1_LDM"
	1026	Na 237 "/fpga2/R_M1_RAS#"
1027	1027	St ~
1028	1028	$EndEQUIPOT
1029	1029	$EQUIPOT
1030		Na 238 "/fpga2/R_M1_LDQS"
	1030	Na 238 "/fpga2/R_M1_UDM"
1031	1031	St ~
1032	1032	$EndEQUIPOT
1033	1033	$EQUIPOT
1034		Na 239 "/fpga2/R_M1_RAS#"
	1034	Na 239 "/fpga2/R_M1_UDQS"
1035	1035	St ~
1036	1036	$EndEQUIPOT
1037	1037	$EQUIPOT
1038		Na 240 "/fpga2/R_M1_UDM"
	1038	Na 240 "/fpga2/R_M1_WE#"
1039	1039	St ~
1040	1040	$EndEQUIPOT
1041	1041	$EQUIPOT
1042		Na 241 "/fpga2/R_M1_UDQS"
	1042	Na 241 "/fpga2/USBA_RCV"
1043	1043	St ~
1044	1044	$EndEQUIPOT
1045	1045	$EQUIPOT
1046		Na 242 "/fpga2/R_M1_WE#"
	1046	Na 242 "/fpga2/USBA_VP"
1047	1047	St ~
1048	1048	$EndEQUIPOT
1049	1049	$EQUIPOT
1050		Na 243 "/fpga2/USBA_RCV"
	1050	Na 243 "/fpga2/USBD_RCV"
1051	1051	St ~
1052	1052	$EndEQUIPOT
1053	1053	$EQUIPOT
1054		Na 244 "/fpga2/USBA_VP"
	1054	Na 244 "/fpga2/USBD_VM"
1055	1055	St ~
1056	1056	$EndEQUIPOT
1057	1057	$EQUIPOT
1058		Na 245 "/fpga2/USBD_OE_N"
	1058	Na 245 "/fpga2/USBD_VP"
1059	1059	St ~
1060	1060	$EndEQUIPOT
1061	1061	$EQUIPOT
1062		Na 246 "/fpga2/USBD_RCV"
	1062	Na 246 "/sdram/M0_A1"
1063	1063	St ~
1064	1064	$EndEQUIPOT
1065	1065	$EQUIPOT
1066		Na 247 "/fpga2/USBD_SPD"
	1066	Na 247 "/sdram/M0_A11"
1067	1067	St ~
1068	1068	$EndEQUIPOT
1069	1069	$EQUIPOT
1070		Na 248 "/sdram/M0_A10"
	1070	Na 248 "/sdram/M0_A3"
1071	1071	St ~
1072	1072	$EndEQUIPOT
1073	1073	$EQUIPOT
1074		Na 249 "/sdram/M0_A12"
	1074	Na 249 "/sdram/M0_A6"
1075	1075	St ~
1076	1076	$EndEQUIPOT
1077	1077	$EQUIPOT
1078		Na 250 "/sdram/M0_A8"
	1078	Na 250 "/sdram/M0_BA1"
1079	1079	St ~
1080	1080	$EndEQUIPOT
1081	1081	$EQUIPOT
1082		Na 251 "/sdram/M0_BA0"
	1082	Na 251 "/sdram/M0_CKE"
1083	1083	St ~
1084	1084	$EndEQUIPOT
1085	1085	$EQUIPOT
1086		Na 252 "/sdram/M0_BA1"
	1086	Na 252 "/sdram/M0_CLK#"
1087	1087	St ~
1088	1088	$EndEQUIPOT
1089	1089	$EQUIPOT
1090		Na 253 "/sdram/M0_CKE"
	1090	Na 253 "/sdram/M0_DQ12"
1091	1091	St ~
1092	1092	$EndEQUIPOT
1093	1093	$EQUIPOT
1094		Na 254 "/sdram/M0_CLK"
	1094	Na 254 "/sdram/M0_DQ13"
1095	1095	St ~
1096	1096	$EndEQUIPOT
1097	1097	$EQUIPOT
1098		Na 255 "/sdram/M0_DQ2"
	1098	Na 255 "/sdram/M0_DQ14"
1099	1099	St ~
1100	1100	$EndEQUIPOT
1101	1101	$EQUIPOT
...	...
1103	1103	St ~
1104	1104	$EndEQUIPOT
1105	1105	$EQUIPOT
1106		Na 257 "/sdram/M0_DQ6"
	1106	Na 257 "/sdram/M0_DQ5"
1107	1107	St ~
1108	1108	$EndEQUIPOT
1109	1109	$EQUIPOT
...	...
1111	1111	St ~
1112	1112	$EndEQUIPOT
1113	1113	$EQUIPOT
1114		Na 259 "/sdram/M0_DQ9"
	1114	Na 259 "/sdram/M0_RAS#"
1115	1115	St ~
1116	1116	$EndEQUIPOT
1117	1117	$EQUIPOT
1118		Na 260 "/sdram/M0_RAS#"
	1118	Na 260 "/sdram/M0_UDQS"
1119	1119	St ~
1120	1120	$EndEQUIPOT
1121	1121	$EQUIPOT
1122		Na 261 "/sdram/M0_UDM"
	1122	Na 261 "/sdram/M0_VREF"
1123	1123	St ~
1124	1124	$EndEQUIPOT
1125	1125	$EQUIPOT
1126		Na 262 "/sdram/M0_VREF"
	1126	Na 262 "/sdram/M0_WE#"
1127	1127	St ~
1128	1128	$EndEQUIPOT
1129	1129	$EQUIPOT
1130		Na 263 "/sdram/M1_A10"
	1130	Na 263 "/sdram/M1_A1"
1131	1131	St ~
1132	1132	$EndEQUIPOT
1133	1133	$EQUIPOT
1134		Na 264 "/sdram/M1_A11"
	1134	Na 264 "/sdram/M1_A10"
1135	1135	St ~
1136	1136	$EndEQUIPOT
1137	1137	$EQUIPOT
1138		Na 265 "/sdram/M1_A3"
	1138	Na 265 "/sdram/M1_A12"
1139	1139	St ~
1140	1140	$EndEQUIPOT
1141	1141	$EQUIPOT
1142		Na 266 "/sdram/M1_A4"
	1142	Na 266 "/sdram/M1_A3"
1143	1143	St ~
1144	1144	$EndEQUIPOT
1145	1145	$EQUIPOT
1146		Na 267 "/sdram/M1_BA0"
	1146	Na 267 "/sdram/M1_A4"
1147	1147	St ~
1148	1148	$EndEQUIPOT
1149	1149	$EQUIPOT
1150		Na 268 "/sdram/M1_BA1"
	1150	Na 268 "/sdram/M1_A5"
1151	1151	St ~
1152	1152	$EndEQUIPOT
1153	1153	$EQUIPOT
1154		Na 269 "/sdram/M1_CKE"
	1154	Na 269 "/sdram/M1_BA0"
1155	1155	St ~
1156	1156	$EndEQUIPOT
1157	1157	$EQUIPOT
1158		Na 270 "/sdram/M1_DQ11"
	1158	Na 270 "/sdram/M1_CAS#"
1159	1159	St ~
1160	1160	$EndEQUIPOT
1161	1161	$EQUIPOT
1162		Na 271 "/sdram/M1_DQ14"
	1162	Na 271 "/sdram/M1_DQ1"
1163	1163	St ~
1164	1164	$EndEQUIPOT
1165	1165	$EQUIPOT
1166		Na 272 "/sdram/M1_DQ3"
	1166	Na 272 "/sdram/M1_DQ12"
1167	1167	St ~
1168	1168	$EndEQUIPOT
1169	1169	$EQUIPOT
1170		Na 273 "/sdram/M1_DQ4"
	1170	Na 273 "/sdram/M1_DQ13"
1171	1171	St ~
1172	1172	$EndEQUIPOT
1173	1173	$EQUIPOT
1174		Na 274 "/sdram/M1_DQ6"
	1174	Na 274 "/sdram/M1_DQ5"
1175	1175	St ~
1176	1176	$EndEQUIPOT
1177	1177	$EQUIPOT
1178		Na 275 "/sdram/M1_DQ7"
	1178	Na 275 "/sdram/M1_DQ6"
1179	1179	St ~
1180	1180	$EndEQUIPOT
1181	1181	$EQUIPOT
1182		Na 276 "/sdram/M1_RAS#"
	1182	Na 276 "/sdram/M1_LDQS"
1183	1183	St ~
1184	1184	$EndEQUIPOT
1185	1185	$EQUIPOT
1186		Na 277 "/sdram/M1_UDM"
	1186	Na 277 "/sdram/M1_RAS#"
1187	1187	St ~
1188	1188	$EndEQUIPOT
1189	1189	$EQUIPOT
1190		Na 278 "/sdram/M1_UDQS"
	1190	Na 278 "/sdram/M1_UDM"
1191	1191	St ~
1192	1192	$EndEQUIPOT
1193	1193	$EQUIPOT
...	...
1227	1227	St ~
1228	1228	$EndEQUIPOT
1229	1229	$EQUIPOT
1230		Na 288 "/usb/USBD_VM"
	1230	Na 288 "/usb/USBD_OE_N"
1231	1231	St ~
1232	1232	$EndEQUIPOT
1233	1233	$EQUIPOT
1234		Na 289 "/usb/USBD_VP"
	1234	Na 289 "/usb/USBD_SPD"
1235	1235	St ~
1236	1236	$EndEQUIPOT
1237	1237	$EQUIPOT
...	...
1251	1251	St ~
1252	1252	$EndEQUIPOT
1253	1253	$EQUIPOT
1254		Na 294 "N-000131"
	1254	Na 294 "N-000121"
1255	1255	St ~
1256	1256	$EndEQUIPOT
1257	1257	$EQUIPOT
1258		Na 295 "N-000132"
	1258	Na 295 "N-000125"
1259	1259	St ~
1260	1260	$EndEQUIPOT
1261	1261	$EQUIPOT
...	...
1291	1291	St ~
1292	1292	$EndEQUIPOT
1293	1293	$EQUIPOT
1294		Na 304 "N-000157"
	1294	Na 304 "N-000158"
1295	1295	St ~
1296	1296	$EndEQUIPOT
1297	1297	$EQUIPOT
1298		Na 305 "N-000158"
	1298	Na 305 "N-000159"
1299	1299	St ~
1300	1300	$EndEQUIPOT
1301	1301	$EQUIPOT
...	...
1307	1307	St ~
1308	1308	$EndEQUIPOT
1309	1309	$EQUIPOT
1310		Na 308 "N-000163"
	1310	Na 308 "N-000162"
1311	1311	St ~
1312	1312	$EndEQUIPOT
1313	1313	$EQUIPOT
1314		Na 309 "N-000164"
	1314	Na 309 "N-000163"
1315	1315	St ~
1316	1316	$EndEQUIPOT
1317	1317	$EQUIPOT
...	...
1347	1347	St ~
1348	1348	$EndEQUIPOT
1349	1349	$EQUIPOT
1350		Na 318 "N-000174"
	1350	Na 318 "N-000173"
1351	1351	St ~
1352	1352	$EndEQUIPOT
1353	1353	$EQUIPOT
1354		Na 319 "N-000177"
	1354	Na 319 "N-000174"
1355	1355	St ~
1356	1356	$EndEQUIPOT
1357	1357	$EQUIPOT
1358		Na 320 "N-000178"
	1358	Na 320 "N-000175"
1359	1359	St ~
1360	1360	$EndEQUIPOT
1361	1361	$EQUIPOT
1362		Na 321 "N-000179"
	1362	Na 321 "N-000176"
1363	1363	St ~
1364	1364	$EndEQUIPOT
1365	1365	$EQUIPOT
1366		Na 322 "N-000182"
	1366	Na 322 "N-000177"
1367	1367	St ~
1368	1368	$EndEQUIPOT
1369	1369	$EQUIPOT
1370		Na 323 "N-000183"
	1370	Na 323 "N-000178"
1371	1371	St ~
1372	1372	$EndEQUIPOT
1373	1373	$EQUIPOT
1374		Na 324 "N-000188"
	1374	Na 324 "N-000179"
1375	1375	St ~
1376	1376	$EndEQUIPOT
1377	1377	$EQUIPOT
1378		Na 325 "N-000189"
	1378	Na 325 "N-000180"
1379	1379	St ~
1380	1380	$EndEQUIPOT
1381	1381	$EQUIPOT
1382		Na 326 "N-000190"
	1382	Na 326 "N-000181"
1383	1383	St ~
1384	1384	$EndEQUIPOT
1385	1385	$EQUIPOT
1386		Na 327 "N-000347"
	1386	Na 327 "N-000184"
1387	1387	St ~
1388	1388	$EndEQUIPOT
1389	1389	$EQUIPOT
1390		Na 328 "N-000350"
	1390	Na 328 "N-000185"
1391	1391	St ~
1392	1392	$EndEQUIPOT
1393	1393	$EQUIPOT
1394		Na 329 "VCCO2"
	1394	Na 329 "N-000186"
	1395	St ~
	1396	$EndEQUIPOT
	1397	$EQUIPOT
	1398	Na 330 "N-000190"
	1399	St ~
	1400	$EndEQUIPOT
	1401	$EQUIPOT
	1402	Na 331 "N-000201"
	1403	St ~
	1404	$EndEQUIPOT
	1405	$EQUIPOT
	1406	Na 332 "N-000202"
	1407	St ~
	1408	$EndEQUIPOT
	1409	$EQUIPOT
	1410	Na 333 "N-000203"
	1411	St ~
	1412	$EndEQUIPOT
	1413	$EQUIPOT
	1414	Na 334 "N-000362"
	1415	St ~
	1416	$EndEQUIPOT
	1417	$EQUIPOT
	1418	Na 335 "N-000365"
	1419	St ~
	1420	$EndEQUIPOT
	1421	$EQUIPOT
	1422	Na 336 "VCCO2"
1395	1423	St ~
1396	1424	$EndEQUIPOT
1397	1425	$NCLASS
...	...
1409	1437	AddNet "/ether/ETH_A3.3V"
1410	1438	AddNet "/ether/ETH_CLK"
1411	1439	AddNet "/ether/ETH_COL"
	1440	AddNet "/ether/ETH_CRS"
1412	1441	AddNet "/ether/ETH_INT"
1413	1442	AddNet "/ether/ETH_LED0"
1414	1443	AddNet "/ether/ETH_LED1"
	1444	AddNet "/ether/ETH_MDC"
	1445	AddNet "/ether/ETH_MDIO"
1415	1446	AddNet "/ether/ETH_PLL1.8V"
1416		AddNet "/ether/ETH_RXD0"
1417		AddNet "/ether/ETH_RXD2"
1418		AddNet "/ether/ETH_RXD3"
1419		AddNet "/ether/ETH_TXC"
	1447	AddNet "/ether/ETH_RXC"
	1448	AddNet "/ether/ETH_RXDV"
1420	1449	AddNet "/ether/ETH_TXD0"
1421		AddNet "/ether/ETH_TXD2"
1422	1450	AddNet "/ether/ETH_TXD3"
1423	1451	AddNet "/ether/ETH_TXER"
1424	1452	AddNet "/ether/MAG_RX+"
...	...
1427	1455	AddNet "/ether/MAG_TX+"
1428	1456	AddNet "/ether/MAG_TX-"
1429	1457	AddNet "/expansion/FPGA_BANK0_IO_1"
1430		AddNet "/expansion/FPGA_BANK0_IO_12"
	1458	AddNet "/expansion/FPGA_BANK0_IO_10"
	1459	AddNet "/expansion/FPGA_BANK0_IO_11"
1431	1460	AddNet "/expansion/FPGA_BANK0_IO_15"
1432	1461	AddNet "/expansion/FPGA_BANK0_IO_17"
1433		AddNet "/expansion/FPGA_BANK0_IO_18"
	1462	AddNet "/expansion/FPGA_BANK0_IO_2"
	1463	AddNet "/expansion/FPGA_BANK0_IO_20"
1434	1464	AddNet "/expansion/FPGA_BANK0_IO_21"
1435		AddNet "/expansion/FPGA_BANK0_IO_25"
1436		AddNet "/expansion/FPGA_BANK0_IO_27"
1437		AddNet "/expansion/FPGA_BANK0_IO_28"
	1465	AddNet "/expansion/FPGA_BANK0_IO_29"
	1466	AddNet "/expansion/FPGA_BANK0_IO_3"
1438	1467	AddNet "/expansion/FPGA_BANK0_IO_32"
1439		AddNet "/expansion/FPGA_BANK0_IO_36"
	1468	AddNet "/expansion/FPGA_BANK0_IO_34"
1440	1469	AddNet "/expansion/FPGA_BANK0_IO_38"
1441	1470	AddNet "/expansion/FPGA_BANK0_IO_39"
	1471	AddNet "/expansion/FPGA_BANK0_IO_40"
1442	1472	AddNet "/expansion/FPGA_BANK0_IO_43"
1443	1473	AddNet "/expansion/FPGA_BANK0_IO_46"
1444		AddNet "/expansion/FPGA_BANK0_IO_49"
	1474	AddNet "/expansion/FPGA_BANK0_IO_47"
1445	1475	AddNet "/expansion/FPGA_BANK0_IO_5"
1446	1476	AddNet "/expansion/FPGA_BANK0_IO_50"
1447		AddNet "/expansion/FPGA_BANK0_IO_52"
1448		AddNet "/expansion/FPGA_BANK0_IO_53"
1449	1477	AddNet "/expansion/FPGA_BANK0_IO_54"
1450		AddNet "/expansion/FPGA_BANK0_IO_56"
1451		AddNet "/expansion/FPGA_BANK0_IO_63"
	1478	AddNet "/expansion/FPGA_BANK0_IO_6"
	1479	AddNet "/expansion/FPGA_BANK0_IO_7"
1452	1480	AddNet "/expansion/FPGA_BANK0_IO_9"
	1481	AddNet "/flash/NF_ALE"
	1482	AddNet "/flash/NF_CLE"
	1483	AddNet "/flash/NF_CS1_N"
	1484	AddNet "/flash/NF_D0"
	1485	AddNet "/flash/NF_D1"
1453	1486	AddNet "/flash/NF_D3"
1454	1487	AddNet "/flash/NF_D5"
1455		AddNet "/flash/NF_RNB"
1456		AddNet "/flash/NF_WE_N"
1457		AddNet "/flash/SD_CMD"
1458		AddNet "/flash/SD_DAT0"
	1488	AddNet "/flash/NF_D7"
	1489	AddNet "/flash/NF_RE_N"
1459	1490	AddNet "/flash/SD_DAT2"
1460		AddNet "/fpga1/ETH_CRS"
1461		AddNet "/fpga1/ETH_MDC"
1462		AddNet "/fpga1/ETH_MDIO"
1463	1491	AddNet "/fpga1/ETH_RESET_N"
1464		AddNet "/fpga1/ETH_RXC"
	1492	AddNet "/fpga1/ETH_RXD0"
1465	1493	AddNet "/fpga1/ETH_RXD1"
1466		AddNet "/fpga1/ETH_RXDV"
	1494	AddNet "/fpga1/ETH_RXD2"
	1495	AddNet "/fpga1/ETH_RXD3"
1467	1496	AddNet "/fpga1/ETH_RXER"
	1497	AddNet "/fpga1/ETH_TXC"
1468	1498	AddNet "/fpga1/ETH_TXD1"
	1499	AddNet "/fpga1/ETH_TXD2"
1469	1500	AddNet "/fpga1/ETH_TXEN"
1470		AddNet "/fpga1/FPGA_BANK0_IO_10"
1471		AddNet "/fpga1/FPGA_BANK0_IO_11"
	1501	AddNet "/fpga1/FPGA_BANK0_IO_12"
1472	1502	AddNet "/fpga1/FPGA_BANK0_IO_14"
1473		AddNet "/fpga1/FPGA_BANK0_IO_2"
1474		AddNet "/fpga1/FPGA_BANK0_IO_20"
	1503	AddNet "/fpga1/FPGA_BANK0_IO_18"
1475	1504	AddNet "/fpga1/FPGA_BANK0_IO_22"
1476	1505	AddNet "/fpga1/FPGA_BANK0_IO_24"
1477		AddNet "/fpga1/FPGA_BANK0_IO_29"
1478		AddNet "/fpga1/FPGA_BANK0_IO_3"
	1506	AddNet "/fpga1/FPGA_BANK0_IO_25"
	1507	AddNet "/fpga1/FPGA_BANK0_IO_27"
	1508	AddNet "/fpga1/FPGA_BANK0_IO_28"
1479	1509	AddNet "/fpga1/FPGA_BANK0_IO_30"
1480	1510	AddNet "/fpga1/FPGA_BANK0_IO_33"
1481		AddNet "/fpga1/FPGA_BANK0_IO_34"
1482		AddNet "/fpga1/FPGA_BANK0_IO_40"
	1511	AddNet "/fpga1/FPGA_BANK0_IO_36"
1483	1512	AddNet "/fpga1/FPGA_BANK0_IO_44"
1484	1513	AddNet "/fpga1/FPGA_BANK0_IO_45"
1485		AddNet "/fpga1/FPGA_BANK0_IO_47"
1486	1514	AddNet "/fpga1/FPGA_BANK0_IO_48"
	1515	AddNet "/fpga1/FPGA_BANK0_IO_49"
1487	1516	AddNet "/fpga1/FPGA_BANK0_IO_51"
	1517	AddNet "/fpga1/FPGA_BANK0_IO_52"
	1518	AddNet "/fpga1/FPGA_BANK0_IO_53"
	1519	AddNet "/fpga1/FPGA_BANK0_IO_56"
1488	1520	AddNet "/fpga1/FPGA_BANK0_IO_57"
1489	1521	AddNet "/fpga1/FPGA_BANK0_IO_58"
1490		AddNet "/fpga1/FPGA_BANK0_IO_6"
1491	1522	AddNet "/fpga1/FPGA_BANK0_IO_60"
1492	1523	AddNet "/fpga1/FPGA_BANK0_IO_62"
1493		AddNet "/fpga1/FPGA_BANK0_IO_7"
	1524	AddNet "/fpga1/FPGA_BANK0_IO_63"
1494	1525	AddNet "/fpga1/FPGA_BANK0_IO_8"
1495		AddNet "/fpga1/NF_ALE"
1496		AddNet "/fpga1/NF_CLE"
1497		AddNet "/fpga1/NF_CS1_N"
1498		AddNet "/fpga1/NF_D0"
1499		AddNet "/fpga1/NF_D1"
1500	1526	AddNet "/fpga1/NF_D2"
1501	1527	AddNet "/fpga1/NF_D4"
1502	1528	AddNet "/fpga1/NF_D6"
1503		AddNet "/fpga1/NF_D7"
1504		AddNet "/fpga1/NF_RE_N"
	1529	AddNet "/fpga1/NF_RNB"
	1530	AddNet "/fpga1/NF_WE_N"
1505	1531	AddNet "/fpga1/PROG_CCLK"
1506	1532	AddNet "/fpga1/PROG_CSO"
1507	1533	AddNet "/fpga1/PROG_MISO0"
...	...
1509	1535	AddNet "/fpga1/PROG_MISO2"
1510	1536	AddNet "/fpga1/PROG_MISO3"
1511	1537	AddNet "/fpga1/SD_CLK"
	1538	AddNet "/fpga1/SD_CMD"
	1539	AddNet "/fpga1/SD_DAT0"
1512	1540	AddNet "/fpga1/SD_DAT1"
1513	1541	AddNet "/fpga1/SD_DAT3"
1514	1542	AddNet "/fpga2/M0_A0"
1515		AddNet "/fpga2/M0_A1"
1516		AddNet "/fpga2/M0_A11"
	1543	AddNet "/fpga2/M0_A10"
	1544	AddNet "/fpga2/M0_A12"
1517	1545	AddNet "/fpga2/M0_A2"
1518		AddNet "/fpga2/M0_A3"
1519	1546	AddNet "/fpga2/M0_A4"
1520	1547	AddNet "/fpga2/M0_A5"
1521		AddNet "/fpga2/M0_A6"
1522	1548	AddNet "/fpga2/M0_A7"
	1549	AddNet "/fpga2/M0_A8"
1523	1550	AddNet "/fpga2/M0_A9"
	1551	AddNet "/fpga2/M0_BA0"
1524	1552	AddNet "/fpga2/M0_CAS#"
1525		AddNet "/fpga2/M0_CLK#"
	1553	AddNet "/fpga2/M0_CLK"
1526	1554	AddNet "/fpga2/M0_DQ0"
1527	1555	AddNet "/fpga2/M0_DQ1"
1528	1556	AddNet "/fpga2/M0_DQ10"
1529	1557	AddNet "/fpga2/M0_DQ11"
1530		AddNet "/fpga2/M0_DQ12"
1531		AddNet "/fpga2/M0_DQ13"
1532		AddNet "/fpga2/M0_DQ14"
1533	1558	AddNet "/fpga2/M0_DQ15"
	1559	AddNet "/fpga2/M0_DQ2"
1534	1560	AddNet "/fpga2/M0_DQ3"
1535		AddNet "/fpga2/M0_DQ5"
	1561	AddNet "/fpga2/M0_DQ6"
1536	1562	AddNet "/fpga2/M0_DQ7"
	1563	AddNet "/fpga2/M0_DQ9"
1537	1564	AddNet "/fpga2/M0_LDM"
1538	1565	AddNet "/fpga2/M0_LDQS"
1539		AddNet "/fpga2/M0_UDQS"
1540		AddNet "/fpga2/M0_WE#"
	1566	AddNet "/fpga2/M0_UDM"
1541	1567	AddNet "/fpga2/M1_A0"
1542		AddNet "/fpga2/M1_A1"
1543		AddNet "/fpga2/M1_A12"
	1568	AddNet "/fpga2/M1_A11"
1544	1569	AddNet "/fpga2/M1_A2"
1545		AddNet "/fpga2/M1_A5"
1546	1570	AddNet "/fpga2/M1_A6"
1547	1571	AddNet "/fpga2/M1_A7"
1548	1572	AddNet "/fpga2/M1_A8"
1549	1573	AddNet "/fpga2/M1_A9"
1550		AddNet "/fpga2/M1_CAS#"
	1574	AddNet "/fpga2/M1_BA1"
	1575	AddNet "/fpga2/M1_CKE"
1551	1576	AddNet "/fpga2/M1_CLK"
1552	1577	AddNet "/fpga2/M1_CLK#"
1553	1578	AddNet "/fpga2/M1_CS#"
1554	1579	AddNet "/fpga2/M1_DQ0"
1555		AddNet "/fpga2/M1_DQ1"
1556	1580	AddNet "/fpga2/M1_DQ10"
1557		AddNet "/fpga2/M1_DQ12"
1558		AddNet "/fpga2/M1_DQ13"
	1581	AddNet "/fpga2/M1_DQ11"
	1582	AddNet "/fpga2/M1_DQ14"
1559	1583	AddNet "/fpga2/M1_DQ15"
1560	1584	AddNet "/fpga2/M1_DQ2"
1561		AddNet "/fpga2/M1_DQ5"
	1585	AddNet "/fpga2/M1_DQ3"
	1586	AddNet "/fpga2/M1_DQ4"
	1587	AddNet "/fpga2/M1_DQ7"
1562	1588	AddNet "/fpga2/M1_DQ8"
1563	1589	AddNet "/fpga2/M1_DQ9"
1564	1590	AddNet "/fpga2/M1_LDM"
1565		AddNet "/fpga2/M1_LDQS"
	1591	AddNet "/fpga2/M1_UDQS"
1566	1592	AddNet "/fpga2/R_M0_A0"
1567	1593	AddNet "/fpga2/R_M0_A1"
1568	1594	AddNet "/fpga2/R_M0_A10"
...	...
1644	1670	AddNet "/fpga2/R_M1_WE#"
1645	1671	AddNet "/fpga2/USBA_RCV"
1646	1672	AddNet "/fpga2/USBA_VP"
1647		AddNet "/fpga2/USBD_OE_N"
1648	1673	AddNet "/fpga2/USBD_RCV"
1649		AddNet "/fpga2/USBD_SPD"
1650		AddNet "/sdram/M0_A10"
1651		AddNet "/sdram/M0_A12"
1652		AddNet "/sdram/M0_A8"
1653		AddNet "/sdram/M0_BA0"
	1674	AddNet "/fpga2/USBD_VM"
	1675	AddNet "/fpga2/USBD_VP"
	1676	AddNet "/sdram/M0_A1"
	1677	AddNet "/sdram/M0_A11"
	1678	AddNet "/sdram/M0_A3"
	1679	AddNet "/sdram/M0_A6"
1654	1680	AddNet "/sdram/M0_BA1"
1655	1681	AddNet "/sdram/M0_CKE"
1656		AddNet "/sdram/M0_CLK"
1657		AddNet "/sdram/M0_DQ2"
	1682	AddNet "/sdram/M0_CLK#"
	1683	AddNet "/sdram/M0_DQ12"
	1684	AddNet "/sdram/M0_DQ13"
	1685	AddNet "/sdram/M0_DQ14"
1658	1686	AddNet "/sdram/M0_DQ4"
1659		AddNet "/sdram/M0_DQ6"
	1687	AddNet "/sdram/M0_DQ5"
1660	1688	AddNet "/sdram/M0_DQ8"
1661		AddNet "/sdram/M0_DQ9"
1662	1689	AddNet "/sdram/M0_RAS#"
1663		AddNet "/sdram/M0_UDM"
	1690	AddNet "/sdram/M0_UDQS"
1664	1691	AddNet "/sdram/M0_VREF"
	1692	AddNet "/sdram/M0_WE#"
	1693	AddNet "/sdram/M1_A1"
1665	1694	AddNet "/sdram/M1_A10"
1666		AddNet "/sdram/M1_A11"
	1695	AddNet "/sdram/M1_A12"
1667	1696	AddNet "/sdram/M1_A3"
1668	1697	AddNet "/sdram/M1_A4"
	1698	AddNet "/sdram/M1_A5"
1669	1699	AddNet "/sdram/M1_BA0"
1670		AddNet "/sdram/M1_BA1"
1671		AddNet "/sdram/M1_CKE"
1672		AddNet "/sdram/M1_DQ11"
1673		AddNet "/sdram/M1_DQ14"
1674		AddNet "/sdram/M1_DQ3"
1675		AddNet "/sdram/M1_DQ4"
	1700	AddNet "/sdram/M1_CAS#"
	1701	AddNet "/sdram/M1_DQ1"
	1702	AddNet "/sdram/M1_DQ12"
	1703	AddNet "/sdram/M1_DQ13"
	1704	AddNet "/sdram/M1_DQ5"
1676	1705	AddNet "/sdram/M1_DQ6"
1677		AddNet "/sdram/M1_DQ7"
	1706	AddNet "/sdram/M1_LDQS"
1678	1707	AddNet "/sdram/M1_RAS#"
1679	1708	AddNet "/sdram/M1_UDM"
1680		AddNet "/sdram/M1_UDQS"
1681	1709	AddNet "/sdram/M1_VREF"
1682	1710	AddNet "/sdram/M1_WE#"
1683	1711	AddNet "/usb/USBA_D+"
...	...
1687	1715	AddNet "/usb/USBA_VM"
1688	1716	AddNet "/usb/USBD_D+"
1689	1717	AddNet "/usb/USBD_D-"
1690		AddNet "/usb/USBD_VM"
1691		AddNet "/usb/USBD_VP"
	1718	AddNet "/usb/USBD_OE_N"
	1719	AddNet "/usb/USBD_SPD"
1692	1720	AddNet "/usb/USB_CASE_DEV"
1693	1721	AddNet "/usb/USB_CASE_HOST"
1694	1722	AddNet "N-000120"
1695		AddNet "N-000131"
1696		AddNet "N-000132"
	1723	AddNet "N-000121"
	1724	AddNet "N-000125"
1697	1725	AddNet "N-000141"
1698	1726	AddNet "N-000142"
1699	1727	AddNet "N-000143"
...	...
1702	1730	AddNet "N-000149"
1703	1731	AddNet "N-000150"
1704	1732	AddNet "N-000153"
1705		AddNet "N-000157"
1706	1733	AddNet "N-000158"
	1734	AddNet "N-000159"
1707	1735	AddNet "N-000160"
1708	1736	AddNet "N-000161"
	1737	AddNet "N-000162"
1709	1738	AddNet "N-000163"
1710		AddNet "N-000164"
1711	1739	AddNet "N-000165"
1712	1740	AddNet "N-000166"
1713	1741	AddNet "N-000167"
...	...
1716	1744	AddNet "N-000170"
1717	1745	AddNet "N-000171"
1718	1746	AddNet "N-000172"
	1747	AddNet "N-000173"
1719	1748	AddNet "N-000174"
	1749	AddNet "N-000175"
	1750	AddNet "N-000176"
1720	1751	AddNet "N-000177"
1721	1752	AddNet "N-000178"
1722	1753	AddNet "N-000179"
1723		AddNet "N-000182"
1724		AddNet "N-000183"
1725		AddNet "N-000188"
1726		AddNet "N-000189"
	1754	AddNet "N-000180"
	1755	AddNet "N-000181"
	1756	AddNet "N-000184"
	1757	AddNet "N-000185"
	1758	AddNet "N-000186"
1727	1759	AddNet "N-000190"
1728		AddNet "N-000347"
1729		AddNet "N-000350"
	1760	AddNet "N-000201"
	1761	AddNet "N-000202"
	1762	AddNet "N-000203"
	1763	AddNet "N-000362"
	1764	AddNet "N-000365"
1730	1765	AddNet "VCCO2"
1731	1766	$EndNCLASS
1732	1767	$NCLASS
...	...
1860	1895	Sh "A6" O 158 157 0 0 0
1861	1896	Dr 0 0 0
1862	1897	At SMD N 00888000
1863		Ne 64 "/fpga1/ETH_RXDV"
	1898	Ne 18 "/ether/ETH_RXDV"
1864	1899	Po -2165 -4133
1865	1900	$EndPAD
1866	1901	$PAD
1867	1902	Sh "A7" O 158 157 0 0 0
1868	1903	Dr 0 0 0
1869	1904	At SMD N 00888000
1870		Ne 62 "/fpga1/ETH_RXC"
	1905	Ne 17 "/ether/ETH_RXC"
1871	1906	Po -1771 -4133
1872	1907	$EndPAD
1873	1908	$PAD
...	...
1888	1923	Sh "A10" O 158 157 0 0 0
1889	1924	Dr 0 0 0
1890	1925	At SMD N 00888000
1891		Ne 10 "/ether/ETH_INT"
	1926	Ne 11 "/ether/ETH_INT"
1892	1927	Po -590 -4133
1893	1928	$EndPAD
1894	1929	$PAD
1895	1930	Sh "A11" O 157 157 0 0 0
1896	1931	Dr 0 0 0
1897	1932	At SMD N 00888000
1898		Ne 100 "/fpga1/NF_D6"
	1933	Ne 98 "/fpga1/NF_D6"
1899	1934	Po -196 -4133
1900	1935	$EndPAD
1901	1936	$PAD
1902	1937	Sh "A12" O 157 157 0 0 0
1903	1938	Dr 0 0 0
1904	1939	At SMD N 00888000
1905		Ne 99 "/fpga1/NF_D4"
	1940	Ne 97 "/fpga1/NF_D4"
1906	1941	Po 196 -4133
1907	1942	$EndPAD
1908	1943	$PAD
1909	1944	Sh "A13" O 158 157 0 0 0
1910	1945	Dr 0 0 0
1911	1946	At SMD N 00888000
1912		Ne 98 "/fpga1/NF_D2"
	1947	Ne 96 "/fpga1/NF_D2"
1913	1948	Po 590 -4133
1914	1949	$EndPAD
1915	1950	$PAD
1916	1951	Sh "A14" O 157 157 0 0 0
1917	1952	Dr 0 0 0
1918	1953	At SMD N 00888000
1919		Ne 93 "/fpga1/NF_ALE"
	1954	Ne 51 "/flash/NF_ALE"
1920	1955	Po 983 -4133
1921	1956	$EndPAD
1922	1957	$PAD
1923	1958	Sh "A15" O 157 157 0 0 0
1924	1959	Dr 0 0 0
1925	1960	At SMD N 00888000
1926		Ne 53 "/flash/NF_RNB"
	1961	Ne 99 "/fpga1/NF_RNB"
1927	1962	Po 1377 -4133
1928	1963	$EndPAD
1929	1964	$PAD
1930	1965	Sh "A16" O 158 157 0 0 0
1931	1966	Dr 0 0 0
1932	1967	At SMD N 00888000
1933		Ne 57 "/flash/SD_DAT2"
	1968	Ne 60 "/flash/SD_DAT2"
1934	1969	Po 1771 -4133
1935	1970	$EndPAD
1936	1971	$PAD
1937	1972	Sh "A17" O 158 157 0 0 0
1938	1973	Dr 0 0 0
1939	1974	At SMD N 00888000
1940		Ne 109 "/fpga1/SD_CLK"
	1975	Ne 107 "/fpga1/SD_CLK"
1941	1976	Po 2165 -4133
1942	1977	$EndPAD
1943	1978	$PAD
1944	1979	Sh "A18" O 157 157 0 0 0
1945	1980	Dr 0 0 0
1946	1981	At SMD N 00888000
1947		Ne 56 "/flash/SD_DAT0"
	1982	Ne 109 "/fpga1/SD_DAT0"
1948	1983	Po 2558 -4133
1949	1984	$EndPAD
1950	1985	$PAD
...	...
1958	1993	Sh "A20" O 158 157 0 0 0
1959	1994	Dr 0 0 0
1960	1995	At SMD N 00888000
1961		Ne 246 "/fpga2/USBD_RCV"
	1996	Ne 243 "/fpga2/USBD_RCV"
1962	1997	Po 3346 -4133
1963	1998	$EndPAD
1964	1999	$PAD
1965	2000	Sh "A21" O 157 157 0 0 0
1966	2001	Dr 0 0 0
1967	2002	At SMD N 00888000
1968		Ne 245 "/fpga2/USBD_OE_N"
	2003	Ne 288 "/usb/USBD_OE_N"
1969	2004	Po 3739 -4133
1970	2005	$EndPAD
1971	2006	$PAD
...	...
2014	2049	Sh "B6" O 158 157 0 0 0
2015	2050	Dr 0 0 0
2016	2051	At SMD N 00888000
2017		Ne 14 "/ether/ETH_RXD0"
	2052	Ne 62 "/fpga1/ETH_RXD0"
2018	2053	Po -2165 -3739
2019	2054	$EndPAD
2020	2055	$PAD
...	...
2028	2063	Sh "B8" O 157 157 0 0 0
2029	2064	Dr 0 0 0
2030	2065	At SMD N 00888000
2031		Ne 65 "/fpga1/ETH_RXER"
	2066	Ne 66 "/fpga1/ETH_RXER"
2032	2067	Po -1377 -3739
2033	2068	$EndPAD
2034	2069	$PAD
...	...
2042	2077	Sh "B10" O 158 157 0 0 0
2043	2078	Dr 0 0 0
2044	2079	At SMD N 00888000
2045		Ne 58 "/fpga1/ETH_CRS"
	2080	Ne 10 "/ether/ETH_CRS"
2046	2081	Po -590 -3739
2047	2082	$EndPAD
2048	2083	$PAD
...	...
2056	2091	Sh "B12" O 157 157 0 0 0
2057	2092	Dr 0 0 0
2058	2093	At SMD N 00888000
2059		Ne 51 "/flash/NF_D3"
	2094	Ne 56 "/flash/NF_D3"
2060	2095	Po 196 -3739
2061	2096	$EndPAD
2062	2097	$PAD
...	...
2070	2105	Sh "B14" O 157 157 0 0 0
2071	2106	Dr 0 0 0
2072	2107	At SMD N 00888000
2073		Ne 94 "/fpga1/NF_CLE"
	2108	Ne 52 "/flash/NF_CLE"
2074	2109	Po 983 -3739
2075	2110	$EndPAD
2076	2111	$PAD
...	...
2112	2147	Sh "B20" O 158 157 0 0 0
2113	2148	Dr 0 0 0
2114	2149	At SMD N 00888000
2115		Ne 247 "/fpga2/USBD_SPD"
	2150	Ne 289 "/usb/USBD_SPD"
2116	2151	Po 3346 -3739
2117	2152	$EndPAD
2118	2153	$PAD
2119	2154	Sh "B21" O 157 157 0 0 0
2120	2155	Dr 0 0 0
2121	2156	At SMD N 00888000
2122		Ne 289 "/usb/USBD_VP"
	2157	Ne 245 "/fpga2/USBD_VP"
2123	2158	Po 3739 -3739
2124	2159	$EndPAD
2125	2160	$PAD
2126	2161	Sh "B22" O 157 157 0 0 0
2127	2162	Dr 0 0 0
2128	2163	At SMD N 00888000
2129		Ne 288 "/usb/USBD_VM"
	2164	Ne 244 "/fpga2/USBD_VM"
2130	2165	Po 4133 -3739
2131	2166	$EndPAD
2132	2167	$PAD
2133	2168	Sh "C1" O 157 158 0 0 0
2134	2169	Dr 0 0 0
2135	2170	At SMD N 00888000
2136		Ne 167 "/fpga2/R_M0_A11"
	2171	Ne 165 "/fpga2/R_M0_A11"
2137	2172	Po -4133 -3346
2138	2173	$EndPAD
2139	2174	$PAD
...	...
2161	2196	Sh "C5" O 157 158 0 0 0
2162	2197	Dr 0 0 0
2163	2198	At SMD N 00888000
2164		Ne 16 "/ether/ETH_RXD3"
	2199	Ne 65 "/fpga1/ETH_RXD3"
2165	2200	Po -2558 -3346
2166	2201	$EndPAD
2167	2202	$PAD
2168	2203	Sh "C6" O 158 158 0 0 0
2169	2204	Dr 0 0 0
2170	2205	At SMD N 00888000
2171		Ne 15 "/ether/ETH_RXD2"
	2206	Ne 64 "/fpga1/ETH_RXD2"
2172	2207	Po -2165 -3346
2173	2208	$EndPAD
2174	2209	$PAD
...	...
2182	2217	Sh "C8" O 157 158 0 0 0
2183	2218	Dr 0 0 0
2184	2219	At SMD N 00888000
2185		Ne 17 "/ether/ETH_TXC"
	2220	Ne 67 "/fpga1/ETH_TXC"
2186	2221	Po -1377 -3346
2187	2222	$EndPAD
2188	2223	$PAD
2189	2224	Sh "C9" O 157 158 0 0 0
2190	2225	Dr 0 0 0
2191	2226	At SMD N 00888000
2192		Ne 66 "/fpga1/ETH_TXD1"
	2227	Ne 68 "/fpga1/ETH_TXD1"
2193	2228	Po -983 -3346
2194	2229	$EndPAD
2195	2230	$PAD
2196	2231	Sh "C10" O 158 158 0 0 0
2197	2232	Dr 0 0 0
2198	2233	At SMD N 00888000
2199		Ne 19 "/ether/ETH_TXD2"
	2234	Ne 69 "/fpga1/ETH_TXD2"
2200	2235	Po -590 -3346
2201	2236	$EndPAD
2202	2237	$PAD
2203	2238	Sh "C11" O 157 158 0 0 0
2204	2239	Dr 0 0 0
2205	2240	At SMD N 00888000
2206		Ne 52 "/flash/NF_D5"
	2241	Ne 57 "/flash/NF_D5"
2207	2242	Po -196 -3346
2208	2243	$EndPAD
2209	2244	$PAD
2210	2245	Sh "C12" O 157 158 0 0 0
2211	2246	Dr 0 0 0
2212	2247	At SMD N 00888000
2213		Ne 96 "/fpga1/NF_D0"
	2248	Ne 54 "/flash/NF_D0"
2214	2249	Po 196 -3346
2215	2250	$EndPAD
2216	2251	$PAD
...	...
2224	2259	Sh "C14" O 157 158 0 0 0
2225	2260	Dr 0 0 0
2226	2261	At SMD N 00888000
2227		Ne 54 "/flash/NF_WE_N"
	2262	Ne 100 "/fpga1/NF_WE_N"
2228	2263	Po 983 -3346
2229	2264	$EndPAD
2230	2265	$PAD
2231	2266	Sh "C15" O 157 158 0 0 0
2232	2267	Dr 0 0 0
2233	2268	At SMD N 00888000
2234		Ne 102 "/fpga1/NF_RE_N"
	2269	Ne 59 "/flash/NF_RE_N"
2235	2270	Po 1377 -3346
2236	2271	$EndPAD
2237	2272	$PAD
2238	2273	Sh "C16" O 158 158 0 0 0
2239	2274	Dr 0 0 0
2240	2275	At SMD N 00888000
2241		Ne 55 "/flash/SD_CMD"
	2276	Ne 108 "/fpga1/SD_CMD"
2242	2277	Po 1771 -3346
2243	2278	$EndPAD
2244	2279	$PAD
...	...
2266	2301	Sh "C20" O 158 158 0 0 0
2267	2302	Dr 0 0 0
2268	2303	At SMD N 00888000
2269		Ne 214 "/fpga2/R_M1_A8"
	2304	Ne 212 "/fpga2/R_M1_A8"
2270	2305	Po 3346 -3346
2271	2306	$EndPAD
2272	2307	$PAD
...	...
2280	2315	Sh "C22" O 157 158 0 0 0
2281	2316	Dr 0 0 0
2282	2317	At SMD N 00888000
2283		Ne 215 "/fpga2/R_M1_A9"
	2318	Ne 213 "/fpga2/R_M1_A9"
2284	2319	Po 4133 -3346
2285	2320	$EndPAD
2286	2321	$PAD
2287	2322	Sh "D1" O 157 157 0 0 0
2288	2323	Dr 0 0 0
2289	2324	At SMD N 00888000
2290		Ne 168 "/fpga2/R_M0_A12"
	2325	Ne 166 "/fpga2/R_M0_A12"
2291	2326	Po -4133 -2952
2292	2327	$EndPAD
2293	2328	$PAD
2294	2329	Sh "D2" O 157 157 0 0 0
2295	2330	Dr 0 0 0
2296	2331	At SMD N 00888000
2297		Ne 180 "/fpga2/R_M0_CKE"
	2332	Ne 178 "/fpga2/R_M0_CKE"
2298	2333	Po -3739 -2952
2299	2334	$EndPAD
2300	2335	$PAD
...	...
2322	2357	Sh "D6" O 158 157 0 0 0
2323	2358	Dr 0 0 0
2324	2359	At SMD N 00888000
2325		Ne 60 "/fpga1/ETH_MDIO"
	2360	Ne 15 "/ether/ETH_MDIO"
2326	2361	Po -2165 -2952
2327	2362	$EndPAD
2328	2363	$PAD
2329	2364	Sh "D7" O 158 157 0 0 0
2330	2365	Dr 0 0 0
2331	2366	At SMD N 00888000
2332		Ne 59 "/fpga1/ETH_MDC"
	2367	Ne 14 "/ether/ETH_MDC"
2333	2368	Po -1771 -2952
2334	2369	$EndPAD
2335	2370	$PAD
...	...
2343	2378	Sh "D9" O 157 157 0 0 0
2344	2379	Dr 0 0 0
2345	2380	At SMD N 00888000
2346		Ne 67 "/fpga1/ETH_TXEN"
	2381	Ne 70 "/fpga1/ETH_TXEN"
2347	2382	Po -983 -2952
2348	2383	$EndPAD
2349	2384	$PAD
2350	2385	Sh "D10" O 158 157 0 0 0
2351	2386	Dr 0 0 0
2352	2387	At SMD N 00888000
2353		Ne 18 "/ether/ETH_TXD0"
	2388	Ne 19 "/ether/ETH_TXD0"
2354	2389	Po -590 -2952
2355	2390	$EndPAD
2356	2391	$PAD
2357	2392	Sh "D11" O 157 157 0 0 0
2358	2393	Dr 0 0 0
2359	2394	At SMD N 00888000
2360		Ne 101 "/fpga1/NF_D7"
	2395	Ne 58 "/flash/NF_D7"
2361	2396	Po -196 -2952
2362	2397	$EndPAD
2363	2398	$PAD
...	...
2378	2413	Sh "D14" O 157 157 0 0 0
2379	2414	Dr 0 0 0
2380	2415	At SMD N 00888000
2381		Ne 97 "/fpga1/NF_D1"
	2416	Ne 55 "/flash/NF_D1"
2382	2417	Po 983 -2952
2383	2418	$EndPAD
2384	2419	$PAD
2385	2420	Sh "D15" O 157 157 0 0 0
2386	2421	Dr 0 0 0
2387	2422	At SMD N 00888000
2388		Ne 95 "/fpga1/NF_CS1_N"
	2423	Ne 53 "/flash/NF_CS1_N"
2389	2424	Po 1377 -2952
2390	2425	$EndPAD
2391	2426	$PAD
...	...
2413	2448	Sh "D19" O 157 157 0 0 0
2414	2449	Dr 0 0 0
2415	2450	At SMD N 00888000
2416		Ne 244 "/fpga2/USBA_VP"
	2451	Ne 242 "/fpga2/USBA_VP"
2417	2452	Po 2952 -2952
2418	2453	$EndPAD
2419	2454	$PAD
...	...
2427	2462	Sh "D21" O 157 157 0 0 0
2428	2463	Dr 0 0 0
2429	2464	At SMD N 00888000
2430		Ne 219 "/fpga2/R_M1_CKE"
	2465	Ne 217 "/fpga2/R_M1_CKE"
2431	2466	Po 3739 -2952
2432	2467	$EndPAD
2433	2468	$PAD
2434	2469	Sh "D22" O 157 157 0 0 0
2435	2470	Dr 0 0 0
2436	2471	At SMD N 00888000
2437		Ne 207 "/fpga2/R_M1_A12"
	2472	Ne 205 "/fpga2/R_M1_A12"
2438	2473	Po 4133 -2952
2439	2474	$EndPAD
2440	2475	$PAD
2441	2476	Sh "E1" O 157 157 0 0 0
2442	2477	Dr 0 0 0
2443	2478	At SMD N 00888000
2444		Ne 176 "/fpga2/R_M0_A9"
	2479	Ne 174 "/fpga2/R_M0_A9"
2445	2480	Po -4133 -2558
2446	2481	$EndPAD
2447	2482	$PAD
...	...
2455	2490	Sh "E3" O 158 157 0 0 0
2456	2491	Dr 0 0 0
2457	2492	At SMD N 00888000
2458		Ne 175 "/fpga2/R_M0_A8"
	2493	Ne 173 "/fpga2/R_M0_A8"
2459	2494	Po -3346 -2558
2460	2495	$EndPAD
2461	2496	$PAD
...	...
2574	2609	Sh "E20" O 158 157 0 0 0
2575	2610	Dr 0 0 0
2576	2611	At SMD N 00888000
2577		Ne 213 "/fpga2/R_M1_A7"
	2612	Ne 211 "/fpga2/R_M1_A7"
2578	2613	Po 3346 -2558
2579	2614	$EndPAD
2580	2615	$PAD
...	...
2588	2623	Sh "E22" O 157 157 0 0 0
2589	2624	Dr 0 0 0
2590	2625	At SMD N 00888000
2591		Ne 208 "/fpga2/R_M1_A2"
	2626	Ne 206 "/fpga2/R_M1_A2"
2592	2627	Po 4133 -2558
2593	2628	$EndPAD
2594	2629	$PAD
...	...
2602	2637	Sh "F2" O 157 158 0 0 0
2603	2638	Dr 0 0 0
2604	2639	At SMD N 00888000
2605		Ne 202 "/fpga2/R_M0_WE#"
	2640	Ne 200 "/fpga2/R_M0_WE#"
2606	2641	Po -3739 -2165
2607	2642	$EndPAD
2608	2643	$PAD
2609	2644	Sh "F3" O 158 158 0 0 0
2610	2645	Dr 0 0 0
2611	2646	At SMD N 00888000
2612		Ne 171 "/fpga2/R_M0_A4"
	2647	Ne 169 "/fpga2/R_M0_A4"
2613	2648	Po -3346 -2165
2614	2649	$EndPAD
2615	2650	$PAD
...	...
2707	2742	Sh "F17" O 158 158 0 0 0
2708	2743	Dr 0 0 0
2709	2744	At SMD N 00888000
2710		Ne 243 "/fpga2/USBA_RCV"
	2745	Ne 241 "/fpga2/USBA_RCV"
2711	2746	Po 2165 -2165
2712	2747	$EndPAD
2713	2748	$PAD
...	...
2721	2756	Sh "F19" O 157 158 0 0 0
2722	2757	Dr 0 0 0
2723	2758	At SMD N 00888000
2724		Ne 206 "/fpga2/R_M1_A11"
	2759	Ne 204 "/fpga2/R_M1_A11"
2725	2760	Po 2952 -2165
2726	2761	$EndPAD
2727	2762	$PAD
2728	2763	Sh "F20" O 158 158 0 0 0
2729	2764	Dr 0 0 0
2730	2765	At SMD N 00888000
2731		Ne 210 "/fpga2/R_M1_A4"
	2766	Ne 208 "/fpga2/R_M1_A4"
2732	2767	Po 3346 -2165
2733	2768	$EndPAD
2734	2769	$PAD
2735	2770	Sh "F21" O 157 158 0 0 0
2736	2771	Dr 0 0 0
2737	2772	At SMD N 00888000
2738		Ne 203 "/fpga2/R_M1_A0"
	2773	Ne 201 "/fpga2/R_M1_A0"
2739	2774	Po 3739 -2165
2740	2775	$EndPAD
2741	2776	$PAD
2742	2777	Sh "F22" O 157 158 0 0 0
2743	2778	Dr 0 0 0
2744	2779	At SMD N 00888000
2745		Ne 204 "/fpga2/R_M1_A1"
	2780	Ne 202 "/fpga2/R_M1_A1"
2746	2781	Po 4133 -2165
2747	2782	$EndPAD
2748	2783	$PAD
2749	2784	Sh "G1" O 157 158 0 0 0
2750	2785	Dr 0 0 0
2751	2786	At SMD N 00888000
2752		Ne 178 "/fpga2/R_M0_BA1"
	2787	Ne 176 "/fpga2/R_M0_BA1"
2753	2788	Po -4133 -1771
2754	2789	$EndPAD
2755	2790	$PAD
...	...
2763	2798	Sh "G3" O 158 158 0 0 0
2764	2799	Dr 0 0 0
2765	2800	At SMD N 00888000
2766		Ne 177 "/fpga2/R_M0_BA0"
	2801	Ne 175 "/fpga2/R_M0_BA0"
2767	2802	Po -3346 -1771
2768	2803	$EndPAD
2769	2804	$PAD
2770	2805	Sh "G4" O 157 158 0 0 0
2771	2806	Dr 0 0 0
2772	2807	At SMD N 00888000
2773		Ne 166 "/fpga2/R_M0_A10"
	2808	Ne 164 "/fpga2/R_M0_A10"
2774	2809	Po -2952 -1771
2775	2810	$EndPAD
2776	2811	$PAD
...	...
2875	2910	Sh "G19" O 157 158 0 0 0
2876	2911	Dr 0 0 0
2877	2912	At SMD N 00888000
2878		Ne 205 "/fpga2/R_M1_A10"
	2913	Ne 203 "/fpga2/R_M1_A10"
2879	2914	Po 2952 -1771
2880	2915	$EndPAD
2881	2916	$PAD
2882	2917	Sh "G20" O 158 158 0 0 0
2883	2918	Dr 0 0 0
2884	2919	At SMD N 00888000
2885		Ne 209 "/fpga2/R_M1_A3"
	2920	Ne 207 "/fpga2/R_M1_A3"
2886	2921	Po 3346 -1771
2887	2922	$EndPAD
2888	2923	$PAD
...	...
2903	2938	Sh "H1" O 157 157 0 0 0
2904	2939	Dr 0 0 0
2905	2940	At SMD N 00888000
2906		Ne 165 "/fpga2/R_M0_A1"
	2941	Ne 163 "/fpga2/R_M0_A1"
2907	2942	Po -4133 -1377
2908	2943	$EndPAD
2909	2944	$PAD
2910	2945	Sh "H2" O 157 157 0 0 0
2911	2946	Dr 0 0 0
2912	2947	At SMD N 00888000
2913		Ne 164 "/fpga2/R_M0_A0"
	2948	Ne 162 "/fpga2/R_M0_A0"
2914	2949	Po -3739 -1377
2915	2950	$EndPAD
2916	2951	$PAD
2917	2952	Sh "H3" O 158 157 0 0 0
2918	2953	Dr 0 0 0
2919	2954	At SMD N 00888000
2920		Ne 123 "/fpga2/M0_CLK#"
	2955	Ne 252 "/sdram/M0_CLK#"
2921	2956	Po -3346 -1377
2922	2957	$EndPAD
2923	2958	$PAD
2924	2959	Sh "H4" O 157 157 0 0 0
2925	2960	Dr 0 0 0
2926	2961	At SMD N 00888000
2927		Ne 254 "/sdram/M0_CLK"
	2962	Ne 123 "/fpga2/M0_CLK"
2928	2963	Po -2952 -1377
2929	2964	$EndPAD
2930	2965	$PAD
2931	2966	Sh "H5" O 157 157 0 0 0
2932	2967	Dr 0 0 0
2933	2968	At SMD N 00888000
2934		Ne 169 "/fpga2/R_M0_A2"
	2969	Ne 167 "/fpga2/R_M0_A2"
2935	2970	Po -2558 -1377
2936	2971	$EndPAD
2937	2972	$PAD
2938	2973	Sh "H6" O 158 157 0 0 0
2939	2974	Dr 0 0 0
2940	2975	At SMD N 00888000
2941		Ne 174 "/fpga2/R_M0_A7"
	2976	Ne 172 "/fpga2/R_M0_A7"
2942	2977	Po -2165 -1377
2943	2978	$EndPAD
2944	2979	$PAD
...	...
3008	3043	Sh "H16" O 158 157 0 0 0
3009	3044	Dr 0 0 0
3010	3045	At SMD N 00888000
3011		Ne 220 "/fpga2/R_M1_CS#"
	3046	Ne 218 "/fpga2/R_M1_CS#"
3012	3047	Po 1771 -1377
3013	3048	$EndPAD
3014	3049	$PAD
...	...
3029	3064	Sh "H19" O 157 157 0 0 0
3030	3065	Dr 0 0 0
3031	3066	At SMD N 00888000
3032		Ne 242 "/fpga2/R_M1_WE#"
	3067	Ne 240 "/fpga2/R_M1_WE#"
3033	3068	Po 2952 -1377
3034	3069	$EndPAD
3035	3070	$PAD
3036	3071	Sh "H20" O 158 157 0 0 0
3037	3072	Dr 0 0 0
3038	3073	At SMD N 00888000
3039		Ne 149 "/fpga2/M1_CLK"
	3074	Ne 146 "/fpga2/M1_CLK"
3040	3075	Po 3346 -1377
3041	3076	$EndPAD
3042	3077	$PAD
3043	3078	Sh "H21" O 157 157 0 0 0
3044	3079	Dr 0 0 0
3045	3080	At SMD N 00888000
3046		Ne 239 "/fpga2/R_M1_RAS#"
	3081	Ne 237 "/fpga2/R_M1_RAS#"
3047	3082	Po 3739 -1377
3048	3083	$EndPAD
3049	3084	$PAD
3050	3085	Sh "H22" O 157 157 0 0 0
3051	3086	Dr 0 0 0
3052	3087	At SMD N 00888000
3053		Ne 218 "/fpga2/R_M1_CAS#"
	3088	Ne 216 "/fpga2/R_M1_CAS#"
3054	3089	Po 4133 -1377
3055	3090	$EndPAD
3056	3091	$PAD
3057	3092	Sh "J1" O 157 157 0 0 0
3058	3093	Dr 0 0 0
3059	3094	At SMD N 00888000
3060		Ne 192 "/fpga2/R_M0_DQ5"
	3095	Ne 190 "/fpga2/R_M0_DQ5"
3061	3096	Po -4133 -983
3062	3097	$EndPAD
3063	3098	$PAD
...	...
3071	3106	Sh "J3" O 158 157 0 0 0
3072	3107	Dr 0 0 0
3073	3108	At SMD N 00888000
3074		Ne 191 "/fpga2/R_M0_DQ4"
	3109	Ne 189 "/fpga2/R_M0_DQ4"
3075	3110	Po -3346 -983
3076	3111	$EndPAD
3077	3112	$PAD
3078	3113	Sh "J4" O 157 157 0 0 0
3079	3114	Dr 0 0 0
3080	3115	At SMD N 00888000
3081		Ne 173 "/fpga2/R_M0_A6"
	3116	Ne 171 "/fpga2/R_M0_A6"
3082	3117	Po -2952 -983
3083	3118	$EndPAD
3084	3119	$PAD
...	...
3169	3204	Sh "J17" O 158 157 0 0 0
3170	3205	Dr 0 0 0
3171	3206	At SMD N 00888000
3172		Ne 216 "/fpga2/R_M1_BA0"
	3207	Ne 214 "/fpga2/R_M1_BA0"
3173	3208	Po 2165 -983
3174	3209	$EndPAD
3175	3210	$PAD
...	...
3183	3218	Sh "J19" O 157 157 0 0 0
3184	3219	Dr 0 0 0
3185	3220	At SMD N 00888000
3186		Ne 150 "/fpga2/M1_CLK#"
	3221	Ne 147 "/fpga2/M1_CLK#"
3187	3222	Po 2952 -983
3188	3223	$EndPAD
3189	3224	$PAD
3190	3225	Sh "J20" O 158 157 0 0 0
3191	3226	Dr 0 0 0
3192	3227	At SMD N 00888000
3193		Ne 231 "/fpga2/R_M1_DQ4"
	3228	Ne 229 "/fpga2/R_M1_DQ4"
3194	3229	Po 3346 -983
3195	3230	$EndPAD
3196	3231	$PAD
...	...
3204	3239	Sh "J22" O 157 157 0 0 0
3205	3240	Dr 0 0 0
3206	3241	At SMD N 00888000
3207		Ne 232 "/fpga2/R_M1_DQ5"
	3242	Ne 230 "/fpga2/R_M1_DQ5"
3208	3243	Po 4133 -983
3209	3244	$EndPAD
3210	3245	$PAD
3211	3246	Sh "K1" O 157 158 0 0 0
3212	3247	Dr 0 0 0
3213	3248	At SMD N 00888000
3214		Ne 194 "/fpga2/R_M0_DQ7"
	3249	Ne 192 "/fpga2/R_M0_DQ7"
3215	3250	Po -4133 -590
3216	3251	$EndPAD
3217	3252	$PAD
3218	3253	Sh "K2" O 157 158 0 0 0
3219	3254	Dr 0 0 0
3220	3255	At SMD N 00888000
3221		Ne 193 "/fpga2/R_M0_DQ6"
	3256	Ne 191 "/fpga2/R_M0_DQ6"
3222	3257	Po -3739 -590
3223	3258	$EndPAD
3224	3259	$PAD
3225	3260	Sh "K3" O 158 158 0 0 0
3226	3261	Dr 0 0 0
3227	3262	At SMD N 00888000
3228		Ne 172 "/fpga2/R_M0_A5"
	3263	Ne 170 "/fpga2/R_M0_A5"
3229	3264	Po -3346 -590
3230	3265	$EndPAD
3231	3266	$PAD
3232	3267	Sh "K4" O 157 158 0 0 0
3233	3268	Dr 0 0 0
3234	3269	At SMD N 00888000
3235		Ne 179 "/fpga2/R_M0_CAS#"
	3270	Ne 177 "/fpga2/R_M0_CAS#"
3236	3271	Po -2952 -590
3237	3272	$EndPAD
3238	3273	$PAD
3239	3274	Sh "K5" O 157 158 0 0 0
3240	3275	Dr 0 0 0
3241	3276	At SMD N 00888000
3242		Ne 199 "/fpga2/R_M0_RAS#"
	3277	Ne 197 "/fpga2/R_M0_RAS#"
3243	3278	Po -2558 -590
3244	3279	$EndPAD
3245	3280	$PAD
3246	3281	Sh "K6" O 158 158 0 0 0
3247	3282	Dr 0 0 0
3248	3283	At SMD N 00888000
3249		Ne 170 "/fpga2/R_M0_A3"
	3284	Ne 168 "/fpga2/R_M0_A3"
3250	3285	Po -2165 -590
3251	3286	$EndPAD
3252	3287	$PAD
...	...
3323	3358	Sh "K17" O 158 158 0 0 0
3324	3359	Dr 0 0 0
3325	3360	At SMD N 00888000
3326		Ne 217 "/fpga2/R_M1_BA1"
	3361	Ne 215 "/fpga2/R_M1_BA1"
3327	3362	Po 2165 -590
3328	3363	$EndPAD
3329	3364	$PAD
...	...
3337	3372	Sh "K19" O 157 158 0 0 0
3338	3373	Dr 0 0 0
3339	3374	At SMD N 00888000
3340		Ne 212 "/fpga2/R_M1_A6"
	3375	Ne 210 "/fpga2/R_M1_A6"
3341	3376	Po 2952 -590
3342	3377	$EndPAD
3343	3378	$PAD
3344	3379	Sh "K20" O 158 158 0 0 0
3345	3380	Dr 0 0 0
3346	3381	At SMD N 00888000
3347		Ne 211 "/fpga2/R_M1_A5"
	3382	Ne 209 "/fpga2/R_M1_A5"
3348	3383	Po 3346 -590
3349	3384	$EndPAD
3350	3385	$PAD
3351	3386	Sh "K21" O 157 158 0 0 0
3352	3387	Dr 0 0 0
3353	3388	At SMD N 00888000
3354		Ne 233 "/fpga2/R_M1_DQ6"
	3389	Ne 231 "/fpga2/R_M1_DQ6"
3355	3390	Po 3739 -590
3356	3391	$EndPAD
3357	3392	$PAD
3358	3393	Sh "K22" O 157 158 0 0 0
3359	3394	Dr 0 0 0
3360	3395	At SMD N 00888000
3361		Ne 234 "/fpga2/R_M1_DQ7"
	3396	Ne 232 "/fpga2/R_M1_DQ7"
3362	3397	Po 4133 -590
3363	3398	$EndPAD
3364	3399	$PAD
...	...
3379	3414	Sh "L3" O 158 157 0 0 0
3380	3415	Dr 0 0 0
3381	3416	At SMD N 00888000
3382		Ne 198 "/fpga2/R_M0_LDQS"
	3417	Ne 196 "/fpga2/R_M0_LDQS"
3383	3418	Po -3346 -196
3384	3419	$EndPAD
3385	3420	$PAD
3386	3421	Sh "L4" O 157 157 0 0 0
3387	3422	Dr 0 0 0
3388	3423	At SMD N 00888000
3389		Ne 197 "/fpga2/R_M0_LDM"
	3424	Ne 195 "/fpga2/R_M0_LDM"
3390	3425	Po -2952 -196
3391	3426	$EndPAD
3392	3427	$PAD
...	...
3491	3526	Sh "L19" O 157 157 0 0 0
3492	3527	Dr 0 0 0
3493	3528	At SMD N 00888000
3494		Ne 237 "/fpga2/R_M1_LDM"
	3529	Ne 235 "/fpga2/R_M1_LDM"
3495	3530	Po 2952 -196
3496	3531	$EndPAD
3497	3532	$PAD
3498	3533	Sh "L20" O 158 157 0 0 0
3499	3534	Dr 0 0 0
3500	3535	At SMD N 00888000
3501		Ne 238 "/fpga2/R_M1_LDQS"
	3536	Ne 236 "/fpga2/R_M1_LDQS"
3502	3537	Po 3346 -196
3503	3538	$EndPAD
3504	3539	$PAD
...	...
3519	3554	Sh "M1" O 157 157 0 0 0
3520	3555	Dr 0 0 0
3521	3556	At SMD N 00888000
3522		Ne 190 "/fpga2/R_M0_DQ3"
	3557	Ne 188 "/fpga2/R_M0_DQ3"
3523	3558	Po -4133 196
3524	3559	$EndPAD
3525	3560	$PAD
3526	3561	Sh "M2" O 157 157 0 0 0
3527	3562	Dr 0 0 0
3528	3563	At SMD N 00888000
3529		Ne 189 "/fpga2/R_M0_DQ2"
	3564	Ne 187 "/fpga2/R_M0_DQ2"
3530	3565	Po -3739 196
3531	3566	$EndPAD
3532	3567	$PAD
3533	3568	Sh "M3" O 158 157 0 0 0
3534	3569	Dr 0 0 0
3535	3570	At SMD N 00888000
3536		Ne 200 "/fpga2/R_M0_UDM"
	3571	Ne 198 "/fpga2/R_M0_UDM"
3537	3572	Po -3346 196
3538	3573	$EndPAD
3539	3574	$PAD
...	...
3652	3687	Sh "M20" O 158 157 0 0 0
3653	3688	Dr 0 0 0
3654	3689	At SMD N 00888000
3655		Ne 240 "/fpga2/R_M1_UDM"
	3690	Ne 238 "/fpga2/R_M1_UDM"
3656	3691	Po 3346 196
3657	3692	$EndPAD
3658	3693	$PAD
3659	3694	Sh "M21" O 157 157 0 0 0
3660	3695	Dr 0 0 0
3661	3696	At SMD N 00888000
3662		Ne 229 "/fpga2/R_M1_DQ2"
	3697	Ne 227 "/fpga2/R_M1_DQ2"
3663	3698	Po 3739 196
3664	3699	$EndPAD
3665	3700	$PAD
3666	3701	Sh "M22" O 157 157 0 0 0
3667	3702	Dr 0 0 0
3668	3703	At SMD N 00888000
3669		Ne 230 "/fpga2/R_M1_DQ3"
	3704	Ne 228 "/fpga2/R_M1_DQ3"
3670	3705	Po 4133 196
3671	3706	$EndPAD
3672	3707	$PAD
3673	3708	Sh "N1" O 157 158 0 0 0
3674	3709	Dr 0 0 0
3675	3710	At SMD N 00888000
3676		Ne 182 "/fpga2/R_M0_DQ1"
	3711	Ne 180 "/fpga2/R_M0_DQ1"
3677	3712	Po -4133 590
3678	3713	$EndPAD
3679	3714	$PAD
...	...
3687	3722	Sh "N3" O 158 158 0 0 0
3688	3723	Dr 0 0 0
3689	3724	At SMD N 00888000
3690		Ne 181 "/fpga2/R_M0_DQ0"
	3725	Ne 179 "/fpga2/R_M0_DQ0"
3691	3726	Po -3346 590
3692	3727	$EndPAD
3693	3728	$PAD
...	...
3806	3841	Sh "N20" O 158 158 0 0 0
3807	3842	Dr 0 0 0
3808	3843	At SMD N 00888000
3809		Ne 221 "/fpga2/R_M1_DQ0"
	3844	Ne 219 "/fpga2/R_M1_DQ0"
3810	3845	Po 3346 590
3811	3846	$EndPAD
3812	3847	$PAD
...	...
3820	3855	Sh "N22" O 157 158 0 0 0
3821	3856	Dr 0 0 0
3822	3857	At SMD N 00888000
3823		Ne 222 "/fpga2/R_M1_DQ1"
	3858	Ne 220 "/fpga2/R_M1_DQ1"
3824	3859	Po 4133 590
3825	3860	$EndPAD
3826	3861	$PAD
3827	3862	Sh "P1" O 157 157 0 0 0
3828	3863	Dr 0 0 0
3829	3864	At SMD N 00888000
3830		Ne 196 "/fpga2/R_M0_DQ9"
	3865	Ne 194 "/fpga2/R_M0_DQ9"
3831	3866	Po -4133 983
3832	3867	$EndPAD
3833	3868	$PAD
3834	3869	Sh "P2" O 157 157 0 0 0
3835	3870	Dr 0 0 0
3836	3871	At SMD N 00888000
3837		Ne 195 "/fpga2/R_M0_DQ8"
	3872	Ne 193 "/fpga2/R_M0_DQ8"
3838	3873	Po -3739 983
3839	3874	$EndPAD
3840	3875	$PAD
...	...
3967	4002	Sh "P21" O 157 157 0 0 0
3968	4003	Dr 0 0 0
3969	4004	At SMD N 00888000
3970		Ne 235 "/fpga2/R_M1_DQ8"
	4005	Ne 233 "/fpga2/R_M1_DQ8"
3971	4006	Po 3739 983
3972	4007	$EndPAD
3973	4008	$PAD
3974	4009	Sh "P22" O 157 157 0 0 0
3975	4010	Dr 0 0 0
3976	4011	At SMD N 00888000
3977		Ne 236 "/fpga2/R_M1_DQ9"
	4012	Ne 234 "/fpga2/R_M1_DQ9"
3978	4013	Po 4133 983
3979	4014	$EndPAD
3980	4015	$PAD
3981	4016	Sh "R1" O 157 157 0 0 0
3982	4017	Dr 0 0 0
3983	4018	At SMD N 00888000
3984		Ne 184 "/fpga2/R_M0_DQ11"
	4019	Ne 182 "/fpga2/R_M0_DQ11"
3985	4020	Po -4133 1377
3986	4021	$EndPAD
3987	4022	$PAD
...	...
3995	4030	Sh "R3" O 158 157 0 0 0
3996	4031	Dr 0 0 0
3997	4032	At SMD N 00888000
3998		Ne 183 "/fpga2/R_M0_DQ10"
	4033	Ne 181 "/fpga2/R_M0_DQ10"
3999	4034	Po -3346 1377
4000	4035	$EndPAD
4001	4036	$PAD
...	...
4037	4072	Sh "R9" O 157 157 0 0 0
4038	4073	Dr 0 0 0
4039	4074	At SMD N 00888000
4040		Ne 87 "/fpga1/FPGA_BANK0_IO_58"
	4075	Ne 91 "/fpga1/FPGA_BANK0_IO_58"
4041	4076	Po -983 1377
4042	4077	$EndPAD
4043	4078	$PAD
...	...
4086	4121	Sh "R16" O 158 157 0 0 0
4087	4122	Dr 0 0 0
4088	4123	At SMD N 00888000
4089		Ne 28 "/expansion/FPGA_BANK0_IO_12"
	4124	Ne 71 "/fpga1/FPGA_BANK0_IO_12"
4090	4125	Po 1771 1377
4091	4126	$EndPAD
4092	4127	$PAD
...	...
4114	4149	Sh "R20" O 158 157 0 0 0
4115	4150	Dr 0 0 0
4116	4151	At SMD N 00888000
4117		Ne 223 "/fpga2/R_M1_DQ10"
	4152	Ne 221 "/fpga2/R_M1_DQ10"
4118	4153	Po 3346 1377
4119	4154	$EndPAD
4120	4155	$PAD
...	...
4128	4163	Sh "R22" O 157 157 0 0 0
4129	4164	Dr 0 0 0
4130	4165	At SMD N 00888000
4131		Ne 224 "/fpga2/R_M1_DQ11"
	4166	Ne 222 "/fpga2/R_M1_DQ11"
4132	4167	Po 4133 1377
4133	4168	$EndPAD
4134	4169	$PAD
...	...
4142	4177	Sh "T2" O 157 158 0 0 0
4143	4178	Dr 0 0 0
4144	4179	At SMD N 00888000
4145		Ne 201 "/fpga2/R_M0_UDQS"
	4180	Ne 199 "/fpga2/R_M0_UDQS"
4146	4181	Po -3739 1771
4147	4182	$EndPAD
4148	4183	$PAD
...	...
4163	4198	Sh "T5" O 157 158 0 0 0
4164	4199	Dr 0 0 0
4165	4200	At SMD N 00888000
4166		Ne 104 "/fpga1/PROG_CSO"
	4201	Ne 102 "/fpga1/PROG_CSO"
4167	4202	Po -2558 1771
4168	4203	$EndPAD
4169	4204	$PAD
...	...
4177	4212	Sh "T7" O 158 158 0 0 0
4178	4213	Dr 0 0 0
4179	4214	At SMD N 00888000
4180		Ne 89 "/fpga1/FPGA_BANK0_IO_60"
	4215	Ne 92 "/fpga1/FPGA_BANK0_IO_60"
4181	4216	Po -1771 1771
4182	4217	$EndPAD
4183	4218	$PAD
4184	4219	Sh "T8" O 157 158 0 0 0
4185	4220	Dr 0 0 0
4186	4221	At SMD N 00888000
4187		Ne 46 "/expansion/FPGA_BANK0_IO_53"
	4222	Ne 88 "/fpga1/FPGA_BANK0_IO_53"
4188	4223	Po -1377 1771
4189	4224	$EndPAD
4190	4225	$PAD
4191	4226	Sh "T9" O 157 158 0 0 0
4192	4227	Dr 0 0 0
4193	4228	At SMD N 00888000
4194		Ne 329 "VCCO2"
	4229	Ne 336 "VCCO2"
4195	4230	Po -983 1771
4196	4231	$EndPAD
4197	4232	$PAD
...	...
4212	4247	Sh "T12" O 157 158 0 0 0
4213	4248	Dr 0 0 0
4214	4249	At SMD N 00888000
4215		Ne 79 "/fpga1/FPGA_BANK0_IO_34"
	4250	Ne 38 "/expansion/FPGA_BANK0_IO_34"
4216	4251	Po 196 1771
4217	4252	$EndPAD
4218	4253	$PAD
4219	4254	Sh "T13" O 158 158 0 0 0
4220	4255	Dr 0 0 0
4221	4256	At SMD N 00888000
4222		Ne 329 "VCCO2"
	4257	Ne 336 "VCCO2"
4223	4258	Po 590 1771
4224	4259	$EndPAD
4225	4260	$PAD
4226	4261	Sh "T14" O 157 158 0 0 0
4227	4262	Dr 0 0 0
4228	4263	At SMD N 00888000
4229		Ne 37 "/expansion/FPGA_BANK0_IO_36"
	4264	Ne 81 "/fpga1/FPGA_BANK0_IO_36"
4230	4265	Po 983 1771
4231	4266	$EndPAD
4232	4267	$PAD
4233	4268	Sh "T15" O 157 158 0 0 0
4234	4269	Dr 0 0 0
4235	4270	At SMD N 00888000
4236		Ne 91 "/fpga1/FPGA_BANK0_IO_7"
	4271	Ne 49 "/expansion/FPGA_BANK0_IO_7"
4237	4272	Po 1377 1771
4238	4273	$EndPAD
4239	4274	$PAD
4240	4275	Sh "T16" O 158 158 0 0 0
4241	4276	Dr 0 0 0
4242	4277	At SMD N 00888000
4243		Ne 88 "/fpga1/FPGA_BANK0_IO_6"
	4278	Ne 48 "/expansion/FPGA_BANK0_IO_6"
4244	4279	Po 1771 1771
4245	4280	$EndPAD
4246	4281	$PAD
4247	4282	Sh "T17" O 158 158 0 0 0
4248	4283	Dr 0 0 0
4249	4284	At SMD N 00888000
4250		Ne 71 "/fpga1/FPGA_BANK0_IO_2"
	4285	Ne 32 "/expansion/FPGA_BANK0_IO_2"
4251	4286	Po 2165 1771
4252	4287	$EndPAD
4253	4288	$PAD
...	...
4275	4310	Sh "T21" O 157 158 0 0 0
4276	4311	Dr 0 0 0
4277	4312	At SMD N 00888000
4278		Ne 241 "/fpga2/R_M1_UDQS"
	4313	Ne 239 "/fpga2/R_M1_UDQS"
4279	4314	Po 3739 1771
4280	4315	$EndPAD
4281	4316	$PAD
...	...
4289	4324	Sh "U1" O 157 158 0 0 0
4290	4325	Dr 0 0 0
4291	4326	At SMD N 00888000
4292		Ne 186 "/fpga2/R_M0_DQ13"
	4327	Ne 184 "/fpga2/R_M0_DQ13"
4293	4328	Po -4133 2165
4294	4329	$EndPAD
4295	4330	$PAD
...	...
4303	4338	Sh "U3" O 158 158 0 0 0
4304	4339	Dr 0 0 0
4305	4340	At SMD N 00888000
4306		Ne 185 "/fpga2/R_M0_DQ12"
	4341	Ne 183 "/fpga2/R_M0_DQ12"
4307	4342	Po -3346 2165
4308	4343	$EndPAD
4309	4344	$PAD
...	...
4324	4359	Sh "U6" O 158 158 0 0 0
4325	4360	Dr 0 0 0
4326	4361	At SMD N 00888000
4327		Ne 90 "/fpga1/FPGA_BANK0_IO_62"
	4362	Ne 93 "/fpga1/FPGA_BANK0_IO_62"
4328	4363	Po -2165 2165
4329	4364	$EndPAD
4330	4365	$PAD
...	...
4345	4380	Sh "U9" O 157 158 0 0 0
4346	4381	Dr 0 0 0
4347	4382	At SMD N 00888000
4348		Ne 85 "/fpga1/FPGA_BANK0_IO_51"
	4383	Ne 86 "/fpga1/FPGA_BANK0_IO_51"
4349	4384	Po -983 2165
4350	4385	$EndPAD
4351	4386	$PAD
4352	4387	Sh "U10" O 158 158 0 0 0
4353	4388	Dr 0 0 0
4354	4389	At SMD N 00888000
4355		Ne 48 "/expansion/FPGA_BANK0_IO_56"
	4390	Ne 89 "/fpga1/FPGA_BANK0_IO_56"
4356	4391	Po -590 2165
4357	4392	$EndPAD
4358	4393	$PAD
...	...
4373	4408	Sh "U13" O 158 158 0 0 0
4374	4409	Dr 0 0 0
4375	4410	At SMD N 00888000
4376		Ne 108 "/fpga1/PROG_MISO3"
	4411	Ne 106 "/fpga1/PROG_MISO3"
4377	4412	Po 590 2165
4378	4413	$EndPAD
4379	4414	$PAD
4380	4415	Sh "U14" O 157 158 0 0 0
4381	4416	Dr 0 0 0
4382	4417	At SMD N 00888000
4383		Ne 107 "/fpga1/PROG_MISO2"
	4418	Ne 105 "/fpga1/PROG_MISO2"
4384	4419	Po 983 2165
4385	4420	$EndPAD
4386	4421	$PAD
...	...
4401	4436	Sh "U17" O 158 158 0 0 0
4402	4437	Dr 0 0 0
4403	4438	At SMD N 00888000
4404		Ne 92 "/fpga1/FPGA_BANK0_IO_8"
	4439	Ne 95 "/fpga1/FPGA_BANK0_IO_8"
4405	4440	Po 2165 2165
4406	4441	$EndPAD
4407	4442	$PAD
...	...
4422	4457	Sh "U20" O 158 158 0 0 0
4423	4458	Dr 0 0 0
4424	4459	At SMD N 00888000
4425		Ne 225 "/fpga2/R_M1_DQ12"
	4460	Ne 223 "/fpga2/R_M1_DQ12"
4426	4461	Po 3346 2165
4427	4462	$EndPAD
4428	4463	$PAD
...	...
4436	4471	Sh "U22" O 157 158 0 0 0
4437	4472	Dr 0 0 0
4438	4473	At SMD N 00888000
4439		Ne 226 "/fpga2/R_M1_DQ13"
	4474	Ne 224 "/fpga2/R_M1_DQ13"
4440	4475	Po 4133 2165
4441	4476	$EndPAD
4442	4477	$PAD
4443	4478	Sh "V1" O 157 157 0 0 0
4444	4479	Dr 0 0 0
4445	4480	At SMD N 00888000
4446		Ne 188 "/fpga2/R_M0_DQ15"
	4481	Ne 186 "/fpga2/R_M0_DQ15"
4447	4482	Po -4133 2558
4448	4483	$EndPAD
4449	4484	$PAD
4450	4485	Sh "V2" O 157 157 0 0 0
4451	4486	Dr 0 0 0
4452	4487	At SMD N 00888000
4453		Ne 187 "/fpga2/R_M0_DQ14"
	4488	Ne 185 "/fpga2/R_M0_DQ14"
4454	4489	Po -3739 2558
4455	4490	$EndPAD
4456	4491	$PAD
...	...
4471	4506	Sh "V5" O 157 157 0 0 0
4472	4507	Dr 0 0 0
4473	4508	At SMD N 00888000
4474		Ne 49 "/expansion/FPGA_BANK0_IO_63"
	4509	Ne 94 "/fpga1/FPGA_BANK0_IO_63"
4475	4510	Po -2558 2558
4476	4511	$EndPAD
4477	4512	$PAD
...	...
4485	4520	Sh "V7" O 158 157 0 0 0
4486	4521	Dr 0 0 0
4487	4522	At SMD N 00888000
4488		Ne 42 "/expansion/FPGA_BANK0_IO_49"
	4523	Ne 85 "/fpga1/FPGA_BANK0_IO_49"
4489	4524	Po -1771 2558
4490	4525	$EndPAD
4491	4526	$PAD
4492	4527	Sh "V8" O 157 157 0 0 0
4493	4528	Dr 0 0 0
4494	4529	At SMD N 00888000
4495		Ne 329 "VCCO2"
	4530	Ne 336 "VCCO2"
4496	4531	Po -1377 2558
4497	4532	$EndPAD
4498	4533	$PAD
4499	4534	Sh "V9" O 157 157 0 0 0
4500	4535	Dr 0 0 0
4501	4536	At SMD N 00888000
4502		Ne 45 "/expansion/FPGA_BANK0_IO_52"
	4537	Ne 87 "/fpga1/FPGA_BANK0_IO_52"
4503	4538	Po -983 2558
4504	4539	$EndPAD
4505	4540	$PAD
...	...
4513	4548	Sh "V11" O 157 157 0 0 0
4514	4549	Dr 0 0 0
4515	4550	At SMD N 00888000
4516		Ne 40 "/expansion/FPGA_BANK0_IO_43"
	4551	Ne 42 "/expansion/FPGA_BANK0_IO_43"
4517	4552	Po -196 2558
4518	4553	$EndPAD
4519	4554	$PAD
4520	4555	Sh "V12" O 157 157 0 0 0
4521	4556	Dr 0 0 0
4522	4557	At SMD N 00888000
4523		Ne 329 "VCCO2"
	4558	Ne 336 "VCCO2"
4524	4559	Po 196 2558
4525	4560	$EndPAD
4526	4561	$PAD
...	...
4541	4576	Sh "V15" O 157 157 0 0 0
4542	4577	Dr 0 0 0
4543	4578	At SMD N 00888000
4544		Ne 30 "/expansion/FPGA_BANK0_IO_17"
	4579	Ne 31 "/expansion/FPGA_BANK0_IO_17"
4545	4580	Po 1377 2558
4546	4581	$EndPAD
4547	4582	$PAD
4548	4583	Sh "V16" O 158 157 0 0 0
4549	4584	Dr 0 0 0
4550	4585	At SMD N 00888000
4551		Ne 329 "VCCO2"
	4586	Ne 336 "VCCO2"
4552	4587	Po 1771 2558
4553	4588	$EndPAD
4554	4589	$PAD
4555	4590	Sh "V17" O 158 157 0 0 0
4556	4591	Dr 0 0 0
4557	4592	At SMD N 00888000
4558		Ne 70 "/fpga1/FPGA_BANK0_IO_14"
	4593	Ne 72 "/fpga1/FPGA_BANK0_IO_14"
4559	4594	Po 2165 2558
4560	4595	$EndPAD
4561	4596	$PAD
4562	4597	Sh "V18" O 157 157 0 0 0
4563	4598	Dr 0 0 0
4564	4599	At SMD N 00888000
4565		Ne 69 "/fpga1/FPGA_BANK0_IO_11"
	4600	Ne 29 "/expansion/FPGA_BANK0_IO_11"
4566	4601	Po 2558 2558
4567	4602	$EndPAD
4568	4603	$PAD
4569	4604	Sh "V19" O 157 157 0 0 0
4570	4605	Dr 0 0 0
4571	4606	At SMD N 00888000
4572		Ne 68 "/fpga1/FPGA_BANK0_IO_10"
	4607	Ne 28 "/expansion/FPGA_BANK0_IO_10"
4573	4608	Po 2952 2558
4574	4609	$EndPAD
4575	4610	$PAD
...	...
4583	4618	Sh "V21" O 157 157 0 0 0
4584	4619	Dr 0 0 0
4585	4620	At SMD N 00888000
4586		Ne 227 "/fpga2/R_M1_DQ14"
	4621	Ne 225 "/fpga2/R_M1_DQ14"
4587	4622	Po 3739 2558
4588	4623	$EndPAD
4589	4624	$PAD
4590	4625	Sh "V22" O 157 157 0 0 0
4591	4626	Dr 0 0 0
4592	4627	At SMD N 00888000
4593		Ne 228 "/fpga2/R_M1_DQ15"
	4628	Ne 226 "/fpga2/R_M1_DQ15"
4594	4629	Po 4133 2558
4595	4630	$EndPAD
4596	4631	$PAD
...	...
4625	4660	Sh "W5" O 157 157 0 0 0
4626	4661	Dr 0 0 0
4627	4662	At SMD N 00888000
4628		Ne 329 "VCCO2"
	4663	Ne 336 "VCCO2"
4629	4664	Po -2558 2952
4630	4665	$EndPAD
4631	4666	$PAD
4632	4667	Sh "W6" O 158 157 0 0 0
4633	4668	Dr 0 0 0
4634	4669	At SMD N 00888000
4635		Ne 86 "/fpga1/FPGA_BANK0_IO_57"
	4670	Ne 90 "/fpga1/FPGA_BANK0_IO_57"
4636	4671	Po -2165 2952
4637	4672	$EndPAD
4638	4673	$PAD
...	...
4653	4688	Sh "W9" O 157 157 0 0 0
4654	4689	Dr 0 0 0
4655	4690	At SMD N 00888000
4656		Ne 44 "/expansion/FPGA_BANK0_IO_50"
	4691	Ne 46 "/expansion/FPGA_BANK0_IO_50"
4657	4692	Po -983 2952
4658	4693	$EndPAD
4659	4694	$PAD
4660	4695	Sh "W10" O 158 157 0 0 0
4661	4696	Dr 0 0 0
4662	4697	At SMD N 00888000
4663		Ne 41 "/expansion/FPGA_BANK0_IO_46"
	4698	Ne 43 "/expansion/FPGA_BANK0_IO_46"
4664	4699	Po -590 2952
4665	4700	$EndPAD
4666	4701	$PAD
4667	4702	Sh "W11" O 157 157 0 0 0
4668	4703	Dr 0 0 0
4669	4704	At SMD N 00888000
4670		Ne 81 "/fpga1/FPGA_BANK0_IO_44"
	4705	Ne 82 "/fpga1/FPGA_BANK0_IO_44"
4671	4706	Po -196 2952
4672	4707	$EndPAD
4673	4708	$PAD
...	...
4681	4716	Sh "W13" O 158 157 0 0 0
4682	4717	Dr 0 0 0
4683	4718	At SMD N 00888000
4684		Ne 34 "/expansion/FPGA_BANK0_IO_27"
	4719	Ne 77 "/fpga1/FPGA_BANK0_IO_27"
4685	4720	Po 590 2952
4686	4721	$EndPAD
4687	4722	$PAD
4688	4723	Sh "W14" O 157 157 0 0 0
4689	4724	Dr 0 0 0
4690	4725	At SMD N 00888000
4691		Ne 77 "/fpga1/FPGA_BANK0_IO_30"
	4726	Ne 79 "/fpga1/FPGA_BANK0_IO_30"
4692	4727	Po 983 2952
4693	4728	$EndPAD
4694	4729	$PAD
4695	4730	Sh "W15" O 157 157 0 0 0
4696	4731	Dr 0 0 0
4697	4732	At SMD N 00888000
4698		Ne 33 "/expansion/FPGA_BANK0_IO_25"
	4733	Ne 76 "/fpga1/FPGA_BANK0_IO_25"
4699	4734	Po 1377 2952
4700	4735	$EndPAD
4701	4736	$PAD
...	...
4709	4744	Sh "W17" O 158 157 0 0 0
4710	4745	Dr 0 0 0
4711	4746	At SMD N 00888000
4712		Ne 29 "/expansion/FPGA_BANK0_IO_15"
	4747	Ne 30 "/expansion/FPGA_BANK0_IO_15"
4713	4748	Po 2165 2952
4714	4749	$EndPAD
4715	4750	$PAD
...	...
4807	4842	Sh "Y9" O 157 158 0 0 0
4808	4843	Dr 0 0 0
4809	4844	At SMD N 00888000
4810		Ne 82 "/fpga1/FPGA_BANK0_IO_45"
	4845	Ne 83 "/fpga1/FPGA_BANK0_IO_45"
4811	4846	Po -983 3346
4812	4847	$EndPAD
4813	4848	$PAD
4814	4849	Sh "Y10" O 158 158 0 0 0
4815	4850	Dr 0 0 0
4816	4851	At SMD N 00888000
4817		Ne 83 "/fpga1/FPGA_BANK0_IO_47"
	4852	Ne 44 "/expansion/FPGA_BANK0_IO_47"
4818	4853	Po -590 3346
4819	4854	$EndPAD
4820	4855	$PAD
4821	4856	Sh "Y11" O 157 158 0 0 0
4822	4857	Dr 0 0 0
4823	4858	At SMD N 00888000
4824		Ne 80 "/fpga1/FPGA_BANK0_IO_40"
	4859	Ne 41 "/expansion/FPGA_BANK0_IO_40"
4825	4860	Po -196 3346
4826	4861	$EndPAD
4827	4862	$PAD
...	...
4835	4870	Sh "Y13" O 158 158 0 0 0
4836	4871	Dr 0 0 0
4837	4872	At SMD N 00888000
4838		Ne 38 "/expansion/FPGA_BANK0_IO_38"
	4873	Ne 39 "/expansion/FPGA_BANK0_IO_38"
4839	4874	Po 590 3346
4840	4875	$EndPAD
4841	4876	$PAD
...	...
4849	4884	Sh "Y15" O 157 158 0 0 0
4850	4885	Dr 0 0 0
4851	4886	At SMD N 00888000
4852		Ne 36 "/expansion/FPGA_BANK0_IO_32"
	4887	Ne 37 "/expansion/FPGA_BANK0_IO_32"
4853	4888	Po 1377 3346
4854	4889	$EndPAD
4855	4890	$PAD
4856	4891	Sh "Y16" O 158 158 0 0 0
4857	4892	Dr 0 0 0
4858	4893	At SMD N 00888000
4859		Ne 74 "/fpga1/FPGA_BANK0_IO_24"
	4894	Ne 75 "/fpga1/FPGA_BANK0_IO_24"
4860	4895	Po 1771 3346
4861	4896	$EndPAD
4862	4897	$PAD
4863	4898	Sh "Y17" O 158 158 0 0 0
4864	4899	Dr 0 0 0
4865	4900	At SMD N 00888000
4866		Ne 72 "/fpga1/FPGA_BANK0_IO_20"
	4901	Ne 33 "/expansion/FPGA_BANK0_IO_20"
4867	4902	Po 2165 3346
4868	4903	$EndPAD
4869	4904	$PAD
4870	4905	Sh "Y18" O 157 158 0 0 0
4871	4906	Dr 0 0 0
4872	4907	At SMD N 00888000
4873		Ne 43 "/expansion/FPGA_BANK0_IO_5"
	4908	Ne 45 "/expansion/FPGA_BANK0_IO_5"
4874	4909	Po 2558 3346
4875	4910	$EndPAD
4876	4911	$PAD
4877	4912	Sh "Y19" O 157 158 0 0 0
4878	4913	Dr 0 0 0
4879	4914	At SMD N 00888000
4880		Ne 76 "/fpga1/FPGA_BANK0_IO_3"
	4915	Ne 36 "/expansion/FPGA_BANK0_IO_3"
4881	4916	Po 2952 3346
4882	4917	$EndPAD
4883	4918	$PAD
...	...
4898	4933	Sh "Y22" O 157 158 0 0 0
4899	4934	Dr 0 0 0
4900	4935	At SMD N 00888000
4901		Ne 328 "N-000350"
	4936	Ne 335 "N-000365"
4902	4937	Po 4133 3346
4903	4938	$EndPAD
4904	4939	$PAD
4905	4940	Sh "AA1" O 157 157 0 0 0
4906	4941	Dr 0 0 0
4907	4942	At SMD N 00888000
4908		Ne 327 "N-000347"
	4943	Ne 334 "N-000362"
4909	4944	Po -4133 3739
4910	4945	$EndPAD
4911	4946	$PAD
...	...
4919	4954	Sh "AA3" O 158 157 0 0 0
4920	4955	Dr 0 0 0
4921	4956	At SMD N 00888000
4922		Ne 329 "VCCO2"
	4957	Ne 336 "VCCO2"
4923	4958	Po -3346 3739
4924	4959	$EndPAD
4925	4960	$PAD
...	...
4947	4982	Sh "AA7" O 158 157 0 0 0
4948	4983	Dr 0 0 0
4949	4984	At SMD N 00888000
4950		Ne 329 "VCCO2"
	4985	Ne 336 "VCCO2"
4951	4986	Po -1771 3739
4952	4987	$EndPAD
4953	4988	$PAD
...	...
4975	5010	Sh "AA11" O 157 157 0 0 0
4976	5011	Dr 0 0 0
4977	5012	At SMD N 00888000
4978		Ne 329 "VCCO2"
	5013	Ne 336 "VCCO2"
4979	5014	Po -196 3739
4980	5015	$EndPAD
4981	5016	$PAD
...	...
4996	5031	Sh "AA14" O 157 157 0 0 0
4997	5032	Dr 0 0 0
4998	5033	At SMD N 00888000
4999		Ne 73 "/fpga1/FPGA_BANK0_IO_22"
	5034	Ne 74 "/fpga1/FPGA_BANK0_IO_22"
5000	5035	Po 983 3739
5001	5036	$EndPAD
5002	5037	$PAD
5003	5038	Sh "AA15" O 157 157 0 0 0
5004	5039	Dr 0 0 0
5005	5040	At SMD N 00888000
5006		Ne 329 "VCCO2"
	5041	Ne 336 "VCCO2"
5007	5042	Po 1377 3739
5008	5043	$EndPAD
5009	5044	$PAD
5010	5045	Sh "AA16" O 158 157 0 0 0
5011	5046	Dr 0 0 0
5012	5047	At SMD N 00888000
5013		Ne 35 "/expansion/FPGA_BANK0_IO_28"
	5048	Ne 78 "/fpga1/FPGA_BANK0_IO_28"
5014	5049	Po 1771 3739
5015	5050	$EndPAD
5016	5051	$PAD
...	...
5024	5059	Sh "AA18" O 157 157 0 0 0
5025	5060	Dr 0 0 0
5026	5061	At SMD N 00888000
5027		Ne 31 "/expansion/FPGA_BANK0_IO_18"
	5062	Ne 73 "/fpga1/FPGA_BANK0_IO_18"
5028	5063	Po 2558 3739
5029	5064	$EndPAD
5030	5065	$PAD
5031	5066	Sh "AA19" O 157 157 0 0 0
5032	5067	Dr 0 0 0
5033	5068	At SMD N 00888000
5034		Ne 329 "VCCO2"
	5069	Ne 336 "VCCO2"
5035	5070	Po 2952 3739
5036	5071	$EndPAD
5037	5072	$PAD
5038	5073	Sh "AA20" O 158 157 0 0 0
5039	5074	Dr 0 0 0
5040	5075	At SMD N 00888000
5041		Ne 106 "/fpga1/PROG_MISO1"
	5076	Ne 104 "/fpga1/PROG_MISO1"
5042	5077	Po 3346 3739
5043	5078	$EndPAD
5044	5079	$PAD
5045	5080	Sh "AA21" O 157 157 0 0 0
5046	5081	Dr 0 0 0
5047	5082	At SMD N 00888000
5048		Ne 103 "/fpga1/PROG_CCLK"
	5083	Ne 101 "/fpga1/PROG_CCLK"
5049	5084	Po 3739 3739
5050	5085	$EndPAD
5051	5086	$PAD
5052	5087	Sh "AA22" O 157 157 0 0 0
5053	5088	Dr 0 0 0
5054	5089	At SMD N 00888000
5055		Ne 329 "VCCO2"
	5090	Ne 336 "VCCO2"
5056	5091	Po 4133 3739
5057	5092	$EndPAD
5058	5093	$PAD
...	...
5143	5178	Sh "AB13" O 158 157 0 0 0
5144	5179	Dr 0 0 0
5145	5180	At SMD N 00888000
5146		Ne 39 "/expansion/FPGA_BANK0_IO_39"
	5181	Ne 40 "/expansion/FPGA_BANK0_IO_39"
5147	5182	Po 590 4133
5148	5183	$EndPAD
5149	5184	$PAD
...	...
5157	5192	Sh "AB15" O 157 157 0 0 0
5158	5193	Dr 0 0 0
5159	5194	At SMD N 00888000
5160		Ne 78 "/fpga1/FPGA_BANK0_IO_33"
	5195	Ne 80 "/fpga1/FPGA_BANK0_IO_33"
5161	5196	Po 1377 4133
5162	5197	$EndPAD
5163	5198	$PAD
5164	5199	Sh "AB16" O 158 157 0 0 0
5165	5200	Dr 0 0 0
5166	5201	At SMD N 00888000
5167		Ne 75 "/fpga1/FPGA_BANK0_IO_29"
	5202	Ne 35 "/expansion/FPGA_BANK0_IO_29"
5168	5203	Po 1771 4133
5169	5204	$EndPAD
5170	5205	$PAD
5171	5206	Sh "AB17" O 158 157 0 0 0
5172	5207	Dr 0 0 0
5173	5208	At SMD N 00888000
5174		Ne 32 "/expansion/FPGA_BANK0_IO_21"
	5209	Ne 34 "/expansion/FPGA_BANK0_IO_21"
5175	5210	Po 2165 4133
5176	5211	$EndPAD
5177	5212	$PAD
...	...
5192	5227	Sh "AB20" O 158 157 0 0 0
5193	5228	Dr 0 0 0
5194	5229	At SMD N 00888000
5195		Ne 105 "/fpga1/PROG_MISO0"
	5230	Ne 103 "/fpga1/PROG_MISO0"
5196	5231	Po 3346 4133
5197	5232	$EndPAD
5198	5233	$PAD
...	...
5283	5318	Sh "1" R 157 236 0 0 1800
5284	5319	Dr 0 0 0
5285	5320	At SMD N 00440001
5286		Ne 200 "/fpga2/R_M0_UDM"
	5321	Ne 198 "/fpga2/R_M0_UDM"
5287	5322	Po -176 0
5288	5323	$EndPAD
5289	5324	$PAD
5290	5325	Sh "2" R 157 236 0 0 1800
5291	5326	Dr 0 0 0
5292	5327	At SMD N 00440001
5293		Ne 261 "/sdram/M0_UDM"
	5328	Ne 136 "/fpga2/M0_UDM"
5294	5329	Po 176 0
5295	5330	$EndPAD
5296	5331	$EndMODULE 0402
...	...
5311	5346	Sh "1" R 157 236 0 0 1800
5312	5347	Dr 0 0 0
5313	5348	At SMD N 00440001
5314		Ne 201 "/fpga2/R_M0_UDQS"
	5349	Ne 199 "/fpga2/R_M0_UDQS"
5315	5350	Po -176 0
5316	5351	$EndPAD
5317	5352	$PAD
5318	5353	Sh "2" R 157 236 0 0 1800
5319	5354	Dr 0 0 0
5320	5355	At SMD N 00440001
5321		Ne 137 "/fpga2/M0_UDQS"
	5356	Ne 260 "/sdram/M0_UDQS"
5322	5357	Po 176 0
5323	5358	$EndPAD
5324	5359	$EndMODULE 0402
...	...
5339	5374	Sh "1" R 157 236 0 0 1800
5340	5375	Dr 0 0 0
5341	5376	At SMD N 00440001
5342		Ne 180 "/fpga2/R_M0_CKE"
	5377	Ne 178 "/fpga2/R_M0_CKE"
5343	5378	Po -176 0
5344	5379	$EndPAD
5345	5380	$PAD
5346	5381	Sh "2" R 157 236 0 0 1800
5347	5382	Dr 0 0 0
5348	5383	At SMD N 00440001
5349		Ne 253 "/sdram/M0_CKE"
	5384	Ne 251 "/sdram/M0_CKE"
5350	5385	Po 176 0
5351	5386	$EndPAD
5352	5387	$EndMODULE 0402
...	...
5367	5402	Sh "1" R 157 236 0 0 900
5368	5403	Dr 0 0 0
5369	5404	At SMD N 00440001
5370		Ne 254 "/sdram/M0_CLK"
	5405	Ne 123 "/fpga2/M0_CLK"
5371	5406	Po -176 0
5372	5407	$EndPAD
5373	5408	$PAD
5374	5409	Sh "2" R 157 236 0 0 900
5375	5410	Dr 0 0 0
5376	5411	At SMD N 00440001
5377		Ne 123 "/fpga2/M0_CLK#"
	5412	Ne 252 "/sdram/M0_CLK#"
5378	5413	Po 176 0
5379	5414	$EndPAD
5380	5415	$EndMODULE 0402
...	...
5393	5428	Sh "1" R 118 157 0 0 2700
5394	5429	Dr 0 0 0
5395	5430	At SMD N 00440001
5396		Ne 164 "/fpga2/R_M0_A0"
	5431	Ne 162 "/fpga2/R_M0_A0"
5397	5432	Po -295 -177
5398	5433	$EndPAD
5399	5434	$PAD
5400	5435	Sh "2" R 118 157 0 0 2700
5401	5436	Dr 0 0 0
5402	5437	At SMD N 00440001
5403		Ne 165 "/fpga2/R_M0_A1"
	5438	Ne 163 "/fpga2/R_M0_A1"
5404	5439	Po -98 -177
5405	5440	$EndPAD
5406	5441	$PAD
5407	5442	Sh "3" R 118 157 0 0 2700
5408	5443	Dr 0 0 0
5409	5444	At SMD N 00440001
5410		Ne 169 "/fpga2/R_M0_A2"
	5445	Ne 167 "/fpga2/R_M0_A2"
5411	5446	Po 98 -177
5412	5447	$EndPAD
5413	5448	$PAD
5414	5449	Sh "4" R 118 157 0 0 2700
5415	5450	Dr 0 0 0
5416	5451	At SMD N 00440001
5417		Ne 170 "/fpga2/R_M0_A3"
	5452	Ne 168 "/fpga2/R_M0_A3"
5418	5453	Po 295 -177
5419	5454	$EndPAD
5420	5455	$PAD
5421	5456	Sh "5" R 118 157 0 0 900
5422	5457	Dr 0 0 0
5423	5458	At SMD N 00440001
5424		Ne 116 "/fpga2/M0_A3"
	5459	Ne 248 "/sdram/M0_A3"
5425	5460	Po 295 177
5426	5461	$EndPAD
5427	5462	$PAD
...	...
5435	5470	Sh "7" R 118 157 0 0 900
5436	5471	Dr 0 0 0
5437	5472	At SMD N 00440001
5438		Ne 113 "/fpga2/M0_A1"
	5473	Ne 246 "/sdram/M0_A1"
5439	5474	Po -98 177
5440	5475	$EndPAD
5441	5476	$PAD
...	...
5461	5496	Sh "1" R 118 157 0 0 2700
5462	5497	Dr 0 0 0
5463	5498	At SMD N 00440001
5464		Ne 199 "/fpga2/R_M0_RAS#"
	5499	Ne 197 "/fpga2/R_M0_RAS#"
5465	5500	Po -295 -177
5466	5501	$EndPAD
5467	5502	$PAD
5468	5503	Sh "2" R 118 157 0 0 2700
5469	5504	Dr 0 0 0
5470	5505	At SMD N 00440001
5471		Ne 177 "/fpga2/R_M0_BA0"
	5506	Ne 175 "/fpga2/R_M0_BA0"
5472	5507	Po -98 -177
5473	5508	$EndPAD
5474	5509	$PAD
5475	5510	Sh "3" R 118 157 0 0 2700
5476	5511	Dr 0 0 0
5477	5512	At SMD N 00440001
5478		Ne 178 "/fpga2/R_M0_BA1"
	5513	Ne 176 "/fpga2/R_M0_BA1"
5479	5514	Po 98 -177
5480	5515	$EndPAD
5481	5516	$PAD
5482	5517	Sh "4" R 118 157 0 0 2700
5483	5518	Dr 0 0 0
5484	5519	At SMD N 00440001
5485		Ne 166 "/fpga2/R_M0_A10"
	5520	Ne 164 "/fpga2/R_M0_A10"
5486	5521	Po 295 -177
5487	5522	$EndPAD
5488	5523	$PAD
5489	5524	Sh "5" R 118 157 0 0 900
5490	5525	Dr 0 0 0
5491	5526	At SMD N 00440001
5492		Ne 248 "/sdram/M0_A10"
	5527	Ne 113 "/fpga2/M0_A10"
5493	5528	Po 295 177
5494	5529	$EndPAD
5495	5530	$PAD
5496	5531	Sh "6" R 118 157 0 0 900
5497	5532	Dr 0 0 0
5498	5533	At SMD N 00440001
5499		Ne 252 "/sdram/M0_BA1"
	5534	Ne 250 "/sdram/M0_BA1"
5500	5535	Po 98 177
5501	5536	$EndPAD
5502	5537	$PAD
5503	5538	Sh "7" R 118 157 0 0 900
5504	5539	Dr 0 0 0
5505	5540	At SMD N 00440001
5506		Ne 251 "/sdram/M0_BA0"
	5541	Ne 121 "/fpga2/M0_BA0"
5507	5542	Po -98 177
5508	5543	$EndPAD
5509	5544	$PAD
5510	5545	Sh "8" R 118 157 0 0 900
5511	5546	Dr 0 0 0
5512	5547	At SMD N 00440001
5513		Ne 260 "/sdram/M0_RAS#"
	5548	Ne 259 "/sdram/M0_RAS#"
5514	5549	Po -295 177
5515	5550	$EndPAD
5516	5551	$EndMODULE R_PACK4-0402
...	...
5529	5564	Sh "1" R 118 157 0 0 900
5530	5565	Dr 0 0 0
5531	5566	At SMD N 00440001
5532		Ne 174 "/fpga2/R_M0_A7"
	5567	Ne 172 "/fpga2/R_M0_A7"
5533	5568	Po -295 -177
5534	5569	$EndPAD
5535	5570	$PAD
5536	5571	Sh "2" R 118 157 0 0 900
5537	5572	Dr 0 0 0
5538	5573	At SMD N 00440001
5539		Ne 173 "/fpga2/R_M0_A6"
	5574	Ne 171 "/fpga2/R_M0_A6"
5540	5575	Po -98 -177
5541	5576	$EndPAD
5542	5577	$PAD
5543	5578	Sh "3" R 118 157 0 0 900
5544	5579	Dr 0 0 0
5545	5580	At SMD N 00440001
5546		Ne 172 "/fpga2/R_M0_A5"
	5581	Ne 170 "/fpga2/R_M0_A5"
5547	5582	Po 98 -177
5548	5583	$EndPAD
5549	5584	$PAD
5550	5585	Sh "4" R 118 157 0 0 900
5551	5586	Dr 0 0 0
5552	5587	At SMD N 00440001
5553		Ne 171 "/fpga2/R_M0_A4"
	5588	Ne 169 "/fpga2/R_M0_A4"
5554	5589	Po 295 -177
5555	5590	$EndPAD
5556	5591	$PAD
5557	5592	Sh "5" R 118 157 0 0 2700
5558	5593	Dr 0 0 0
5559	5594	At SMD N 00440001
5560		Ne 117 "/fpga2/M0_A4"
	5595	Ne 116 "/fpga2/M0_A4"
5561	5596	Po 295 177
5562	5597	$EndPAD
5563	5598	$PAD
5564	5599	Sh "6" R 118 157 0 0 2700
5565	5600	Dr 0 0 0
5566	5601	At SMD N 00440001
5567		Ne 118 "/fpga2/M0_A5"
	5602	Ne 117 "/fpga2/M0_A5"
5568	5603	Po 98 177
5569	5604	$EndPAD
5570	5605	$PAD
5571	5606	Sh "7" R 118 157 0 0 2700
5572	5607	Dr 0 0 0
5573	5608	At SMD N 00440001
5574		Ne 119 "/fpga2/M0_A6"
	5609	Ne 249 "/sdram/M0_A6"
5575	5610	Po -98 177
5576	5611	$EndPAD
5577	5612	$PAD
5578	5613	Sh "8" R 118 157 0 0 2700
5579	5614	Dr 0 0 0
5580	5615	At SMD N 00440001
5581		Ne 120 "/fpga2/M0_A7"
	5616	Ne 118 "/fpga2/M0_A7"
5582	5617	Po -295 177
5583	5618	$EndPAD
5584	5619	$EndMODULE R_PACK4-0402
...	...
5597	5632	Sh "1" R 118 157 0 0 900
5598	5633	Dr 0 0 0
5599	5634	At SMD N 00440001
5600		Ne 168 "/fpga2/R_M0_A12"
	5635	Ne 166 "/fpga2/R_M0_A12"
5601	5636	Po -295 -177
5602	5637	$EndPAD
5603	5638	$PAD
5604	5639	Sh "2" R 118 157 0 0 900
5605	5640	Dr 0 0 0
5606	5641	At SMD N 00440001
5607		Ne 167 "/fpga2/R_M0_A11"
	5642	Ne 165 "/fpga2/R_M0_A11"
5608	5643	Po -98 -177
5609	5644	$EndPAD
5610	5645	$PAD
5611	5646	Sh "3" R 118 157 0 0 900
5612	5647	Dr 0 0 0
5613	5648	At SMD N 00440001
5614		Ne 176 "/fpga2/R_M0_A9"
	5649	Ne 174 "/fpga2/R_M0_A9"
5615	5650	Po 98 -177
5616	5651	$EndPAD
5617	5652	$PAD
5618	5653	Sh "4" R 118 157 0 0 900
5619	5654	Dr 0 0 0
5620	5655	At SMD N 00440001
5621		Ne 175 "/fpga2/R_M0_A8"
	5656	Ne 173 "/fpga2/R_M0_A8"
5622	5657	Po 295 -177
5623	5658	$EndPAD
5624	5659	$PAD
5625	5660	Sh "5" R 118 157 0 0 2700
5626	5661	Dr 0 0 0
5627	5662	At SMD N 00440001
5628		Ne 250 "/sdram/M0_A8"
	5663	Ne 119 "/fpga2/M0_A8"
5629	5664	Po 295 177
5630	5665	$EndPAD
5631	5666	$PAD
5632	5667	Sh "6" R 118 157 0 0 2700
5633	5668	Dr 0 0 0
5634	5669	At SMD N 00440001
5635		Ne 121 "/fpga2/M0_A9"
	5670	Ne 120 "/fpga2/M0_A9"
5636	5671	Po 98 177
5637	5672	$EndPAD
5638	5673	$PAD
5639	5674	Sh "7" R 118 157 0 0 2700
5640	5675	Dr 0 0 0
5641	5676	At SMD N 00440001
5642		Ne 114 "/fpga2/M0_A11"
	5677	Ne 247 "/sdram/M0_A11"
5643	5678	Po -98 177
5644	5679	$EndPAD
5645	5680	$PAD
5646	5681	Sh "8" R 118 157 0 0 2700
5647	5682	Dr 0 0 0
5648	5683	At SMD N 00440001
5649		Ne 249 "/sdram/M0_A12"
	5684	Ne 114 "/fpga2/M0_A12"
5650	5685	Po -295 177
5651	5686	$EndPAD
5652	5687	$EndMODULE R_PACK4-0402
...	...
5665	5700	Sh "1" R 118 157 0 0 2700
5666	5701	Dr 0 0 0
5667	5702	At SMD N 00440001
5668		Ne 191 "/fpga2/R_M0_DQ4"
	5703	Ne 189 "/fpga2/R_M0_DQ4"
5669	5704	Po -295 -177
5670	5705	$EndPAD
5671	5706	$PAD
5672	5707	Sh "2" R 118 157 0 0 2700
5673	5708	Dr 0 0 0
5674	5709	At SMD N 00440001
5675		Ne 192 "/fpga2/R_M0_DQ5"
	5710	Ne 190 "/fpga2/R_M0_DQ5"
5676	5711	Po -98 -177
5677	5712	$EndPAD
5678	5713	$PAD
5679	5714	Sh "3" R 118 157 0 0 2700
5680	5715	Dr 0 0 0
5681	5716	At SMD N 00440001
5682		Ne 193 "/fpga2/R_M0_DQ6"
	5717	Ne 191 "/fpga2/R_M0_DQ6"
5683	5718	Po 98 -177
5684	5719	$EndPAD
5685	5720	$PAD
5686	5721	Sh "4" R 118 157 0 0 2700
5687	5722	Dr 0 0 0
5688	5723	At SMD N 00440001
5689		Ne 194 "/fpga2/R_M0_DQ7"
	5724	Ne 192 "/fpga2/R_M0_DQ7"
5690	5725	Po 295 -177
5691	5726	$EndPAD
5692	5727	$PAD
5693	5728	Sh "5" R 118 157 0 0 900
5694	5729	Dr 0 0 0
5695	5730	At SMD N 00440001
5696		Ne 134 "/fpga2/M0_DQ7"
	5731	Ne 132 "/fpga2/M0_DQ7"
5697	5732	Po 295 177
5698	5733	$EndPAD
5699	5734	$PAD
5700	5735	Sh "6" R 118 157 0 0 900
5701	5736	Dr 0 0 0
5702	5737	At SMD N 00440001
5703		Ne 257 "/sdram/M0_DQ6"
	5738	Ne 131 "/fpga2/M0_DQ6"
5704	5739	Po 98 177
5705	5740	$EndPAD
5706	5741	$PAD
5707	5742	Sh "7" R 118 157 0 0 900
5708	5743	Dr 0 0 0
5709	5744	At SMD N 00440001
5710		Ne 133 "/fpga2/M0_DQ5"
	5745	Ne 257 "/sdram/M0_DQ5"
5711	5746	Po -98 177
5712	5747	$EndPAD
5713	5748	$PAD
...	...
5733	5768	Sh "1" R 118 157 0 0 2700
5734	5769	Dr 0 0 0
5735	5770	At SMD N 00440001
5736		Ne 181 "/fpga2/R_M0_DQ0"
	5771	Ne 179 "/fpga2/R_M0_DQ0"
5737	5772	Po -295 -177
5738	5773	$EndPAD
5739	5774	$PAD
5740	5775	Sh "2" R 118 157 0 0 2700
5741	5776	Dr 0 0 0
5742	5777	At SMD N 00440001
5743		Ne 182 "/fpga2/R_M0_DQ1"
	5778	Ne 180 "/fpga2/R_M0_DQ1"
5744	5779	Po -98 -177
5745	5780	$EndPAD
5746	5781	$PAD
5747	5782	Sh "3" R 118 157 0 0 2700
5748	5783	Dr 0 0 0
5749	5784	At SMD N 00440001
5750		Ne 189 "/fpga2/R_M0_DQ2"
	5785	Ne 187 "/fpga2/R_M0_DQ2"
5751	5786	Po 98 -177
5752	5787	$EndPAD
5753	5788	$PAD
5754	5789	Sh "4" R 118 157 0 0 2700
5755	5790	Dr 0 0 0
5756	5791	At SMD N 00440001
5757		Ne 190 "/fpga2/R_M0_DQ3"
	5792	Ne 188 "/fpga2/R_M0_DQ3"
5758	5793	Po 295 -177
5759	5794	$EndPAD
5760	5795	$PAD
5761	5796	Sh "5" R 118 157 0 0 900
5762	5797	Dr 0 0 0
5763	5798	At SMD N 00440001
5764		Ne 132 "/fpga2/M0_DQ3"
	5799	Ne 130 "/fpga2/M0_DQ3"
5765	5800	Po 295 177
5766	5801	$EndPAD
5767	5802	$PAD
5768	5803	Sh "6" R 118 157 0 0 900
5769	5804	Dr 0 0 0
5770	5805	At SMD N 00440001
5771		Ne 255 "/sdram/M0_DQ2"
	5806	Ne 129 "/fpga2/M0_DQ2"
5772	5807	Po 98 177
5773	5808	$EndPAD
5774	5809	$PAD
...	...
5801	5836	Sh "1" R 118 157 0 0 900
5802	5837	Dr 0 0 0
5803	5838	At SMD N 00440001
5804		Ne 195 "/fpga2/R_M0_DQ8"
	5839	Ne 193 "/fpga2/R_M0_DQ8"
5805	5840	Po -295 -177
5806	5841	$EndPAD
5807	5842	$PAD
5808	5843	Sh "2" R 118 157 0 0 900
5809	5844	Dr 0 0 0
5810	5845	At SMD N 00440001
5811		Ne 196 "/fpga2/R_M0_DQ9"
	5846	Ne 194 "/fpga2/R_M0_DQ9"
5812	5847	Po -98 -177
5813	5848	$EndPAD
5814	5849	$PAD
5815	5850	Sh "3" R 118 157 0 0 900
5816	5851	Dr 0 0 0
5817	5852	At SMD N 00440001
5818		Ne 183 "/fpga2/R_M0_DQ10"
	5853	Ne 181 "/fpga2/R_M0_DQ10"
5819	5854	Po 98 -177
5820	5855	$EndPAD
5821	5856	$PAD
5822	5857	Sh "4" R 118 157 0 0 900
5823	5858	Dr 0 0 0
5824	5859	At SMD N 00440001
5825		Ne 184 "/fpga2/R_M0_DQ11"
	5860	Ne 182 "/fpga2/R_M0_DQ11"
5826	5861	Po 295 -177
5827	5862	$EndPAD
5828	5863	$PAD
...	...
5843	5878	Sh "7" R 118 157 0 0 2700
5844	5879	Dr 0 0 0
5845	5880	At SMD N 00440001
5846		Ne 259 "/sdram/M0_DQ9"
	5881	Ne 133 "/fpga2/M0_DQ9"
5847	5882	Po -98 177
5848	5883	$EndPAD
5849	5884	$PAD
...	...
5869	5904	Sh "1" R 118 157 0 0 900
5870	5905	Dr 0 0 0
5871	5906	At SMD N 00440001
5872		Ne 185 "/fpga2/R_M0_DQ12"
	5907	Ne 183 "/fpga2/R_M0_DQ12"
5873	5908	Po -295 -177
5874	5909	$EndPAD
5875	5910	$PAD
5876	5911	Sh "2" R 118 157 0 0 900
5877	5912	Dr 0 0 0
5878	5913	At SMD N 00440001
5879		Ne 186 "/fpga2/R_M0_DQ13"
	5914	Ne 184 "/fpga2/R_M0_DQ13"
5880	5915	Po -98 -177
5881	5916	$EndPAD
5882	5917	$PAD
5883	5918	Sh "3" R 118 157 0 0 900
5884	5919	Dr 0 0 0
5885	5920	At SMD N 00440001
5886		Ne 187 "/fpga2/R_M0_DQ14"
	5921	Ne 185 "/fpga2/R_M0_DQ14"
5887	5922	Po 98 -177
5888	5923	$EndPAD
5889	5924	$PAD
5890	5925	Sh "4" R 118 157 0 0 900
5891	5926	Dr 0 0 0
5892	5927	At SMD N 00440001
5893		Ne 188 "/fpga2/R_M0_DQ15"
	5928	Ne 186 "/fpga2/R_M0_DQ15"
5894	5929	Po 295 -177
5895	5930	$EndPAD
5896	5931	$PAD
5897	5932	Sh "5" R 118 157 0 0 2700
5898	5933	Dr 0 0 0
5899	5934	At SMD N 00440001
5900		Ne 131 "/fpga2/M0_DQ15"
	5935	Ne 128 "/fpga2/M0_DQ15"
5901	5936	Po 295 177
5902	5937	$EndPAD
5903	5938	$PAD
5904	5939	Sh "6" R 118 157 0 0 2700
5905	5940	Dr 0 0 0
5906	5941	At SMD N 00440001
5907		Ne 130 "/fpga2/M0_DQ14"
	5942	Ne 255 "/sdram/M0_DQ14"
5908	5943	Po 98 177
5909	5944	$EndPAD
5910	5945	$PAD
5911	5946	Sh "7" R 118 157 0 0 2700
5912	5947	Dr 0 0 0
5913	5948	At SMD N 00440001
5914		Ne 129 "/fpga2/M0_DQ13"
	5949	Ne 254 "/sdram/M0_DQ13"
5915	5950	Po -98 177
5916	5951	$EndPAD
5917	5952	$PAD
5918	5953	Sh "8" R 118 157 0 0 2700
5919	5954	Dr 0 0 0
5920	5955	At SMD N 00440001
5921		Ne 128 "/fpga2/M0_DQ12"
	5956	Ne 253 "/sdram/M0_DQ12"
5922	5957	Po -295 177
5923	5958	$EndPAD
5924	5959	$EndMODULE R_PACK4-0402
...	...
5939	5974	Sh "1" R 157 236 0 0 900
5940	5975	Dr 0 0 0
5941	5976	At SMD N 00440001
5942		Ne 241 "/fpga2/R_M1_UDQS"
	5977	Ne 239 "/fpga2/R_M1_UDQS"
5943	5978	Po -176 0
5944	5979	$EndPAD
5945	5980	$PAD
5946	5981	Sh "2" R 157 236 0 0 900
5947	5982	Dr 0 0 0
5948	5983	At SMD N 00440001
5949		Ne 278 "/sdram/M1_UDQS"
	5984	Ne 161 "/fpga2/M1_UDQS"
5950	5985	Po 176 0
5951	5986	$EndPAD
5952	5987	$EndMODULE 0402
...	...
5967	6002	Sh "1" R 157 236 0 0 0
5968	6003	Dr 0 0 0
5969	6004	At SMD N 00440001
5970		Ne 220 "/fpga2/R_M1_CS#"
	6005	Ne 218 "/fpga2/R_M1_CS#"
5971	6006	Po -176 0
5972	6007	$EndPAD
5973	6008	$PAD
5974	6009	Sh "2" R 157 236 0 0 0
5975	6010	Dr 0 0 0
5976	6011	At SMD N 00440001
5977		Ne 151 "/fpga2/M1_CS#"
	6012	Ne 148 "/fpga2/M1_CS#"
5978	6013	Po 176 0
5979	6014	$EndPAD
5980	6015	$EndMODULE 0402
...	...
5995	6030	Sh "1" R 157 236 0 0 2700
5996	6031	Dr 0 0 0
5997	6032	At SMD N 00440001
5998		Ne 219 "/fpga2/R_M1_CKE"
	6033	Ne 217 "/fpga2/R_M1_CKE"
5999	6034	Po -176 0
6000	6035	$EndPAD
6001	6036	$PAD
6002	6037	Sh "2" R 157 236 0 0 2700
6003	6038	Dr 0 0 0
6004	6039	At SMD N 00440001
6005		Ne 269 "/sdram/M1_CKE"
	6040	Ne 145 "/fpga2/M1_CKE"
6006	6041	Po 176 0
6007	6042	$EndPAD
6008	6043	$EndMODULE 0402
...	...
6023	6058	Sh "1" R 157 236 0 0 0
6024	6059	Dr 0 0 0
6025	6060	At SMD N 00440001
6026		Ne 240 "/fpga2/R_M1_UDM"
	6061	Ne 238 "/fpga2/R_M1_UDM"
6027	6062	Po -176 0
6028	6063	$EndPAD
6029	6064	$PAD
6030	6065	Sh "2" R 157 236 0 0 0
6031	6066	Dr 0 0 0
6032	6067	At SMD N 00440001
6033		Ne 277 "/sdram/M1_UDM"
	6068	Ne 278 "/sdram/M1_UDM"
6034	6069	Po 176 0
6035	6070	$EndPAD
6036	6071	$EndMODULE 0402
...	...
6049	6084	Sh "1" R 118 157 0 0 2700
6050	6085	Dr 0 0 0
6051	6086	At SMD N 00440001
6052		Ne 157 "/fpga2/M1_DQ15"
	6087	Ne 153 "/fpga2/M1_DQ15"
6053	6088	Po -295 -177
6054	6089	$EndPAD
6055	6090	$PAD
6056	6091	Sh "2" R 118 157 0 0 2700
6057	6092	Dr 0 0 0
6058	6093	At SMD N 00440001
6059		Ne 271 "/sdram/M1_DQ14"
	6094	Ne 152 "/fpga2/M1_DQ14"
6060	6095	Po -98 -177
6061	6096	$EndPAD
6062	6097	$PAD
6063	6098	Sh "3" R 118 157 0 0 2700
6064	6099	Dr 0 0 0
6065	6100	At SMD N 00440001
6066		Ne 156 "/fpga2/M1_DQ13"
	6101	Ne 273 "/sdram/M1_DQ13"
6067	6102	Po 98 -177
6068	6103	$EndPAD
6069	6104	$PAD
6070	6105	Sh "4" R 118 157 0 0 2700
6071	6106	Dr 0 0 0
6072	6107	At SMD N 00440001
6073		Ne 155 "/fpga2/M1_DQ12"
	6108	Ne 272 "/sdram/M1_DQ12"
6074	6109	Po 295 -177
6075	6110	$EndPAD
6076	6111	$PAD
6077	6112	Sh "5" R 118 157 0 0 900
6078	6113	Dr 0 0 0
6079	6114	At SMD N 00440001
6080		Ne 225 "/fpga2/R_M1_DQ12"
	6115	Ne 223 "/fpga2/R_M1_DQ12"
6081	6116	Po 295 177
6082	6117	$EndPAD
6083	6118	$PAD
6084	6119	Sh "6" R 118 157 0 0 900
6085	6120	Dr 0 0 0
6086	6121	At SMD N 00440001
6087		Ne 226 "/fpga2/R_M1_DQ13"
	6122	Ne 224 "/fpga2/R_M1_DQ13"
6088	6123	Po 98 177
6089	6124	$EndPAD
6090	6125	$PAD
6091	6126	Sh "7" R 118 157 0 0 900
6092	6127	Dr 0 0 0
6093	6128	At SMD N 00440001
6094		Ne 227 "/fpga2/R_M1_DQ14"
	6129	Ne 225 "/fpga2/R_M1_DQ14"
6095	6130	Po -98 177
6096	6131	$EndPAD
6097	6132	$PAD
6098	6133	Sh "8" R 118 157 0 0 900
6099	6134	Dr 0 0 0
6100	6135	At SMD N 00440001
6101		Ne 228 "/fpga2/R_M1_DQ15"
	6136	Ne 226 "/fpga2/R_M1_DQ15"
6102	6137	Po -295 177
6103	6138	$EndPAD
6104	6139	$EndMODULE R_PACK4-0402
...	...
6117	6152	Sh "1" R 118 157 0 0 2700
6118	6153	Dr 0 0 0
6119	6154	At SMD N 00440001
6120		Ne 270 "/sdram/M1_DQ11"
	6155	Ne 151 "/fpga2/M1_DQ11"
6121	6156	Po -295 -177
6122	6157	$EndPAD
6123	6158	$PAD
6124	6159	Sh "2" R 118 157 0 0 2700
6125	6160	Dr 0 0 0
6126	6161	At SMD N 00440001
6127		Ne 154 "/fpga2/M1_DQ10"
	6162	Ne 150 "/fpga2/M1_DQ10"
6128	6163	Po -98 -177
6129	6164	$EndPAD
6130	6165	$PAD
6131	6166	Sh "3" R 118 157 0 0 2700
6132	6167	Dr 0 0 0
6133	6168	At SMD N 00440001
6134		Ne 161 "/fpga2/M1_DQ9"
	6169	Ne 159 "/fpga2/M1_DQ9"
6135	6170	Po 98 -177
6136	6171	$EndPAD
6137	6172	$PAD
6138	6173	Sh "4" R 118 157 0 0 2700
6139	6174	Dr 0 0 0
6140	6175	At SMD N 00440001
6141		Ne 160 "/fpga2/M1_DQ8"
	6176	Ne 158 "/fpga2/M1_DQ8"
6142	6177	Po 295 -177
6143	6178	$EndPAD
6144	6179	$PAD
6145	6180	Sh "5" R 118 157 0 0 900
6146	6181	Dr 0 0 0
6147	6182	At SMD N 00440001
6148		Ne 235 "/fpga2/R_M1_DQ8"
	6183	Ne 233 "/fpga2/R_M1_DQ8"
6149	6184	Po 295 177
6150	6185	$EndPAD
6151	6186	$PAD
6152	6187	Sh "6" R 118 157 0 0 900
6153	6188	Dr 0 0 0
6154	6189	At SMD N 00440001
6155		Ne 236 "/fpga2/R_M1_DQ9"
	6190	Ne 234 "/fpga2/R_M1_DQ9"
6156	6191	Po 98 177
6157	6192	$EndPAD
6158	6193	$PAD
6159	6194	Sh "7" R 118 157 0 0 900
6160	6195	Dr 0 0 0
6161	6196	At SMD N 00440001
6162		Ne 223 "/fpga2/R_M1_DQ10"
	6197	Ne 221 "/fpga2/R_M1_DQ10"
6163	6198	Po -98 177
6164	6199	$EndPAD
6165	6200	$PAD
6166	6201	Sh "8" R 118 157 0 0 900
6167	6202	Dr 0 0 0
6168	6203	At SMD N 00440001
6169		Ne 224 "/fpga2/R_M1_DQ11"
	6204	Ne 222 "/fpga2/R_M1_DQ11"
6170	6205	Po -295 177
6171	6206	$EndPAD
6172	6207	$EndMODULE R_PACK4-0402
...	...
6187	6222	Sh "1" R 157 236 0 0 900
6188	6223	Dr 0 0 0
6189	6224	At SMD N 00440001
6190		Ne 150 "/fpga2/M1_CLK#"
	6225	Ne 147 "/fpga2/M1_CLK#"
6191	6226	Po -176 0
6192	6227	$EndPAD
6193	6228	$PAD
6194	6229	Sh "2" R 157 236 0 0 900
6195	6230	Dr 0 0 0
6196	6231	At SMD N 00440001
6197		Ne 149 "/fpga2/M1_CLK"
	6232	Ne 146 "/fpga2/M1_CLK"
6198	6233	Po 176 0
6199	6234	$EndPAD
6200	6235	$EndMODULE 0402
...	...
6213	6248	Sh "1" R 118 157 0 0 2700
6214	6249	Dr 0 0 0
6215	6250	At SMD N 00440001
6216		Ne 141 "/fpga2/M1_A12"
	6251	Ne 265 "/sdram/M1_A12"
6217	6252	Po -295 -177
6218	6253	$EndPAD
6219	6254	$PAD
6220	6255	Sh "2" R 118 157 0 0 2700
6221	6256	Dr 0 0 0
6222	6257	At SMD N 00440001
6223		Ne 264 "/sdram/M1_A11"
	6258	Ne 138 "/fpga2/M1_A11"
6224	6259	Po -98 -177
6225	6260	$EndPAD
6226	6261	$PAD
6227	6262	Sh "3" R 118 157 0 0 2700
6228	6263	Dr 0 0 0
6229	6264	At SMD N 00440001
6230		Ne 147 "/fpga2/M1_A9"
	6265	Ne 143 "/fpga2/M1_A9"
6231	6266	Po 98 -177
6232	6267	$EndPAD
6233	6268	$PAD
6234	6269	Sh "4" R 118 157 0 0 2700
6235	6270	Dr 0 0 0
6236	6271	At SMD N 00440001
6237		Ne 146 "/fpga2/M1_A8"
	6272	Ne 142 "/fpga2/M1_A8"
6238	6273	Po 295 -177
6239	6274	$EndPAD
6240	6275	$PAD
6241	6276	Sh "5" R 118 157 0 0 900
6242	6277	Dr 0 0 0
6243	6278	At SMD N 00440001
6244		Ne 214 "/fpga2/R_M1_A8"
	6279	Ne 212 "/fpga2/R_M1_A8"
6245	6280	Po 295 177
6246	6281	$EndPAD
6247	6282	$PAD
6248	6283	Sh "6" R 118 157 0 0 900
6249	6284	Dr 0 0 0
6250	6285	At SMD N 00440001
6251		Ne 215 "/fpga2/R_M1_A9"
	6286	Ne 213 "/fpga2/R_M1_A9"
6252	6287	Po 98 177
6253	6288	$EndPAD
6254	6289	$PAD
6255	6290	Sh "7" R 118 157 0 0 900
6256	6291	Dr 0 0 0
6257	6292	At SMD N 00440001
6258		Ne 206 "/fpga2/R_M1_A11"
	6293	Ne 204 "/fpga2/R_M1_A11"
6259	6294	Po -98 177
6260	6295	$EndPAD
6261	6296	$PAD
6262	6297	Sh "8" R 118 157 0 0 900
6263	6298	Dr 0 0 0
6264	6299	At SMD N 00440001
6265		Ne 207 "/fpga2/R_M1_A12"
	6300	Ne 205 "/fpga2/R_M1_A12"
6266	6301	Po -295 177
6267	6302	$EndPAD
6268	6303	$EndMODULE R_PACK4-0402
...	...
6281	6316	Sh "1" R 118 157 0 0 2700
6282	6317	Dr 0 0 0
6283	6318	At SMD N 00440001
6284		Ne 145 "/fpga2/M1_A7"
	6319	Ne 141 "/fpga2/M1_A7"
6285	6320	Po -295 -177
6286	6321	$EndPAD
6287	6322	$PAD
6288	6323	Sh "2" R 118 157 0 0 2700
6289	6324	Dr 0 0 0
6290	6325	At SMD N 00440001
6291		Ne 144 "/fpga2/M1_A6"
	6326	Ne 140 "/fpga2/M1_A6"
6292	6327	Po -98 -177
6293	6328	$EndPAD
6294	6329	$PAD
6295	6330	Sh "3" R 118 157 0 0 2700
6296	6331	Dr 0 0 0
6297	6332	At SMD N 00440001
6298		Ne 143 "/fpga2/M1_A5"
	6333	Ne 268 "/sdram/M1_A5"
6299	6334	Po 98 -177
6300	6335	$EndPAD
6301	6336	$PAD
6302	6337	Sh "4" R 118 157 0 0 2700
6303	6338	Dr 0 0 0
6304	6339	At SMD N 00440001
6305		Ne 266 "/sdram/M1_A4"
	6340	Ne 267 "/sdram/M1_A4"
6306	6341	Po 295 -177
6307	6342	$EndPAD
6308	6343	$PAD
6309	6344	Sh "5" R 118 157 0 0 900
6310	6345	Dr 0 0 0
6311	6346	At SMD N 00440001
6312		Ne 210 "/fpga2/R_M1_A4"
	6347	Ne 208 "/fpga2/R_M1_A4"
6313	6348	Po 295 177
6314	6349	$EndPAD
6315	6350	$PAD
6316	6351	Sh "6" R 118 157 0 0 900
6317	6352	Dr 0 0 0
6318	6353	At SMD N 00440001
6319		Ne 211 "/fpga2/R_M1_A5"
	6354	Ne 209 "/fpga2/R_M1_A5"
6320	6355	Po 98 177
6321	6356	$EndPAD
6322	6357	$PAD
6323	6358	Sh "7" R 118 157 0 0 900
6324	6359	Dr 0 0 0
6325	6360	At SMD N 00440001
6326		Ne 212 "/fpga2/R_M1_A6"
	6361	Ne 210 "/fpga2/R_M1_A6"
6327	6362	Po -98 177
6328	6363	$EndPAD
6329	6364	$PAD
6330	6365	Sh "8" R 118 157 0 0 900
6331	6366	Dr 0 0 0
6332	6367	At SMD N 00440001
6333		Ne 213 "/fpga2/R_M1_A7"
	6368	Ne 211 "/fpga2/R_M1_A7"
6334	6369	Po -295 177
6335	6370	$EndPAD
6336	6371	$EndMODULE R_PACK4-0402
...	...
6349	6384	Sh "1" R 118 157 0 0 2700
6350	6385	Dr 0 0 0
6351	6386	At SMD N 00440001
6352		Ne 221 "/fpga2/R_M1_DQ0"
	6387	Ne 219 "/fpga2/R_M1_DQ0"
6353	6388	Po -295 -177
6354	6389	$EndPAD
6355	6390	$PAD
6356	6391	Sh "2" R 118 157 0 0 2700
6357	6392	Dr 0 0 0
6358	6393	At SMD N 00440001
6359		Ne 222 "/fpga2/R_M1_DQ1"
	6394	Ne 220 "/fpga2/R_M1_DQ1"
6360	6395	Po -98 -177
6361	6396	$EndPAD
6362	6397	$PAD
6363	6398	Sh "3" R 118 157 0 0 2700
6364	6399	Dr 0 0 0
6365	6400	At SMD N 00440001
6366		Ne 229 "/fpga2/R_M1_DQ2"
	6401	Ne 227 "/fpga2/R_M1_DQ2"
6367	6402	Po 98 -177
6368	6403	$EndPAD
6369	6404	$PAD
6370	6405	Sh "4" R 118 157 0 0 2700
6371	6406	Dr 0 0 0
6372	6407	At SMD N 00440001
6373		Ne 230 "/fpga2/R_M1_DQ3"
	6408	Ne 228 "/fpga2/R_M1_DQ3"
6374	6409	Po 295 -177
6375	6410	$EndPAD
6376	6411	$PAD
6377	6412	Sh "5" R 118 157 0 0 900
6378	6413	Dr 0 0 0
6379	6414	At SMD N 00440001
6380		Ne 272 "/sdram/M1_DQ3"
	6415	Ne 155 "/fpga2/M1_DQ3"
6381	6416	Po 295 177
6382	6417	$EndPAD
6383	6418	$PAD
6384	6419	Sh "6" R 118 157 0 0 900
6385	6420	Dr 0 0 0
6386	6421	At SMD N 00440001
6387		Ne 158 "/fpga2/M1_DQ2"
	6422	Ne 154 "/fpga2/M1_DQ2"
6388	6423	Po 98 177
6389	6424	$EndPAD
6390	6425	$PAD
6391	6426	Sh "7" R 118 157 0 0 900
6392	6427	Dr 0 0 0
6393	6428	At SMD N 00440001
6394		Ne 153 "/fpga2/M1_DQ1"
	6429	Ne 271 "/sdram/M1_DQ1"
6395	6430	Po -98 177
6396	6431	$EndPAD
6397	6432	$PAD
6398	6433	Sh "8" R 118 157 0 0 900
6399	6434	Dr 0 0 0
6400	6435	At SMD N 00440001
6401		Ne 152 "/fpga2/M1_DQ0"
	6436	Ne 149 "/fpga2/M1_DQ0"
6402	6437	Po -295 177
6403	6438	$EndPAD
6404	6439	$EndMODULE R_PACK4-0402
...	...
6417	6452	Sh "1" R 118 157 0 0 2700
6418	6453	Dr 0 0 0
6419	6454	At SMD N 00440001
6420		Ne 231 "/fpga2/R_M1_DQ4"
	6455	Ne 229 "/fpga2/R_M1_DQ4"
6421	6456	Po -295 -177
6422	6457	$EndPAD
6423	6458	$PAD
6424	6459	Sh "2" R 118 157 0 0 2700
6425	6460	Dr 0 0 0
6426	6461	At SMD N 00440001
6427		Ne 232 "/fpga2/R_M1_DQ5"
	6462	Ne 230 "/fpga2/R_M1_DQ5"
6428	6463	Po -98 -177
6429	6464	$EndPAD
6430	6465	$PAD
6431	6466	Sh "3" R 118 157 0 0 2700
6432	6467	Dr 0 0 0
6433	6468	At SMD N 00440001
6434		Ne 233 "/fpga2/R_M1_DQ6"
	6469	Ne 231 "/fpga2/R_M1_DQ6"
6435	6470	Po 98 -177
6436	6471	$EndPAD
6437	6472	$PAD
6438	6473	Sh "4" R 118 157 0 0 2700
6439	6474	Dr 0 0 0
6440	6475	At SMD N 00440001
6441		Ne 234 "/fpga2/R_M1_DQ7"
	6476	Ne 232 "/fpga2/R_M1_DQ7"
6442	6477	Po 295 -177
6443	6478	$EndPAD
6444	6479	$PAD
6445	6480	Sh "5" R 118 157 0 0 900
6446	6481	Dr 0 0 0
6447	6482	At SMD N 00440001
6448		Ne 275 "/sdram/M1_DQ7"
	6483	Ne 157 "/fpga2/M1_DQ7"
6449	6484	Po 295 177
6450	6485	$EndPAD
6451	6486	$PAD
6452	6487	Sh "6" R 118 157 0 0 900
6453	6488	Dr 0 0 0
6454	6489	At SMD N 00440001
6455		Ne 274 "/sdram/M1_DQ6"
	6490	Ne 275 "/sdram/M1_DQ6"
6456	6491	Po 98 177
6457	6492	$EndPAD
6458	6493	$PAD
6459	6494	Sh "7" R 118 157 0 0 900
6460	6495	Dr 0 0 0
6461	6496	At SMD N 00440001
6462		Ne 159 "/fpga2/M1_DQ5"
	6497	Ne 274 "/sdram/M1_DQ5"
6463	6498	Po -98 177
6464	6499	$EndPAD
6465	6500	$PAD
6466	6501	Sh "8" R 118 157 0 0 900
6467	6502	Dr 0 0 0
6468	6503	At SMD N 00440001
6469		Ne 273 "/sdram/M1_DQ4"
	6504	Ne 156 "/fpga2/M1_DQ4"
6470	6505	Po -295 177
6471	6506	$EndPAD
6472	6507	$EndMODULE R_PACK4-0402
...	...
6485	6520	Sh "1" R 118 157 0 0 2700
6486	6521	Dr 0 0 0
6487	6522	At SMD N 00440001
6488		Ne 239 "/fpga2/R_M1_RAS#"
	6523	Ne 237 "/fpga2/R_M1_RAS#"
6489	6524	Po -295 -177
6490	6525	$EndPAD
6491	6526	$PAD
6492	6527	Sh "2" R 118 157 0 0 2700
6493	6528	Dr 0 0 0
6494	6529	At SMD N 00440001
6495		Ne 216 "/fpga2/R_M1_BA0"
	6530	Ne 214 "/fpga2/R_M1_BA0"
6496	6531	Po -98 -177
6497	6532	$EndPAD
6498	6533	$PAD
6499	6534	Sh "3" R 118 157 0 0 2700
6500	6535	Dr 0 0 0
6501	6536	At SMD N 00440001
6502		Ne 217 "/fpga2/R_M1_BA1"
	6537	Ne 215 "/fpga2/R_M1_BA1"
6503	6538	Po 98 -177
6504	6539	$EndPAD
6505	6540	$PAD
6506	6541	Sh "4" R 118 157 0 0 2700
6507	6542	Dr 0 0 0
6508	6543	At SMD N 00440001
6509		Ne 205 "/fpga2/R_M1_A10"
	6544	Ne 203 "/fpga2/R_M1_A10"
6510	6545	Po 295 -177
6511	6546	$EndPAD
6512	6547	$PAD
6513	6548	Sh "5" R 118 157 0 0 900
6514	6549	Dr 0 0 0
6515	6550	At SMD N 00440001
6516		Ne 263 "/sdram/M1_A10"
	6551	Ne 264 "/sdram/M1_A10"
6517	6552	Po 295 177
6518	6553	$EndPAD
6519	6554	$PAD
6520	6555	Sh "6" R 118 157 0 0 900
6521	6556	Dr 0 0 0
6522	6557	At SMD N 00440001
6523		Ne 268 "/sdram/M1_BA1"
	6558	Ne 144 "/fpga2/M1_BA1"
6524	6559	Po 98 177
6525	6560	$EndPAD
6526	6561	$PAD
6527	6562	Sh "7" R 118 157 0 0 900
6528	6563	Dr 0 0 0
6529	6564	At SMD N 00440001
6530		Ne 267 "/sdram/M1_BA0"
	6565	Ne 269 "/sdram/M1_BA0"
6531	6566	Po -98 177
6532	6567	$EndPAD
6533	6568	$PAD
6534	6569	Sh "8" R 118 157 0 0 900
6535	6570	Dr 0 0 0
6536	6571	At SMD N 00440001
6537		Ne 276 "/sdram/M1_RAS#"
	6572	Ne 277 "/sdram/M1_RAS#"
6538	6573	Po -295 177
6539	6574	$EndPAD
6540	6575	$EndMODULE R_PACK4-0402
...	...
6553	6588	Sh "1" R 118 157 0 0 2700
6554	6589	Dr 0 0 0
6555	6590	At SMD N 00440001
6556		Ne 203 "/fpga2/R_M1_A0"
	6591	Ne 201 "/fpga2/R_M1_A0"
6557	6592	Po -295 -177
6558	6593	$EndPAD
6559	6594	$PAD
6560	6595	Sh "2" R 118 157 0 0 2700
6561	6596	Dr 0 0 0
6562	6597	At SMD N 00440001
6563		Ne 204 "/fpga2/R_M1_A1"
	6598	Ne 202 "/fpga2/R_M1_A1"
6564	6599	Po -98 -177
6565	6600	$EndPAD
6566	6601	$PAD
6567	6602	Sh "3" R 118 157 0 0 2700
6568	6603	Dr 0 0 0
6569	6604	At SMD N 00440001
6570		Ne 208 "/fpga2/R_M1_A2"
	6605	Ne 206 "/fpga2/R_M1_A2"
6571	6606	Po 98 -177
6572	6607	$EndPAD
6573	6608	$PAD
6574	6609	Sh "4" R 118 157 0 0 2700
6575	6610	Dr 0 0 0
6576	6611	At SMD N 00440001
6577		Ne 209 "/fpga2/R_M1_A3"
	6612	Ne 207 "/fpga2/R_M1_A3"
6578	6613	Po 295 -177
6579	6614	$EndPAD
6580	6615	$PAD
6581	6616	Sh "5" R 118 157 0 0 900
6582	6617	Dr 0 0 0
6583	6618	At SMD N 00440001
6584		Ne 265 "/sdram/M1_A3"
	6619	Ne 266 "/sdram/M1_A3"
6585	6620	Po 295 177
6586	6621	$EndPAD
6587	6622	$PAD
6588	6623	Sh "6" R 118 157 0 0 900
6589	6624	Dr 0 0 0
6590	6625	At SMD N 00440001
6591		Ne 142 "/fpga2/M1_A2"
	6626	Ne 139 "/fpga2/M1_A2"
6592	6627	Po 98 177
6593	6628	$EndPAD
6594	6629	$PAD
6595	6630	Sh "7" R 118 157 0 0 900
6596	6631	Dr 0 0 0
6597	6632	At SMD N 00440001
6598		Ne 140 "/fpga2/M1_A1"
	6633	Ne 263 "/sdram/M1_A1"
6599	6634	Po -98 177
6600	6635	$EndPAD
6601	6636	$PAD
6602	6637	Sh "8" R 118 157 0 0 900
6603	6638	Dr 0 0 0
6604	6639	At SMD N 00440001
6605		Ne 139 "/fpga2/M1_A0"
	6640	Ne 137 "/fpga2/M1_A0"
6606	6641	Po -295 177
6607	6642	$EndPAD
6608	6643	$EndMODULE R_PACK4-0402
...	...
6658	6693	Sh "2" R 157 236 0 0 1800
6659	6694	Dr 0 0 0
6660	6695	At SMD N 00440001
6661		Ne 13 "/ether/ETH_PLL1.8V"
	6696	Ne 16 "/ether/ETH_PLL1.8V"
6662	6697	Po 176 0
6663	6698	$EndPAD
6664	6699	$EndMODULE 0402
...	...
6853	6888	Sh "8" R 200 450 0 0 2700
6854	6889	Dr 0 0 0
6855	6890	At SMD N 00888000
6856		Ne 329 "VCCO2"
	6891	Ne 336 "VCCO2"
6857	6892	Po -750 -1050
6858	6893	$EndPAD
6859	6894	$PAD
6860	6895	Sh "1" R 200 450 0 0 2700
6861	6896	Dr 0 0 0
6862	6897	At SMD N 00888000
6863		Ne 104 "/fpga1/PROG_CSO"
	6898	Ne 102 "/fpga1/PROG_CSO"
6864	6899	Po -750 1050
6865	6900	$EndPAD
6866	6901	$PAD
6867	6902	Sh "7" R 200 450 0 0 2700
6868	6903	Dr 0 0 0
6869	6904	At SMD N 00888000
6870		Ne 108 "/fpga1/PROG_MISO3"
	6905	Ne 106 "/fpga1/PROG_MISO3"
6871	6906	Po -250 -1050
6872	6907	$EndPAD
6873	6908	$PAD
6874	6909	Sh "6" R 200 450 0 0 2700
6875	6910	Dr 0 0 0
6876	6911	At SMD N 00888000
6877		Ne 103 "/fpga1/PROG_CCLK"
	6912	Ne 101 "/fpga1/PROG_CCLK"
6878	6913	Po 250 -1050
6879	6914	$EndPAD
6880	6915	$PAD
6881	6916	Sh "5" R 200 450 0 0 2700
6882	6917	Dr 0 0 0
6883	6918	At SMD N 00888000
6884		Ne 105 "/fpga1/PROG_MISO0"
	6919	Ne 103 "/fpga1/PROG_MISO0"
6885	6920	Po 750 -1050
6886	6921	$EndPAD
6887	6922	$PAD
6888	6923	Sh "2" R 200 450 0 0 2700
6889	6924	Dr 0 0 0
6890	6925	At SMD N 00888000
6891		Ne 106 "/fpga1/PROG_MISO1"
	6926	Ne 104 "/fpga1/PROG_MISO1"
6892	6927	Po -250 1050
6893	6928	$EndPAD
6894	6929	$PAD
6895	6930	Sh "3" R 200 450 0 0 2700
6896	6931	Dr 0 0 0
6897	6932	At SMD N 00888000
6898		Ne 107 "/fpga1/PROG_MISO2"
	6933	Ne 105 "/fpga1/PROG_MISO2"
6899	6934	Po 250 1050
6900	6935	$EndPAD
6901	6936	$PAD
...	...
7097	7132	Sh "1" R 355 984 0 0 1800
7098	7133	Dr 0 0 0
7099	7134	At SMD N 00888000
7100		Ne 329 "VCCO2"
	7135	Ne 336 "VCCO2"
7101	7136	Po -570 0
7102	7137	$EndPAD
7103	7138	$PAD
...	...
7293	7328	Sh "1" R 275 510 0 0 2700
7294	7329	Dr 0 0 0
7295	7330	At SMD N 00440001
7296		Ne 329 "VCCO2"
	7331	Ne 336 "VCCO2"
7297	7332	Po -373 0
7298	7333	$EndPAD
7299	7334	$PAD
...	...
7573	7608	Sh "1" R 157 236 0 0 2700
7574	7609	Dr 0 0 0
7575	7610	At SMD N 00440001
7576		Ne 329 "VCCO2"
	7611	Ne 336 "VCCO2"
7577	7612	Po -176 0
7578	7613	$EndPAD
7579	7614	$PAD
...	...
7657	7692	Sh "1" R 157 236 0 0 0
7658	7693	Dr 0 0 0
7659	7694	At SMD N 00440001
7660		Ne 329 "VCCO2"
	7695	Ne 336 "VCCO2"
7661	7696	Po -176 0
7662	7697	$EndPAD
7663	7698	$PAD
...	...
7741	7776	Sh "1" R 157 236 0 0 1800
7742	7777	Dr 0 0 0
7743	7778	At SMD N 00440001
7744		Ne 329 "VCCO2"
	7779	Ne 336 "VCCO2"
7745	7780	Po -176 0
7746	7781	$EndPAD
7747	7782	$PAD
...	...
7797	7832	Sh "1" R 157 236 0 0 2700
7798	7833	Dr 0 0 0
7799	7834	At SMD N 00440001
7800		Ne 329 "VCCO2"
	7835	Ne 336 "VCCO2"
7801	7836	Po -176 0
7802	7837	$EndPAD
7803	7838	$PAD
...	...
8385	8420	Sh "1" R 157 236 0 0 0
8386	8421	Dr 0 0 0
8387	8422	At SMD N 00440001
8388		Ne 262 "/sdram/M0_VREF"
	8423	Ne 261 "/sdram/M0_VREF"
8389	8424	Po -176 0
8390	8425	$EndPAD
8391	8426	$PAD
...	...
8420	8455	Sh "2" R 157 236 0 0 1800
8421	8456	Dr 0 0 0
8422	8457	At SMD N 00440001
8423		Ne 262 "/sdram/M0_VREF"
	8458	Ne 261 "/sdram/M0_VREF"
8424	8459	Po 176 0
8425	8460	$EndPAD
8426	8461	$EndMODULE 0402
...	...
8497	8532	Sh "1" R 157 236 0 0 0
8498	8533	Dr 0 0 0
8499	8534	At SMD N 00440001
8500		Ne 262 "/sdram/M0_VREF"
	8535	Ne 261 "/sdram/M0_VREF"
8501	8536	Po -176 0
8502	8537	$EndPAD
8503	8538	$PAD
...	...
8532	8567	Sh "2" R 157 236 0 0 1800
8533	8568	Dr 0 0 0
8534	8569	At SMD N 00440001
8535		Ne 262 "/sdram/M0_VREF"
	8570	Ne 261 "/sdram/M0_VREF"
8536	8571	Po 176 0
8537	8572	$EndPAD
8538	8573	$EndMODULE 0402
...	...
8964	8999	Sh "1" R 157 236 0 0 0
8965	9000	Dr 0 0 0
8966	9001	At SMD N 00440001
8967		Ne 13 "/ether/ETH_PLL1.8V"
	9002	Ne 16 "/ether/ETH_PLL1.8V"
8968	9003	Po -176 0
8969	9004	$EndPAD
8970	9005	$PAD
...	...
9048	9083	Sh "1" R 157 236 0 0 1800
9049	9084	Dr 0 0 0
9050	9085	At SMD N 00440001
9051		Ne 60 "/fpga1/ETH_MDIO"
	9086	Ne 15 "/ether/ETH_MDIO"
9052	9087	Po -176 0
9053	9088	$EndPAD
9054	9089	$PAD
...	...
9076	9111	Sh "1" R 157 236 0 0 900
9077	9112	Dr 0 0 0
9078	9113	At SMD N 00440001
9079		Ne 293 "N-000120"
	9114	Ne 295 "N-000125"
9080	9115	Po -176 0
9081	9116	$EndPAD
9082	9117	$PAD
...	...
9216	9251	Sh "1" R 157 236 0 0 1800
9217	9252	Dr 0 0 0
9218	9253	At SMD N 00440001
9219		Ne 294 "N-000131"
	9254	Ne 294 "N-000121"
9220	9255	Po -176 0
9221	9256	$EndPAD
9222	9257	$PAD
9223	9258	Sh "2" R 157 236 0 0 1800
9224	9259	Dr 0 0 0
9225	9260	At SMD N 00440001
9226		Ne 11 "/ether/ETH_LED0"
	9261	Ne 12 "/ether/ETH_LED0"
9227	9262	Po 176 0
9228	9263	$EndPAD
9229	9264	$EndMODULE 0402
...	...
9244	9279	Sh "1" R 157 236 0 0 0
9245	9280	Dr 0 0 0
9246	9281	At SMD N 00440001
9247		Ne 295 "N-000132"
	9282	Ne 293 "N-000120"
9248	9283	Po -176 0
9249	9284	$EndPAD
9250	9285	$PAD
9251	9286	Sh "2" R 157 236 0 0 0
9252	9287	Dr 0 0 0
9253	9288	At SMD N 00440001
9254		Ne 12 "/ether/ETH_LED1"
	9289	Ne 13 "/ether/ETH_LED1"
9255	9290	Po 176 0
9256	9291	$EndPAD
9257	9292	$EndMODULE 0402
...	...
9301	9336	Sh "5" R 137 275 0 0 900
9302	9337	Dr 0 0 0
9303	9338	At SMD N 00888000
9304		Ne 255 "/sdram/M0_DQ2"
	9339	Ne 129 "/fpga2/M0_DQ2"
9305	9340	Po -3070 2176
9306	9341	$EndPAD
9307	9342	$PAD
...	...
9315	9350	Sh "7" R 137 275 0 0 900
9316	9351	Dr 0 0 0
9317	9352	At SMD N 00888000
9318		Ne 132 "/fpga2/M0_DQ3"
	9353	Ne 130 "/fpga2/M0_DQ3"
9319	9354	Po -2558 2176
9320	9355	$EndPAD
9321	9356	$PAD
...	...
9336	9371	Sh "10" R 138 275 0 0 900
9337	9372	Dr 0 0 0
9338	9373	At SMD N 00888000
9339		Ne 133 "/fpga2/M0_DQ5"
	9374	Ne 257 "/sdram/M0_DQ5"
9340	9375	Po -1791 2176
9341	9376	$EndPAD
9342	9377	$PAD
9343	9378	Sh "11" R 138 275 0 0 900
9344	9379	Dr 0 0 0
9345	9380	At SMD N 00888000
9346		Ne 257 "/sdram/M0_DQ6"
	9381	Ne 131 "/fpga2/M0_DQ6"
9347	9382	Po -1535 2176
9348	9383	$EndPAD
9349	9384	$PAD
...	...
9357	9392	Sh "13" R 138 275 0 0 900
9358	9393	Dr 0 0 0
9359	9394	At SMD N 00888000
9360		Ne 134 "/fpga2/M0_DQ7"
	9395	Ne 132 "/fpga2/M0_DQ7"
9361	9396	Po -1023 2176
9362	9397	$EndPAD
9363	9398	$PAD
...	...
9378	9413	Sh "16" R 137 275 0 0 900
9379	9414	Dr 0 0 0
9380	9415	At SMD N 00888000
9381		Ne 136 "/fpga2/M0_LDQS"
	9416	Ne 135 "/fpga2/M0_LDQS"
9382	9417	Po -255 2176
9383	9418	$EndPAD
9384	9419	$PAD
...	...
9406	9441	Sh "20" R 138 275 0 0 900
9407	9442	Dr 0 0 0
9408	9443	At SMD N 00888000
9409		Ne 135 "/fpga2/M0_LDM"
	9444	Ne 134 "/fpga2/M0_LDM"
9410	9445	Po 767 2176
9411	9446	$EndPAD
9412	9447	$PAD
9413	9448	Sh "21" R 138 275 0 0 900
9414	9449	Dr 0 0 0
9415	9450	At SMD N 00888000
9416		Ne 138 "/fpga2/M0_WE#"
	9451	Ne 262 "/sdram/M0_WE#"
9417	9452	Po 1023 2176
9418	9453	$EndPAD
9419	9454	$PAD
...	...
9427	9462	Sh "23" R 138 275 0 0 900
9428	9463	Dr 0 0 0
9429	9464	At SMD N 00888000
9430		Ne 260 "/sdram/M0_RAS#"
	9465	Ne 259 "/sdram/M0_RAS#"
9431	9466	Po 1535 2176
9432	9467	$EndPAD
9433	9468	$PAD
...	...
9448	9483	Sh "26" R 137 275 0 0 900
9449	9484	Dr 0 0 0
9450	9485	At SMD N 00888000
9451		Ne 251 "/sdram/M0_BA0"
	9486	Ne 121 "/fpga2/M0_BA0"
9452	9487	Po 2302 2176
9453	9488	$EndPAD
9454	9489	$PAD
9455	9490	Sh "27" R 137 275 0 0 900
9456	9491	Dr 0 0 0
9457	9492	At SMD N 00888000
9458		Ne 252 "/sdram/M0_BA1"
	9493	Ne 250 "/sdram/M0_BA1"
9459	9494	Po 2558 2176
9460	9495	$EndPAD
9461	9496	$PAD
9462	9497	Sh "28" R 137 275 0 0 900
9463	9498	Dr 0 0 0
9464	9499	At SMD N 00888000
9465		Ne 248 "/sdram/M0_A10"
	9500	Ne 113 "/fpga2/M0_A10"
9466	9501	Po 2814 2176
9467	9502	$EndPAD
9468	9503	$PAD
...	...
9476	9511	Sh "30" R 138 275 0 0 900
9477	9512	Dr 0 0 0
9478	9513	At SMD N 00888000
9479		Ne 113 "/fpga2/M0_A1"
	9514	Ne 246 "/sdram/M0_A1"
9480	9515	Po 3326 2176
9481	9516	$EndPAD
9482	9517	$PAD
...	...
9490	9525	Sh "32" R 138 275 0 0 900
9491	9526	Dr 0 0 0
9492	9527	At SMD N 00888000
9493		Ne 116 "/fpga2/M0_A3"
	9528	Ne 248 "/sdram/M0_A3"
9494	9529	Po 3838 2176
9495	9530	$EndPAD
9496	9531	$PAD
...	...
9511	9546	Sh "35" R 138 275 0 0 900
9512	9547	Dr 0 0 0
9513	9548	At SMD N 00888000
9514		Ne 117 "/fpga2/M0_A4"
	9549	Ne 116 "/fpga2/M0_A4"
9515	9550	Po 3838 -2176
9516	9551	$EndPAD
9517	9552	$PAD
9518	9553	Sh "36" R 138 275 0 0 900
9519	9554	Dr 0 0 0
9520	9555	At SMD N 00888000
9521		Ne 118 "/fpga2/M0_A5"
	9556	Ne 117 "/fpga2/M0_A5"
9522	9557	Po 3582 -2176
9523	9558	$EndPAD
9524	9559	$PAD
9525	9560	Sh "37" R 138 275 0 0 900
9526	9561	Dr 0 0 0
9527	9562	At SMD N 00888000
9528		Ne 119 "/fpga2/M0_A6"
	9563	Ne 249 "/sdram/M0_A6"
9529	9564	Po 3326 -2176
9530	9565	$EndPAD
9531	9566	$PAD
9532	9567	Sh "38" R 138 275 0 0 900
9533	9568	Dr 0 0 0
9534	9569	At SMD N 00888000
9535		Ne 120 "/fpga2/M0_A7"
	9570	Ne 118 "/fpga2/M0_A7"
9536	9571	Po 3070 -2176
9537	9572	$EndPAD
9538	9573	$PAD
9539	9574	Sh "39" R 137 275 0 0 900
9540	9575	Dr 0 0 0
9541	9576	At SMD N 00888000
9542		Ne 250 "/sdram/M0_A8"
	9577	Ne 119 "/fpga2/M0_A8"
9543	9578	Po 2814 -2176
9544	9579	$EndPAD
9545	9580	$PAD
9546	9581	Sh "40" R 137 275 0 0 900
9547	9582	Dr 0 0 0
9548	9583	At SMD N 00888000
9549		Ne 121 "/fpga2/M0_A9"
	9584	Ne 120 "/fpga2/M0_A9"
9550	9585	Po 2558 -2176
9551	9586	$EndPAD
9552	9587	$PAD
9553	9588	Sh "41" R 138 275 0 0 900
9554	9589	Dr 0 0 0
9555	9590	At SMD N 00888000
9556		Ne 114 "/fpga2/M0_A11"
	9591	Ne 247 "/sdram/M0_A11"
9557	9592	Po 2303 -2176
9558	9593	$EndPAD
9559	9594	$PAD
9560	9595	Sh "42" R 138 275 0 0 900
9561	9596	Dr 0 0 0
9562	9597	At SMD N 00888000
9563		Ne 249 "/sdram/M0_A12"
	9598	Ne 114 "/fpga2/M0_A12"
9564	9599	Po 2047 -2176
9565	9600	$EndPAD
9566	9601	$PAD
...	...
9574	9609	Sh "44" R 138 275 0 0 900
9575	9610	Dr 0 0 0
9576	9611	At SMD N 00888000
9577		Ne 123 "/fpga2/M0_CLK#"
	9612	Ne 252 "/sdram/M0_CLK#"
9578	9613	Po 1535 -2176
9579	9614	$EndPAD
9580	9615	$PAD
9581	9616	Sh "45" R 138 275 0 0 900
9582	9617	Dr 0 0 0
9583	9618	At SMD N 00888000
9584		Ne 253 "/sdram/M0_CKE"
	9619	Ne 251 "/sdram/M0_CKE"
9585	9620	Po 1279 -2176
9586	9621	$EndPAD
9587	9622	$PAD
9588	9623	Sh "46" R 138 275 0 0 900
9589	9624	Dr 0 0 0
9590	9625	At SMD N 00888000
9591		Ne 254 "/sdram/M0_CLK"
	9626	Ne 123 "/fpga2/M0_CLK"
9592	9627	Po 1023 -2176
9593	9628	$EndPAD
9594	9629	$PAD
9595	9630	Sh "47" R 138 275 0 0 900
9596	9631	Dr 0 0 0
9597	9632	At SMD N 00888000
9598		Ne 261 "/sdram/M0_UDM"
	9633	Ne 136 "/fpga2/M0_UDM"
9599	9634	Po 767 -2176
9600	9635	$EndPAD
9601	9636	$PAD
...	...
9609	9644	Sh "49" R 137 275 0 0 900
9610	9645	Dr 0 0 0
9611	9646	At SMD N 00888000
9612		Ne 262 "/sdram/M0_VREF"
	9647	Ne 261 "/sdram/M0_VREF"
9613	9648	Po 255 -2176
9614	9649	$EndPAD
9615	9650	$PAD
...	...
9623	9658	Sh "51" R 137 275 0 0 900
9624	9659	Dr 0 0 0
9625	9660	At SMD N 00888000
9626		Ne 137 "/fpga2/M0_UDQS"
	9661	Ne 260 "/sdram/M0_UDQS"
9627	9662	Po -255 -2176
9628	9663	$EndPAD
9629	9664	$PAD
...	...
9658	9693	Sh "56" R 138 275 0 0 900
9659	9694	Dr 0 0 0
9660	9695	At SMD N 00888000
9661		Ne 259 "/sdram/M0_DQ9"
	9696	Ne 133 "/fpga2/M0_DQ9"
9662	9697	Po -1535 -2176
9663	9698	$EndPAD
9664	9699	$PAD
...	...
9686	9721	Sh "60" R 137 275 0 0 900
9687	9722	Dr 0 0 0
9688	9723	At SMD N 00888000
9689		Ne 128 "/fpga2/M0_DQ12"
	9724	Ne 253 "/sdram/M0_DQ12"
9690	9725	Po -2558 -2176
9691	9726	$EndPAD
9692	9727	$PAD
...	...
9700	9735	Sh "62" R 138 275 0 0 900
9701	9736	Dr 0 0 0
9702	9737	At SMD N 00888000
9703		Ne 129 "/fpga2/M0_DQ13"
	9738	Ne 254 "/sdram/M0_DQ13"
9704	9739	Po -3070 -2176
9705	9740	$EndPAD
9706	9741	$PAD
9707	9742	Sh "63" R 138 275 0 0 900
9708	9743	Dr 0 0 0
9709	9744	At SMD N 00888000
9710		Ne 130 "/fpga2/M0_DQ14"
	9745	Ne 255 "/sdram/M0_DQ14"
9711	9746	Po -3326 -2176
9712	9747	$EndPAD
9713	9748	$PAD
...	...
9721	9756	Sh "65" R 138 275 0 0 900
9722	9757	Dr 0 0 0
9723	9758	At SMD N 00888000
9724		Ne 131 "/fpga2/M0_DQ15"
	9759	Ne 128 "/fpga2/M0_DQ15"
9725	9760	Po -3838 -2176
9726	9761	$EndPAD
9727	9762	$PAD
...	...
9757	9792	Sh "2" R 138 275 0 0 900
9758	9793	Dr 0 0 0
9759	9794	At SMD N 00888000
9760		Ne 152 "/fpga2/M1_DQ0"
	9795	Ne 149 "/fpga2/M1_DQ0"
9761	9796	Po -3838 2176
9762	9797	$EndPAD
9763	9798	$PAD
...	...
9771	9806	Sh "4" R 138 275 0 0 900
9772	9807	Dr 0 0 0
9773	9808	At SMD N 00888000
9774		Ne 153 "/fpga2/M1_DQ1"
	9809	Ne 271 "/sdram/M1_DQ1"
9775	9810	Po -3326 2176
9776	9811	$EndPAD
9777	9812	$PAD
9778	9813	Sh "5" R 137 275 0 0 900
9779	9814	Dr 0 0 0
9780	9815	At SMD N 00888000
9781		Ne 158 "/fpga2/M1_DQ2"
	9816	Ne 154 "/fpga2/M1_DQ2"
9782	9817	Po -3070 2176
9783	9818	$EndPAD
9784	9819	$PAD
...	...
9792	9827	Sh "7" R 137 275 0 0 900
9793	9828	Dr 0 0 0
9794	9829	At SMD N 00888000
9795		Ne 272 "/sdram/M1_DQ3"
	9830	Ne 155 "/fpga2/M1_DQ3"
9796	9831	Po -2558 2176
9797	9832	$EndPAD
9798	9833	$PAD
9799	9834	Sh "8" R 138 275 0 0 900
9800	9835	Dr 0 0 0
9801	9836	At SMD N 00888000
9802		Ne 273 "/sdram/M1_DQ4"
	9837	Ne 156 "/fpga2/M1_DQ4"
9803	9838	Po -2303 2176
9804	9839	$EndPAD
9805	9840	$PAD
...	...
9813	9848	Sh "10" R 138 275 0 0 900
9814	9849	Dr 0 0 0
9815	9850	At SMD N 00888000
9816		Ne 159 "/fpga2/M1_DQ5"
	9851	Ne 274 "/sdram/M1_DQ5"
9817	9852	Po -1791 2176
9818	9853	$EndPAD
9819	9854	$PAD
9820	9855	Sh "11" R 138 275 0 0 900
9821	9856	Dr 0 0 0
9822	9857	At SMD N 00888000
9823		Ne 274 "/sdram/M1_DQ6"
	9858	Ne 275 "/sdram/M1_DQ6"
9824	9859	Po -1535 2176
9825	9860	$EndPAD
9826	9861	$PAD
...	...
9834	9869	Sh "13" R 138 275 0 0 900
9835	9870	Dr 0 0 0
9836	9871	At SMD N 00888000
9837		Ne 275 "/sdram/M1_DQ7"
	9872	Ne 157 "/fpga2/M1_DQ7"
9838	9873	Po -1023 2176
9839	9874	$EndPAD
9840	9875	$PAD
...	...
9855	9890	Sh "16" R 137 275 0 0 900
9856	9891	Dr 0 0 0
9857	9892	At SMD N 00888000
9858		Ne 163 "/fpga2/M1_LDQS"
	9893	Ne 276 "/sdram/M1_LDQS"
9859	9894	Po -255 2176
9860	9895	$EndPAD
9861	9896	$PAD
...	...
9883	9918	Sh "20" R 138 275 0 0 900
9884	9919	Dr 0 0 0
9885	9920	At SMD N 00888000
9886		Ne 162 "/fpga2/M1_LDM"
	9921	Ne 160 "/fpga2/M1_LDM"
9887	9922	Po 767 2176
9888	9923	$EndPAD
9889	9924	$PAD
...	...
9897	9932	Sh "22" R 138 275 0 0 900
9898	9933	Dr 0 0 0
9899	9934	At SMD N 00888000
9900		Ne 148 "/fpga2/M1_CAS#"
	9935	Ne 270 "/sdram/M1_CAS#"
9901	9936	Po 1279 2176
9902	9937	$EndPAD
9903	9938	$PAD
9904	9939	Sh "23" R 138 275 0 0 900
9905	9940	Dr 0 0 0
9906	9941	At SMD N 00888000
9907		Ne 276 "/sdram/M1_RAS#"
	9942	Ne 277 "/sdram/M1_RAS#"
9908	9943	Po 1535 2176
9909	9944	$EndPAD
9910	9945	$PAD
9911	9946	Sh "24" R 138 275 0 0 900
9912	9947	Dr 0 0 0
9913	9948	At SMD N 00888000
9914		Ne 151 "/fpga2/M1_CS#"
	9949	Ne 148 "/fpga2/M1_CS#"
9915	9950	Po 1791 2176
9916	9951	$EndPAD
9917	9952	$PAD
...	...
9925	9960	Sh "26" R 137 275 0 0 900
9926	9961	Dr 0 0 0
9927	9962	At SMD N 00888000
9928		Ne 267 "/sdram/M1_BA0"
	9963	Ne 269 "/sdram/M1_BA0"
9929	9964	Po 2302 2176
9930	9965	$EndPAD
9931	9966	$PAD
9932	9967	Sh "27" R 137 275 0 0 900
9933	9968	Dr 0 0 0
9934	9969	At SMD N 00888000
9935		Ne 268 "/sdram/M1_BA1"
	9970	Ne 144 "/fpga2/M1_BA1"
9936	9971	Po 2558 2176
9937	9972	$EndPAD
9938	9973	$PAD
9939	9974	Sh "28" R 137 275 0 0 900
9940	9975	Dr 0 0 0
9941	9976	At SMD N 00888000
9942		Ne 263 "/sdram/M1_A10"
	9977	Ne 264 "/sdram/M1_A10"
9943	9978	Po 2814 2176
9944	9979	$EndPAD
9945	9980	$PAD
9946	9981	Sh "29" R 138 275 0 0 900
9947	9982	Dr 0 0 0
9948	9983	At SMD N 00888000
9949		Ne 139 "/fpga2/M1_A0"
	9984	Ne 137 "/fpga2/M1_A0"
9950	9985	Po 3070 2176
9951	9986	$EndPAD
9952	9987	$PAD
9953	9988	Sh "30" R 138 275 0 0 900
9954	9989	Dr 0 0 0
9955	9990	At SMD N 00888000
9956		Ne 140 "/fpga2/M1_A1"
	9991	Ne 263 "/sdram/M1_A1"
9957	9992	Po 3326 2176
9958	9993	$EndPAD
9959	9994	$PAD
9960	9995	Sh "31" R 138 275 0 0 900
9961	9996	Dr 0 0 0
9962	9997	At SMD N 00888000
9963		Ne 142 "/fpga2/M1_A2"
	9998	Ne 139 "/fpga2/M1_A2"
9964	9999	Po 3582 2176
9965	10000	$EndPAD
9966	10001	$PAD
9967	10002	Sh "32" R 138 275 0 0 900
9968	10003	Dr 0 0 0
9969	10004	At SMD N 00888000
9970		Ne 265 "/sdram/M1_A3"
	10005	Ne 266 "/sdram/M1_A3"
9971	10006	Po 3838 2176
9972	10007	$EndPAD
9973	10008	$PAD
...	...
9988	10023	Sh "35" R 138 275 0 0 900
9989	10024	Dr 0 0 0
9990	10025	At SMD N 00888000
9991		Ne 266 "/sdram/M1_A4"
	10026	Ne 267 "/sdram/M1_A4"
9992	10027	Po 3838 -2176
9993	10028	$EndPAD
9994	10029	$PAD
9995	10030	Sh "36" R 138 275 0 0 900
9996	10031	Dr 0 0 0
9997	10032	At SMD N 00888000
9998		Ne 143 "/fpga2/M1_A5"
	10033	Ne 268 "/sdram/M1_A5"
9999	10034	Po 3582 -2176
10000	10035	$EndPAD
10001	10036	$PAD
10002	10037	Sh "37" R 138 275 0 0 900
10003	10038	Dr 0 0 0
10004	10039	At SMD N 00888000
10005		Ne 144 "/fpga2/M1_A6"
	10040	Ne 140 "/fpga2/M1_A6"
10006	10041	Po 3326 -2176
10007	10042	$EndPAD
10008	10043	$PAD
10009	10044	Sh "38" R 138 275 0 0 900
10010	10045	Dr 0 0 0
10011	10046	At SMD N 00888000
10012		Ne 145 "/fpga2/M1_A7"
	10047	Ne 141 "/fpga2/M1_A7"
10013	10048	Po 3070 -2176
10014	10049	$EndPAD
10015	10050	$PAD
10016	10051	Sh "39" R 137 275 0 0 900
10017	10052	Dr 0 0 0
10018	10053	At SMD N 00888000
10019		Ne 146 "/fpga2/M1_A8"
	10054	Ne 142 "/fpga2/M1_A8"
10020	10055	Po 2814 -2176
10021	10056	$EndPAD
10022	10057	$PAD
10023	10058	Sh "40" R 137 275 0 0 900
10024	10059	Dr 0 0 0
10025	10060	At SMD N 00888000
10026		Ne 147 "/fpga2/M1_A9"
	10061	Ne 143 "/fpga2/M1_A9"
10027	10062	Po 2558 -2176
10028	10063	$EndPAD
10029	10064	$PAD
10030	10065	Sh "41" R 138 275 0 0 900
10031	10066	Dr 0 0 0
10032	10067	At SMD N 00888000
10033		Ne 264 "/sdram/M1_A11"
	10068	Ne 138 "/fpga2/M1_A11"
10034	10069	Po 2303 -2176
10035	10070	$EndPAD
10036	10071	$PAD
10037	10072	Sh "42" R 138 275 0 0 900
10038	10073	Dr 0 0 0
10039	10074	At SMD N 00888000
10040		Ne 141 "/fpga2/M1_A12"
	10075	Ne 265 "/sdram/M1_A12"
10041	10076	Po 2047 -2176
10042	10077	$EndPAD
10043	10078	$PAD
...	...
10051	10086	Sh "44" R 138 275 0 0 900
10052	10087	Dr 0 0 0
10053	10088	At SMD N 00888000
10054		Ne 150 "/fpga2/M1_CLK#"
	10089	Ne 147 "/fpga2/M1_CLK#"
10055	10090	Po 1535 -2176
10056	10091	$EndPAD
10057	10092	$PAD
10058	10093	Sh "45" R 138 275 0 0 900
10059	10094	Dr 0 0 0
10060	10095	At SMD N 00888000
10061		Ne 269 "/sdram/M1_CKE"
	10096	Ne 145 "/fpga2/M1_CKE"
10062	10097	Po 1279 -2176
10063	10098	$EndPAD
10064	10099	$PAD
10065	10100	Sh "46" R 138 275 0 0 900
10066	10101	Dr 0 0 0
10067	10102	At SMD N 00888000
10068		Ne 149 "/fpga2/M1_CLK"
	10103	Ne 146 "/fpga2/M1_CLK"
10069	10104	Po 1023 -2176
10070	10105	$EndPAD
10071	10106	$PAD
10072	10107	Sh "47" R 138 275 0 0 900
10073	10108	Dr 0 0 0
10074	10109	At SMD N 00888000
10075		Ne 277 "/sdram/M1_UDM"
	10110	Ne 278 "/sdram/M1_UDM"
10076	10111	Po 767 -2176
10077	10112	$EndPAD
10078	10113	$PAD
...	...
10100	10135	Sh "51" R 137 275 0 0 900
10101	10136	Dr 0 0 0
10102	10137	At SMD N 00888000
10103		Ne 278 "/sdram/M1_UDQS"
	10138	Ne 161 "/fpga2/M1_UDQS"
10104	10139	Po -255 -2176
10105	10140	$EndPAD
10106	10141	$PAD
...	...
10121	10156	Sh "54" R 138 275 0 0 900
10122	10157	Dr 0 0 0
10123	10158	At SMD N 00888000
10124		Ne 160 "/fpga2/M1_DQ8"
	10159	Ne 158 "/fpga2/M1_DQ8"
10125	10160	Po -1023 -2176
10126	10161	$EndPAD
10127	10162	$PAD
...	...
10135	10170	Sh "56" R 138 275 0 0 900
10136	10171	Dr 0 0 0
10137	10172	At SMD N 00888000
10138		Ne 161 "/fpga2/M1_DQ9"
	10173	Ne 159 "/fpga2/M1_DQ9"
10139	10174	Po -1535 -2176
10140	10175	$EndPAD
10141	10176	$PAD
10142	10177	Sh "57" R 138 275 0 0 900
10143	10178	Dr 0 0 0
10144	10179	At SMD N 00888000
10145		Ne 154 "/fpga2/M1_DQ10"
	10180	Ne 150 "/fpga2/M1_DQ10"
10146	10181	Po -1791 -2176
10147	10182	$EndPAD
10148	10183	$PAD
...	...
10156	10191	Sh "59" R 138 275 0 0 900
10157	10192	Dr 0 0 0
10158	10193	At SMD N 00888000
10159		Ne 270 "/sdram/M1_DQ11"
	10194	Ne 151 "/fpga2/M1_DQ11"
10160	10195	Po -2303 -2176
10161	10196	$EndPAD
10162	10197	$PAD
10163	10198	Sh "60" R 137 275 0 0 900
10164	10199	Dr 0 0 0
10165	10200	At SMD N 00888000
10166		Ne 155 "/fpga2/M1_DQ12"
	10201	Ne 272 "/sdram/M1_DQ12"
10167	10202	Po -2558 -2176
10168	10203	$EndPAD
10169	10204	$PAD
...	...
10177	10212	Sh "62" R 138 275 0 0 900
10178	10213	Dr 0 0 0
10179	10214	At SMD N 00888000
10180		Ne 156 "/fpga2/M1_DQ13"
	10215	Ne 273 "/sdram/M1_DQ13"
10181	10216	Po -3070 -2176
10182	10217	$EndPAD
10183	10218	$PAD
10184	10219	Sh "63" R 138 275 0 0 900
10185	10220	Dr 0 0 0
10186	10221	At SMD N 00888000
10187		Ne 271 "/sdram/M1_DQ14"
	10222	Ne 152 "/fpga2/M1_DQ14"
10188	10223	Po -3326 -2176
10189	10224	$EndPAD
10190	10225	$PAD
...	...
10198	10233	Sh "65" R 138 275 0 0 900
10199	10234	Dr 0 0 0
10200	10235	At SMD N 00888000
10201		Ne 157 "/fpga2/M1_DQ15"
	10236	Ne 153 "/fpga2/M1_DQ15"
10202	10237	Po -3838 -2176
10203	10238	$EndPAD
10204	10239	$PAD
...	...
10316	10351	Sh "10" C 540 540 0 0 1800
10317	10352	Dr 350 0 0
10318	10353	At STD N 0CC0FFFF
10319		Ne 294 "N-000131"
	10354	Ne 294 "N-000121"
10320	10355	Po -1150 -5400
10321	10356	$EndPAD
10322	10357	$PAD
...	...
10330	10365	Sh "12" C 540 540 0 0 1800
10331	10366	Dr 350 0 0
10332	10367	At STD N 0CC0FFFF
10333		Ne 295 "N-000132"
	10368	Ne 293 "N-000120"
10334	10369	Po 2150 -5400
10335	10370	$EndPAD
10336	10371	$EndMODULE SD-48025
...	...
10355	10390	Sh "1" R 315 590 0 0 0
10356	10391	Dr 0 0 0
10357	10392	At STD N 00440001
10358		Ne 57 "/flash/SD_DAT2"
	10393	Ne 60 "/flash/SD_DAT2"
10359	10394	Po -1299 0
10360	10395	$EndPAD
10361	10396	$PAD
...	...
10369	10404	Sh "3" R 315 590 0 0 0
10370	10405	Dr 0 0 0
10371	10406	At STD N 00440001
10372		Ne 55 "/flash/SD_CMD"
	10407	Ne 108 "/fpga1/SD_CMD"
10373	10408	Po -433 0
10374	10409	$EndPAD
10375	10410	$PAD
...	...
10383	10418	Sh "5" R 315 590 0 0 0
10384	10419	Dr 0 0 0
10385	10420	At STD N 00440001
10386		Ne 109 "/fpga1/SD_CLK"
	10421	Ne 107 "/fpga1/SD_CLK"
10387	10422	Po 433 0
10388	10423	$EndPAD
10389	10424	$PAD
...	...
10397	10432	Sh "7" R 315 590 0 0 0
10398	10433	Dr 0 0 0
10399	10434	At STD N 00440001
10400		Ne 56 "/flash/SD_DAT0"
	10435	Ne 109 "/fpga1/SD_DAT0"
10401	10436	Po 1299 0
10402	10437	$EndPAD
10403	10438	$PAD
...	...
10696	10731	Sh "6" R 100 600 0 0 900
10697	10732	Dr 0 0 0
10698	10733	At SMD N 00888000
10699		Ne 53 "/flash/NF_RNB"
	10734	Ne 99 "/fpga1/NF_RNB"
10700	10735	Po -1280 3850
10701	10736	$EndPAD
10702	10737	$PAD
10703	10738	Sh "7" R 100 600 0 0 900
10704	10739	Dr 0 0 0
10705	10740	At SMD N 00888000
10706		Ne 53 "/flash/NF_RNB"
	10741	Ne 99 "/fpga1/NF_RNB"
10707	10742	Po -1090 3850
10708	10743	$EndPAD
10709	10744	$PAD
10710	10745	Sh "8" R 100 600 0 0 900
10711	10746	Dr 0 0 0
10712	10747	At SMD N 00888000
10713		Ne 102 "/fpga1/NF_RE_N"
	10748	Ne 59 "/flash/NF_RE_N"
10714	10749	Po -890 3850
10715	10750	$EndPAD
10716	10751	$PAD
10717	10752	Sh "9" R 100 600 0 0 900
10718	10753	Dr 0 0 0
10719	10754	At SMD N 00888000
10720		Ne 95 "/fpga1/NF_CS1_N"
	10755	Ne 53 "/flash/NF_CS1_N"
10721	10756	Po -690 3850
10722	10757	$EndPAD
10723	10758	$PAD
...	...
10766	10801	Sh "16" R 100 600 0 0 900
10767	10802	Dr 0 0 0
10768	10803	At SMD N 00888000
10769		Ne 94 "/fpga1/NF_CLE"
	10804	Ne 52 "/flash/NF_CLE"
10770	10805	Po 690 3850
10771	10806	$EndPAD
10772	10807	$PAD
10773	10808	Sh "17" R 100 600 0 0 900
10774	10809	Dr 0 0 0
10775	10810	At SMD N 00888000
10776		Ne 93 "/fpga1/NF_ALE"
	10811	Ne 51 "/flash/NF_ALE"
10777	10812	Po 880 3850
10778	10813	$EndPAD
10779	10814	$PAD
10780	10815	Sh "18" R 100 600 0 0 900
10781	10816	Dr 0 0 0
10782	10817	At SMD N 00888000
10783		Ne 54 "/flash/NF_WE_N"
	10818	Ne 100 "/fpga1/NF_WE_N"
10784	10819	Po 1080 3850
10785	10820	$EndPAD
10786	10821	$PAD
...	...
10857	10892	Sh "29" R 100 600 0 0 900
10858	10893	Dr 0 0 0
10859	10894	At SMD N 00888000
10860		Ne 96 "/fpga1/NF_D0"
	10895	Ne 54 "/flash/NF_D0"
10861	10896	Po 1470 -3850
10862	10897	$EndPAD
10863	10898	$PAD
10864	10899	Sh "30" R 100 600 0 0 900
10865	10900	Dr 0 0 0
10866	10901	At SMD N 00888000
10867		Ne 97 "/fpga1/NF_D1"
	10902	Ne 55 "/flash/NF_D1"
10868	10903	Po 1280 -3850
10869	10904	$EndPAD
10870	10905	$PAD
10871	10906	Sh "31" R 100 600 0 0 900
10872	10907	Dr 0 0 0
10873	10908	At SMD N 00888000
10874		Ne 98 "/fpga1/NF_D2"
	10909	Ne 96 "/fpga1/NF_D2"
10875	10910	Po 1080 -3850
10876	10911	$EndPAD
10877	10912	$PAD
10878	10913	Sh "32" R 100 600 0 0 900
10879	10914	Dr 0 0 0
10880	10915	At SMD N 00888000
10881		Ne 51 "/flash/NF_D3"
	10916	Ne 56 "/flash/NF_D3"
10882	10917	Po 880 -3850
10883	10918	$EndPAD
10884	10919	$PAD
...	...
10941	10976	Sh "41" R 100 600 0 0 900
10942	10977	Dr 0 0 0
10943	10978	At SMD N 00888000
10944		Ne 99 "/fpga1/NF_D4"
	10979	Ne 97 "/fpga1/NF_D4"
10945	10980	Po -890 -3850
10946	10981	$EndPAD
10947	10982	$PAD
10948	10983	Sh "42" R 100 600 0 0 900
10949	10984	Dr 0 0 0
10950	10985	At SMD N 00888000
10951		Ne 52 "/flash/NF_D5"
	10986	Ne 57 "/flash/NF_D5"
10952	10987	Po -1090 -3850
10953	10988	$EndPAD
10954	10989	$PAD
10955	10990	Sh "43" R 100 600 0 0 900
10956	10991	Dr 0 0 0
10957	10992	At SMD N 00888000
10958		Ne 100 "/fpga1/NF_D6"
	10993	Ne 98 "/fpga1/NF_D6"
10959	10994	Po -1280 -3850
10960	10995	$EndPAD
10961	10996	$PAD
10962	10997	Sh "44" R 100 600 0 0 900
10963	10998	Dr 0 0 0
10964	10999	At SMD N 00888000
10965		Ne 101 "/fpga1/NF_D7"
	11000	Ne 58 "/flash/NF_D7"
10966	11001	Po -1480 -3850
10967	11002	$EndPAD
10968	11003	$PAD
...	...
11019	11054	Sh "11" R 315 99 0 0 900
11020	11055	Dr 0 0 0
11021	11056	At SMD N 00888000
11022		Ne 65 "/fpga1/ETH_RXER"
	11057	Ne 66 "/fpga1/ETH_RXER"
11023	11058	Po -1613 885
11024	11059	$EndPAD
11025	11060	$PAD
11026	11061	Sh "10" R 315 99 0 0 900
11027	11062	Dr 0 0 0
11028	11063	At SMD N 00888000
11029		Ne 62 "/fpga1/ETH_RXC"
	11064	Ne 17 "/ether/ETH_RXC"
11030	11065	Po -1613 688
11031	11066	$EndPAD
11032	11067	$PAD
11033	11068	Sh "9" R 315 99 0 0 900
11034	11069	Dr 0 0 0
11035	11070	At SMD N 00888000
11036		Ne 64 "/fpga1/ETH_RXDV"
	11071	Ne 18 "/ether/ETH_RXDV"
11037	11072	Po -1613 491
11038	11073	$EndPAD
11039	11074	$PAD
...	...
11054	11089	Sh "6" R 315 98 0 0 900
11055	11090	Dr 0 0 0
11056	11091	At SMD N 00888000
11057		Ne 14 "/ether/ETH_RXD0"
	11092	Ne 62 "/fpga1/ETH_RXD0"
11058	11093	Po -1613 -98
11059	11094	$EndPAD
11060	11095	$PAD
...	...
11068	11103	Sh "4" R 315 99 0 0 900
11069	11104	Dr 0 0 0
11070	11105	At SMD N 00888000
11071		Ne 15 "/ether/ETH_RXD2"
	11106	Ne 64 "/fpga1/ETH_RXD2"
11072	11107	Po -1613 -491
11073	11108	$EndPAD
11074	11109	$PAD
11075	11110	Sh "3" R 315 99 0 0 900
11076	11111	Dr 0 0 0
11077	11112	At SMD N 00888000
11078		Ne 16 "/ether/ETH_RXD3"
	11113	Ne 65 "/fpga1/ETH_RXD3"
11079	11114	Po -1613 -688
11080	11115	$EndPAD
11081	11116	$PAD
11082	11117	Sh "2" R 315 99 0 0 900
11083	11118	Dr 0 0 0
11084	11119	At SMD N 00888000
11085		Ne 59 "/fpga1/ETH_MDC"
	11120	Ne 14 "/ether/ETH_MDC"
11086	11121	Po -1613 -885
11087	11122	$EndPAD
11088	11123	$PAD
11089	11124	Sh "1" R 315 98 0 0 900
11090	11125	Dr 0 0 0
11091	11126	At SMD N 00888000
11092		Ne 60 "/fpga1/ETH_MDIO"
	11127	Ne 15 "/ether/ETH_MDIO"
11093	11128	Po -1613 -1082
11094	11129	$EndPAD
11095	11130	$PAD
...	...
11103	11138	Sh "47" R 99 315 0 0 900
11104	11139	Dr 0 0 0
11105	11140	At SMD N 00888000
11106		Ne 13 "/ether/ETH_PLL1.8V"
	11141	Ne 16 "/ether/ETH_PLL1.8V"
11107	11142	Po -885 -1613
11108	11143	$EndPAD
11109	11144	$PAD
...	...
11173	11208	Sh "37" R 98 315 0 0 900
11174	11209	Dr 0 0 0
11175	11210	At SMD N 00888000
11176		Ne 293 "N-000120"
	11211	Ne 295 "N-000125"
11177	11212	Po 1082 -1613
11178	11213	$EndPAD
11179	11214	$PAD
11180	11215	Sh "25" R 315 98 0 0 900
11181	11216	Dr 0 0 0
11182	11217	At SMD N 00888000
11183		Ne 10 "/ether/ETH_INT"
	11218	Ne 11 "/ether/ETH_INT"
11184	11219	Po 1613 1082
11185	11220	$EndPAD
11186	11221	$PAD
11187	11222	Sh "26" R 315 99 0 0 900
11188	11223	Dr 0 0 0
11189	11224	At SMD N 00888000
11190		Ne 11 "/ether/ETH_LED0"
	11225	Ne 12 "/ether/ETH_LED0"
11191	11226	Po 1613 885
11192	11227	$EndPAD
11193	11228	$PAD
11194	11229	Sh "27" R 315 99 0 0 900
11195	11230	Dr 0 0 0
11196	11231	At SMD N 00888000
11197		Ne 12 "/ether/ETH_LED1"
	11232	Ne 13 "/ether/ETH_LED1"
11198	11233	Po 1613 688
11199	11234	$EndPAD
11200	11235	$PAD
...	...
11278	11313	Sh "15" R 99 315 0 0 900
11279	11314	Dr 0 0 0
11280	11315	At SMD N 00888000
11281		Ne 17 "/ether/ETH_TXC"
	11316	Ne 67 "/fpga1/ETH_TXC"
11282	11317	Po -688 1613
11283	11318	$EndPAD
11284	11319	$PAD
11285	11320	Sh "16" R 99 315 0 0 900
11286	11321	Dr 0 0 0
11287	11322	At SMD N 00888000
11288		Ne 67 "/fpga1/ETH_TXEN"
	11323	Ne 70 "/fpga1/ETH_TXEN"
11289	11324	Po -491 1613
11290	11325	$EndPAD
11291	11326	$PAD
11292	11327	Sh "17" R 98 315 0 0 900
11293	11328	Dr 0 0 0
11294	11329	At SMD N 00888000
11295		Ne 18 "/ether/ETH_TXD0"
	11330	Ne 19 "/ether/ETH_TXD0"
11296	11331	Po -295 1613
11297	11332	$EndPAD
11298	11333	$PAD
11299	11334	Sh "18" R 98 315 0 0 900
11300	11335	Dr 0 0 0
11301	11336	At SMD N 00888000
11302		Ne 66 "/fpga1/ETH_TXD1"
	11337	Ne 68 "/fpga1/ETH_TXD1"
11303	11338	Po -98 1613
11304	11339	$EndPAD
11305	11340	$PAD
11306	11341	Sh "19" R 98 315 0 0 900
11307	11342	Dr 0 0 0
11308	11343	At SMD N 00888000
11309		Ne 19 "/ether/ETH_TXD2"
	11344	Ne 69 "/fpga1/ETH_TXD2"
11310	11345	Po 98 1613
11311	11346	$EndPAD
11312	11347	$PAD
...	...
11327	11362	Sh "22" R 99 315 0 0 900
11328	11363	Dr 0 0 0
11329	11364	At SMD N 00888000
11330		Ne 58 "/fpga1/ETH_CRS"
	11365	Ne 10 "/ether/ETH_CRS"
11331	11366	Po 688 1613
11332	11367	$EndPAD
11333	11368	$PAD
...	...
11425	11460	Sh "2" R 157 236 0 0 1800
11426	11461	Dr 0 0 0
11427	11462	At SMD N 00440001
11428		Ne 328 "N-000350"
	11463	Ne 335 "N-000365"
11429	11464	Po 176 0
11430	11465	$EndPAD
11431	11466	$EndMODULE 0402
...	...
11453	11488	Sh "2" R 157 236 0 0 900
11454	11489	Dr 0 0 0
11455	11490	At SMD N 00440001
11456		Ne 327 "N-000347"
	11491	Ne 334 "N-000362"
11457	11492	Po 176 0
11458	11493	$EndPAD
11459	11494	$EndMODULE 0402
...	...
11489	11524	Sh "1" R 98 157 0 0 0
11490	11525	Dr 0 0 0
11491	11526	At SMD N 00440001
11492		Ne 247 "/fpga2/USBD_SPD"
	11527	Ne 289 "/usb/USBD_SPD"
11493	11528	Po -295 491
11494	11529	$EndPAD
11495	11530	$PAD
...	...
11503	11538	Sh "2" R 98 157 0 0 0
11504	11539	Dr 0 0 0
11505	11540	At SMD N 00440001
11506		Ne 246 "/fpga2/USBD_RCV"
	11541	Ne 243 "/fpga2/USBD_RCV"
11507	11542	Po -98 491
11508	11543	$EndPAD
11509	11544	$PAD
...	...
11517	11552	Sh "3" R 98 157 0 0 0
11518	11553	Dr 0 0 0
11519	11554	At SMD N 00440001
11520		Ne 289 "/usb/USBD_VP"
	11555	Ne 245 "/fpga2/USBD_VP"
11521	11556	Po 98 491
11522	11557	$EndPAD
11523	11558	$PAD
11524	11559	Sh "9" R 98 157 0 0 0
11525	11560	Dr 0 0 0
11526	11561	At SMD N 00440001
11527		Ne 245 "/fpga2/USBD_OE_N"
	11562	Ne 288 "/usb/USBD_OE_N"
11528	11563	Po 295 -491
11529	11564	$EndPAD
11530	11565	$PAD
11531	11566	Sh "4" R 98 157 0 0 0
11532	11567	Dr 0 0 0
11533	11568	At SMD N 00440001
11534		Ne 288 "/usb/USBD_VM"
	11569	Ne 244 "/fpga2/USBD_VM"
11535	11570	Po 295 491
11536	11571	$EndPAD
11537	11572	$PAD
...	...
11637	11672	Sh "2" R 98 157 0 0 0
11638	11673	Dr 0 0 0
11639	11674	At SMD N 00440001
11640		Ne 243 "/fpga2/USBA_RCV"
	11675	Ne 241 "/fpga2/USBA_RCV"
11641	11676	Po -98 491
11642	11677	$EndPAD
11643	11678	$PAD
...	...
11651	11686	Sh "3" R 98 157 0 0 0
11652	11687	Dr 0 0 0
11653	11688	At SMD N 00440001
11654		Ne 244 "/fpga2/USBA_VP"
	11689	Ne 242 "/fpga2/USBA_VP"
11655	11690	Po 98 491
11656	11691	$EndPAD
11657	11692	$PAD
...	...
12455	12490	Sh "1" R 394 1181 0 0 0
12456	12491	Dr 0 0 0
12457	12492	At SMD N 00440001
12458		Ne 92 "/fpga1/FPGA_BANK0_IO_8"
	12493	Ne 95 "/fpga1/FPGA_BANK0_IO_8"
12459	12494	Po 9448 -747
12460	12495	$EndPAD
12461	12496	$PAD
...	...
12469	12504	Sh "5" R 393 1181 0 0 0
12470	12505	Dr 0 0 0
12471	12506	At SMD N 00440001
12472		Ne 329 "VCCO2"
	12507	Ne 336 "VCCO2"
12473	12508	Po 7873 -747
12474	12509	$EndPAD
12475	12510	$PAD
12476	12511	Sh "7" R 394 1181 0 0 0
12477	12512	Dr 0 0 0
12478	12513	At SMD N 00440001
12479		Ne 68 "/fpga1/FPGA_BANK0_IO_10"
	12514	Ne 28 "/expansion/FPGA_BANK0_IO_10"
12480	12515	Po 7086 -747
12481	12516	$EndPAD
12482	12517	$PAD
12483	12518	Sh "9" R 394 1181 0 0 0
12484	12519	Dr 0 0 0
12485	12520	At SMD N 00440001
12486		Ne 69 "/fpga1/FPGA_BANK0_IO_11"
	12521	Ne 29 "/expansion/FPGA_BANK0_IO_11"
12487	12522	Po 6299 -747
12488	12523	$EndPAD
12489	12524	$PAD
12490	12525	Sh "11" R 394 1181 0 0 0
12491	12526	Dr 0 0 0
12492	12527	At SMD N 00440001
12493		Ne 43 "/expansion/FPGA_BANK0_IO_5"
	12528	Ne 45 "/expansion/FPGA_BANK0_IO_5"
12494	12529	Po 5511 -747
12495	12530	$EndPAD
12496	12531	$PAD
12497	12532	Sh "13" R 394 1181 0 0 0
12498	12533	Dr 0 0 0
12499	12534	At SMD N 00440001
12500		Ne 30 "/expansion/FPGA_BANK0_IO_17"
	12535	Ne 31 "/expansion/FPGA_BANK0_IO_17"
12501	12536	Po 4724 -747
12502	12537	$EndPAD
12503	12538	$PAD
12504	12539	Sh "15" R 393 1181 0 0 0
12505	12540	Dr 0 0 0
12506	12541	At SMD N 00440001
12507		Ne 72 "/fpga1/FPGA_BANK0_IO_20"
	12542	Ne 33 "/expansion/FPGA_BANK0_IO_20"
12508	12543	Po 3936 -747
12509	12544	$EndPAD
12510	12545	$PAD
12511	12546	Sh "17" R 394 1181 0 0 0
12512	12547	Dr 0 0 0
12513	12548	At SMD N 00440001
12514		Ne 35 "/expansion/FPGA_BANK0_IO_28"
	12549	Ne 78 "/fpga1/FPGA_BANK0_IO_28"
12515	12550	Po 3149 -747
12516	12551	$EndPAD
12517	12552	$PAD
12518	12553	Sh "19" R 394 1181 0 0 0
12519	12554	Dr 0 0 0
12520	12555	At SMD N 00440001
12521		Ne 73 "/fpga1/FPGA_BANK0_IO_22"
	12556	Ne 74 "/fpga1/FPGA_BANK0_IO_22"
12522	12557	Po 2362 -747
12523	12558	$EndPAD
12524	12559	$PAD
12525	12560	Sh "21" R 394 1181 0 0 0
12526	12561	Dr 0 0 0
12527	12562	At SMD N 00440001
12528		Ne 34 "/expansion/FPGA_BANK0_IO_27"
	12563	Ne 77 "/fpga1/FPGA_BANK0_IO_27"
12529	12564	Po 1574 -747
12530	12565	$EndPAD
12531	12566	$PAD
12532	12567	Sh "23" R 394 1181 0 0 0
12533	12568	Dr 0 0 0
12534	12569	At SMD N 00440001
12535		Ne 39 "/expansion/FPGA_BANK0_IO_39"
	12570	Ne 40 "/expansion/FPGA_BANK0_IO_39"
12536	12571	Po 787 -747
12537	12572	$EndPAD
12538	12573	$PAD
12539	12574	Sh "25" R 392 1181 0 0 0
12540	12575	Dr 0 0 0
12541	12576	At SMD N 00440001
12542		Ne 71 "/fpga1/FPGA_BANK0_IO_2"
	12577	Ne 32 "/expansion/FPGA_BANK0_IO_2"
12543	12578	Po 0 -747
12544	12579	$EndPAD
12545	12580	$PAD
12546	12581	Sh "27" R 394 1181 0 0 0
12547	12582	Dr 0 0 0
12548	12583	At SMD N 00440001
12549		Ne 91 "/fpga1/FPGA_BANK0_IO_7"
	12584	Ne 49 "/expansion/FPGA_BANK0_IO_7"
12550	12585	Po -787 -747
12551	12586	$EndPAD
12552	12587	$PAD
12553	12588	Sh "29" R 394 1181 0 0 0
12554	12589	Dr 0 0 0
12555	12590	At SMD N 00440001
12556		Ne 28 "/expansion/FPGA_BANK0_IO_12"
	12591	Ne 71 "/fpga1/FPGA_BANK0_IO_12"
12557	12592	Po -1574 -747
12558	12593	$EndPAD
12559	12594	$PAD
12560	12595	Sh "31" R 394 1181 0 0 0
12561	12596	Dr 0 0 0
12562	12597	At SMD N 00440001
12563		Ne 81 "/fpga1/FPGA_BANK0_IO_44"
	12598	Ne 82 "/fpga1/FPGA_BANK0_IO_44"
12564	12599	Po -2362 -747
12565	12600	$EndPAD
12566	12601	$PAD
12567	12602	Sh "33" R 394 1181 0 0 0
12568	12603	Dr 0 0 0
12569	12604	At SMD N 00440001
12570		Ne 83 "/fpga1/FPGA_BANK0_IO_47"
	12605	Ne 44 "/expansion/FPGA_BANK0_IO_47"
12571	12606	Po -3149 -747
12572	12607	$EndPAD
12573	12608	$PAD
12574	12609	Sh "35" R 393 1181 0 0 0
12575	12610	Dr 0 0 0
12576	12611	At SMD N 00440001
12577		Ne 82 "/fpga1/FPGA_BANK0_IO_45"
	12612	Ne 83 "/fpga1/FPGA_BANK0_IO_45"
12578	12613	Po -3936 -747
12579	12614	$EndPAD
12580	12615	$PAD
12581	12616	Sh "37" R 394 1181 0 0 0
12582	12617	Dr 0 0 0
12583	12618	At SMD N 00440001
12584		Ne 45 "/expansion/FPGA_BANK0_IO_52"
	12619	Ne 87 "/fpga1/FPGA_BANK0_IO_52"
12585	12620	Po -4724 -747
12586	12621	$EndPAD
12587	12622	$PAD
12588	12623	Sh "39" R 394 1181 0 0 0
12589	12624	Dr 0 0 0
12590	12625	At SMD N 00440001
12591		Ne 48 "/expansion/FPGA_BANK0_IO_56"
	12626	Ne 89 "/fpga1/FPGA_BANK0_IO_56"
12592	12627	Po -5511 -747
12593	12628	$EndPAD
12594	12629	$PAD
12595	12630	Sh "41" R 394 1181 0 0 0
12596	12631	Dr 0 0 0
12597	12632	At SMD N 00440001
12598		Ne 85 "/fpga1/FPGA_BANK0_IO_51"
	12633	Ne 86 "/fpga1/FPGA_BANK0_IO_51"
12599	12634	Po -6299 -747
12600	12635	$EndPAD
12601	12636	$PAD
...	...
12609	12644	Sh "45" R 393 1181 0 0 0
12610	12645	Dr 0 0 0
12611	12646	At SMD N 00440001
12612		Ne 49 "/expansion/FPGA_BANK0_IO_63"
	12647	Ne 94 "/fpga1/FPGA_BANK0_IO_63"
12613	12648	Po -7873 -747
12614	12649	$EndPAD
12615	12650	$PAD
12616	12651	Sh "47" R 394 1181 0 0 0
12617	12652	Dr 0 0 0
12618	12653	At SMD N 00440001
12619		Ne 46 "/expansion/FPGA_BANK0_IO_53"
	12654	Ne 88 "/fpga1/FPGA_BANK0_IO_53"
12620	12655	Po -8661 -747
12621	12656	$EndPAD
12622	12657	$PAD
12623	12658	Sh "49" R 394 1181 0 0 0
12624	12659	Dr 0 0 0
12625	12660	At SMD N 00440001
12626		Ne 87 "/fpga1/FPGA_BANK0_IO_58"
	12661	Ne 91 "/fpga1/FPGA_BANK0_IO_58"
12627	12662	Po -9448 -747
12628	12663	$EndPAD
12629	12664	$PAD
...	...
12644	12679	Sh "6" R 393 1181 0 0 0
12645	12680	Dr 0 0 0
12646	12681	At SMD N 00400001
12647		Ne 70 "/fpga1/FPGA_BANK0_IO_14"
	12682	Ne 72 "/fpga1/FPGA_BANK0_IO_14"
12648	12683	Po 7873 747
12649	12684	$EndPAD
12650	12685	$PAD
12651	12686	Sh "8" R 394 1181 0 0 0
12652	12687	Dr 0 0 0
12653	12688	At SMD N 00400001
12654		Ne 29 "/expansion/FPGA_BANK0_IO_15"
	12689	Ne 30 "/expansion/FPGA_BANK0_IO_15"
12655	12690	Po 7086 747
12656	12691	$EndPAD
12657	12692	$PAD
12658	12693	Sh "10" R 394 1181 0 0 0
12659	12694	Dr 0 0 0
12660	12695	At SMD N 00400001
12661		Ne 76 "/fpga1/FPGA_BANK0_IO_3"
	12696	Ne 36 "/expansion/FPGA_BANK0_IO_3"
12662	12697	Po 6299 747
12663	12698	$EndPAD
12664	12699	$PAD
12665	12700	Sh "12" R 394 1181 0 0 0
12666	12701	Dr 0 0 0
12667	12702	At SMD N 00400001
12668		Ne 31 "/expansion/FPGA_BANK0_IO_18"
	12703	Ne 73 "/fpga1/FPGA_BANK0_IO_18"
12669	12704	Po 5511 747
12670	12705	$EndPAD
12671	12706	$PAD
12672	12707	Sh "14" R 394 1181 0 0 0
12673	12708	Dr 0 0 0
12674	12709	At SMD N 00400001
12675		Ne 32 "/expansion/FPGA_BANK0_IO_21"
	12710	Ne 34 "/expansion/FPGA_BANK0_IO_21"
12676	12711	Po 4724 747
12677	12712	$EndPAD
12678	12713	$PAD
12679	12714	Sh "16" R 393 1181 0 0 0
12680	12715	Dr 0 0 0
12681	12716	At SMD N 00400001
12682		Ne 74 "/fpga1/FPGA_BANK0_IO_24"
	12717	Ne 75 "/fpga1/FPGA_BANK0_IO_24"
12683	12718	Po 3936 747
12684	12719	$EndPAD
12685	12720	$PAD
12686	12721	Sh "18" R 394 1181 0 0 0
12687	12722	Dr 0 0 0
12688	12723	At SMD N 00400001
12689		Ne 75 "/fpga1/FPGA_BANK0_IO_29"
	12724	Ne 35 "/expansion/FPGA_BANK0_IO_29"
12690	12725	Po 3149 747
12691	12726	$EndPAD
12692	12727	$PAD
12693	12728	Sh "20" R 394 1181 0 0 0
12694	12729	Dr 0 0 0
12695	12730	At SMD N 00400001
12696		Ne 77 "/fpga1/FPGA_BANK0_IO_30"
	12731	Ne 79 "/fpga1/FPGA_BANK0_IO_30"
12697	12732	Po 2362 747
12698	12733	$EndPAD
12699	12734	$PAD
12700	12735	Sh "22" R 394 1181 0 0 0
12701	12736	Dr 0 0 0
12702	12737	At SMD N 00400001
12703		Ne 33 "/expansion/FPGA_BANK0_IO_25"
	12738	Ne 76 "/fpga1/FPGA_BANK0_IO_25"
12704	12739	Po 1574 747
12705	12740	$EndPAD
12706	12741	$PAD
12707	12742	Sh "24" R 394 1181 0 0 0
12708	12743	Dr 0 0 0
12709	12744	At SMD N 00400001
12710		Ne 78 "/fpga1/FPGA_BANK0_IO_33"
	12745	Ne 80 "/fpga1/FPGA_BANK0_IO_33"
12711	12746	Po 787 747
12712	12747	$EndPAD
12713	12748	$PAD
12714	12749	Sh "26" R 392 1181 0 0 0
12715	12750	Dr 0 0 0
12716	12751	At SMD N 00400001
12717		Ne 36 "/expansion/FPGA_BANK0_IO_32"
	12752	Ne 37 "/expansion/FPGA_BANK0_IO_32"
12718	12753	Po 0 747
12719	12754	$EndPAD
12720	12755	$PAD
12721	12756	Sh "28" R 394 1181 0 0 0
12722	12757	Dr 0 0 0
12723	12758	At SMD N 00400001
12724		Ne 88 "/fpga1/FPGA_BANK0_IO_6"
	12759	Ne 48 "/expansion/FPGA_BANK0_IO_6"
12725	12760	Po -787 747
12726	12761	$EndPAD
12727	12762	$PAD
12728	12763	Sh "30" R 394 1181 0 0 0
12729	12764	Dr 0 0 0
12730	12765	At SMD N 00400001
12731		Ne 37 "/expansion/FPGA_BANK0_IO_36"
	12766	Ne 81 "/fpga1/FPGA_BANK0_IO_36"
12732	12767	Po -1574 747
12733	12768	$EndPAD
12734	12769	$PAD
12735	12770	Sh "32" R 394 1181 0 0 0
12736	12771	Dr 0 0 0
12737	12772	At SMD N 00400001
12738		Ne 80 "/fpga1/FPGA_BANK0_IO_40"
	12773	Ne 41 "/expansion/FPGA_BANK0_IO_40"
12739	12774	Po -2362 747
12740	12775	$EndPAD
12741	12776	$PAD
12742	12777	Sh "34" R 394 1181 0 0 0
12743	12778	Dr 0 0 0
12744	12779	At SMD N 00400001
12745		Ne 40 "/expansion/FPGA_BANK0_IO_43"
	12780	Ne 42 "/expansion/FPGA_BANK0_IO_43"
12746	12781	Po -3149 747
12747	12782	$EndPAD
12748	12783	$PAD
12749	12784	Sh "36" R 393 1181 0 0 0
12750	12785	Dr 0 0 0
12751	12786	At SMD N 00400001
12752		Ne 41 "/expansion/FPGA_BANK0_IO_46"
	12787	Ne 43 "/expansion/FPGA_BANK0_IO_46"
12753	12788	Po -3936 747
12754	12789	$EndPAD
12755	12790	$PAD
12756	12791	Sh "38" R 394 1181 0 0 0
12757	12792	Dr 0 0 0
12758	12793	At SMD N 00400001
12759		Ne 44 "/expansion/FPGA_BANK0_IO_50"
	12794	Ne 46 "/expansion/FPGA_BANK0_IO_50"
12760	12795	Po -4724 747
12761	12796	$EndPAD
12762	12797	$PAD
...	...
12770	12805	Sh "42" R 394 1181 0 0 0
12771	12806	Dr 0 0 0
12772	12807	At SMD N 00400001
12773		Ne 79 "/fpga1/FPGA_BANK0_IO_34"
	12808	Ne 38 "/expansion/FPGA_BANK0_IO_34"
12774	12809	Po -6299 747
12775	12810	$EndPAD
12776	12811	$PAD
12777	12812	Sh "44" R 394 1181 0 0 0
12778	12813	Dr 0 0 0
12779	12814	At SMD N 00400001
12780		Ne 42 "/expansion/FPGA_BANK0_IO_49"
	12815	Ne 85 "/fpga1/FPGA_BANK0_IO_49"
12781	12816	Po -7086 747
12782	12817	$EndPAD
12783	12818	$PAD
12784	12819	Sh "46" R 393 1181 0 0 0
12785	12820	Dr 0 0 0
12786	12821	At SMD N 00400001
12787		Ne 90 "/fpga1/FPGA_BANK0_IO_62"
	12822	Ne 93 "/fpga1/FPGA_BANK0_IO_62"
12788	12823	Po -7873 747
12789	12824	$EndPAD
12790	12825	$PAD
12791	12826	Sh "48" R 394 1181 0 0 0
12792	12827	Dr 0 0 0
12793	12828	At SMD N 00400001
12794		Ne 86 "/fpga1/FPGA_BANK0_IO_57"
	12829	Ne 90 "/fpga1/FPGA_BANK0_IO_57"
12795	12830	Po -8661 747
12796	12831	$EndPAD
12797	12832	$PAD
12798	12833	Sh "50" R 394 1181 0 0 0
12799	12834	Dr 0 0 0
12800	12835	At SMD N 00400001
12801		Ne 89 "/fpga1/FPGA_BANK0_IO_60"
	12836	Ne 92 "/fpga1/FPGA_BANK0_IO_60"
12802	12837	Po -9448 747
12803	12838	$EndPAD
12804	12839	$PAD
...	...
12994	13029	Sh "1" R 157 236 0 0 0
12995	13030	Dr 0 0 0
12996	13031	At SMD N 00440001
12997		Ne 198 "/fpga2/R_M0_LDQS"
	13032	Ne 196 "/fpga2/R_M0_LDQS"
12998	13033	Po -176 0
12999	13034	$EndPAD
13000	13035	$PAD
13001	13036	Sh "2" R 157 236 0 0 0
13002	13037	Dr 0 0 0
13003	13038	At SMD N 00440001
13004		Ne 136 "/fpga2/M0_LDQS"
	13039	Ne 135 "/fpga2/M0_LDQS"
13005	13040	Po 176 0
13006	13041	$EndPAD
13007	13042	$EndMODULE 0402
...	...
13022	13057	Sh "1" R 157 236 0 0 0
13023	13058	Dr 0 0 0
13024	13059	At SMD N 00440001
13025		Ne 197 "/fpga2/R_M0_LDM"
	13060	Ne 195 "/fpga2/R_M0_LDM"
13026	13061	Po -176 0
13027	13062	$EndPAD
13028	13063	$PAD
13029	13064	Sh "2" R 157 236 0 0 0
13030	13065	Dr 0 0 0
13031	13066	At SMD N 00440001
13032		Ne 135 "/fpga2/M0_LDM"
	13067	Ne 134 "/fpga2/M0_LDM"
13033	13068	Po 176 0
13034	13069	$EndPAD
13035	13070	$EndMODULE 0402
...	...
13050	13085	Sh "1" R 157 236 0 0 0
13051	13086	Dr 0 0 0
13052	13087	At SMD N 00440001
13053		Ne 202 "/fpga2/R_M0_WE#"
	13088	Ne 200 "/fpga2/R_M0_WE#"
13054	13089	Po -176 0
13055	13090	$EndPAD
13056	13091	$PAD
13057	13092	Sh "2" R 157 236 0 0 0
13058	13093	Dr 0 0 0
13059	13094	At SMD N 00440001
13060		Ne 138 "/fpga2/M0_WE#"
	13095	Ne 262 "/sdram/M0_WE#"
13061	13096	Po 176 0
13062	13097	$EndPAD
13063	13098	$EndMODULE 0402
...	...
13078	13113	Sh "1" R 157 236 0 0 0
13079	13114	Dr 0 0 0
13080	13115	At SMD N 00440001
13081		Ne 179 "/fpga2/R_M0_CAS#"
	13116	Ne 177 "/fpga2/R_M0_CAS#"
13082	13117	Po -176 0
13083	13118	$EndPAD
13084	13119	$PAD
...	...
13106	13141	Sh "1" R 157 236 0 0 0
13107	13142	Dr 0 0 0
13108	13143	At SMD N 00440001
13109		Ne 238 "/fpga2/R_M1_LDQS"
	13144	Ne 236 "/fpga2/R_M1_LDQS"
13110	13145	Po -176 0
13111	13146	$EndPAD
13112	13147	$PAD
13113	13148	Sh "2" R 157 236 0 0 0
13114	13149	Dr 0 0 0
13115	13150	At SMD N 00440001
13116		Ne 163 "/fpga2/M1_LDQS"
	13151	Ne 276 "/sdram/M1_LDQS"
13117	13152	Po 176 0
13118	13153	$EndPAD
13119	13154	$EndMODULE 0402
...	...
13134	13169	Sh "1" R 157 236 0 0 0
13135	13170	Dr 0 0 0
13136	13171	At SMD N 00440001
13137		Ne 237 "/fpga2/R_M1_LDM"
	13172	Ne 235 "/fpga2/R_M1_LDM"
13138	13173	Po -176 0
13139	13174	$EndPAD
13140	13175	$PAD
13141	13176	Sh "2" R 157 236 0 0 0
13142	13177	Dr 0 0 0
13143	13178	At SMD N 00440001
13144		Ne 162 "/fpga2/M1_LDM"
	13179	Ne 160 "/fpga2/M1_LDM"
13145	13180	Po 176 0
13146	13181	$EndPAD
13147	13182	$EndMODULE 0402
...	...
13162	13197	Sh "1" R 157 236 0 0 0
13163	13198	Dr 0 0 0
13164	13199	At SMD N 00440001
13165		Ne 242 "/fpga2/R_M1_WE#"
	13200	Ne 240 "/fpga2/R_M1_WE#"
13166	13201	Po -176 0
13167	13202	$EndPAD
13168	13203	$PAD
...	...
13190	13225	Sh "1" R 157 236 0 0 0
13191	13226	Dr 0 0 0
13192	13227	At SMD N 00440001
13193		Ne 218 "/fpga2/R_M1_CAS#"
	13228	Ne 216 "/fpga2/R_M1_CAS#"
13194	13229	Po -176 0
13195	13230	$EndPAD
13196	13231	$PAD
13197	13232	Sh "2" R 157 236 0 0 0
13198	13233	Dr 0 0 0
13199	13234	At SMD N 00440001
13200		Ne 148 "/fpga2/M1_CAS#"
	13235	Ne 270 "/sdram/M1_CAS#"
13201	13236	Po 176 0
13202	13237	$EndPAD
13203	13238	$EndMODULE 0402
...	...
13225	13260	Sh "2" R 157 236 0 0 900
13226	13261	Dr 0 0 0
13227	13262	At SMD N 00440001
13228		Ne 329 "VCCO2"
	13263	Ne 336 "VCCO2"
13229	13264	Po 176 0
13230	13265	$EndPAD
13231	13266	$EndMODULE 0402
...	...
13260	13295	Sh "3" R 551 453 0 0 1800
13261	13296	Dr 0 0 0
13262	13297	At SMD N 00440001
13263		Ne 38 "/expansion/FPGA_BANK0_IO_38"
	13298	Ne 39 "/expansion/FPGA_BANK0_IO_38"
13264	13299	Po 866 630
13265	13300	$EndPAD
13266	13301	$PAD
13267	13302	Sh "4" R 551 453 0 0 1800
13268	13303	Dr 0 0 0
13269	13304	At SMD N 00440001
13270		Ne 329 "VCCO2"
	13305	Ne 336 "VCCO2"
13271	13306	Po 0 630
13272	13307	$EndPAD
13273	13308	$EndMODULE CRYSTAL
...	...
13380	13415	Sh "8" R 161 394 0 0 0
13381	13416	Dr 0 0 0
13382	13417	At SMD N 00888000
13383		Ne 326 "N-000190"
	13418	Ne 315 "N-000170"
13384	13419	Po -383 -905
13385	13420	$EndPAD
13386	13421	$PAD
13387	13422	Sh "2" R 161 394 0 0 0
13388	13423	Dr 0 0 0
13389	13424	At SMD N 00888000
13390		Ne 316 "N-000171"
	13425	Ne 321 "N-000176"
13391	13426	Po -127 905
13392	13427	$EndPAD
13393	13428	$PAD
13394	13429	Sh "7" R 161 394 0 0 0
13395	13430	Dr 0 0 0
13396	13431	At SMD N 00888000
13397		Ne 317 "N-000172"
	13432	Ne 313 "N-000168"
13398	13433	Po -127 -905
13399	13434	$EndPAD
13400	13435	$PAD
13401	13436	Sh "3" R 161 394 0 0 0
13402	13437	Dr 0 0 0
13403	13438	At SMD N 00888000
13404		Ne 324 "N-000188"
	13439	Ne 314 "N-000169"
13405	13440	Po 127 905
13406	13441	$EndPAD
13407	13442	$PAD
13408	13443	Sh "6" R 161 394 0 0 0
13409	13444	Dr 0 0 0
13410	13445	At SMD N 00888000
13411		Ne 316 "N-000171"
	13446	Ne 321 "N-000176"
13412	13447	Po 127 -905
13413	13448	$EndPAD
13414	13449	$PAD
13415	13450	Sh "4" R 161 394 0 0 0
13416	13451	Dr 0 0 0
13417	13452	At SMD N 00888000
13418		Ne 325 "N-000189"
	13453	Ne 320 "N-000175"
13419	13454	Po 383 905
13420	13455	$EndPAD
13421	13456	$PAD
...	...
13479	13514	Sh "1" R 98 157 0 0 0
13480	13515	Dr 0 0 0
13481	13516	At SMD N 00888000
13482		Ne 313 "N-000168"
	13517	Ne 309 "N-000163"
13483	13518	Po -393 -688
13484	13519	$EndPAD
13485	13520	$PAD
...	...
13493	13528	Sh "2" R 99 157 0 0 0
13494	13529	Dr 0 0 0
13495	13530	At SMD N 00888000
13496		Ne 313 "N-000168"
	13531	Ne 309 "N-000163"
13497	13532	Po -196 -688
13498	13533	$EndPAD
13499	13534	$PAD
13500	13535	Sh "13" R 98 157 0 0 0
13501	13536	Dr 0 0 0
13502	13537	At SMD N 00888000
13503		Ne 319 "N-000177"
	13538	Ne 327 "N-000184"
13504	13539	Po 0 688
13505	13540	$EndPAD
13506	13541	$PAD
13507	13542	Sh "3" R 98 157 0 0 0
13508	13543	Dr 0 0 0
13509	13544	At SMD N 00888000
13510		Ne 313 "N-000168"
	13545	Ne 309 "N-000163"
13511	13546	Po 0 -688
13512	13547	$EndPAD
13513	13548	$PAD
13514	13549	Sh "12" R 99 157 0 0 0
13515	13550	Dr 0 0 0
13516	13551	At SMD N 00888000
13517		Ne 314 "N-000169"
	13552	Ne 316 "N-000171"
13518	13553	Po 196 688
13519	13554	$EndPAD
13520	13555	$PAD
13521	13556	Sh "4" R 99 157 0 0 0
13522	13557	Dr 0 0 0
13523	13558	At SMD N 00888000
13524		Ne 313 "N-000168"
	13559	Ne 309 "N-000163"
13525	13560	Po 196 -688
13526	13561	$EndPAD
13527	13562	$PAD
13528	13563	Sh "11" R 98 157 0 0 0
13529	13564	Dr 0 0 0
13530	13565	At SMD N 00888000
13531		Ne 320 "N-000178"
	13566	Ne 328 "N-000185"
13532	13567	Po 393 688
13533	13568	$EndPAD
13534	13569	$PAD
13535	13570	Sh "5" R 98 157 0 0 0
13536	13571	Dr 0 0 0
13537	13572	At SMD N 00888000
13538		Ne 313 "N-000168"
	13573	Ne 309 "N-000163"
13539	13574	Po 393 -688
13540	13575	$EndPAD
13541	13576	$PAD
13542	13577	Sh "20" R 157 98 0 0 0
13543	13578	Dr 0 0 0
13544	13579	At SMD N 00888000
13545		Ne 320 "N-000178"
	13580	Ne 328 "N-000185"
13546	13581	Po -688 -393
13547	13582	$EndPAD
13548	13583	$PAD
13549	13584	Sh "6" R 157 98 0 0 0
13550	13585	Dr 0 0 0
13551	13586	At SMD N 00888000
13552		Ne 321 "N-000179"
	13587	Ne 308 "N-000162"
13553	13588	Po 688 -393
13554	13589	$EndPAD
13555	13590	$PAD
13556	13591	Sh "19" R 157 99 0 0 0
13557	13592	Dr 0 0 0
13558	13593	At SMD N 00888000
13559		Ne 320 "N-000178"
	13594	Ne 328 "N-000185"
13560	13595	Po -688 -196
13561	13596	$EndPAD
13562	13597	$PAD
13563	13598	Sh "7" R 157 99 0 0 0
13564	13599	Dr 0 0 0
13565	13600	At SMD N 00888000
13566		Ne 321 "N-000179"
	13601	Ne 308 "N-000162"
13567	13602	Po 688 -196
13568	13603	$EndPAD
13569	13604	$PAD
13570	13605	Sh "18" R 157 98 0 0 0
13571	13606	Dr 0 0 0
13572	13607	At SMD N 00888000
13573		Ne 320 "N-000178"
	13608	Ne 328 "N-000185"
13574	13609	Po -688 0
13575	13610	$EndPAD
13576	13611	$PAD
13577	13612	Sh "8" R 157 98 0 0 0
13578	13613	Dr 0 0 0
13579	13614	At SMD N 00888000
13580		Ne 321 "N-000179"
	13615	Ne 308 "N-000162"
13581	13616	Po 688 0
13582	13617	$EndPAD
13583	13618	$PAD
...	...
13634	13669	Sh "1" R 197 355 0 0 0
13635	13670	Dr 0 0 0
13636	13671	At SMD N 00888000
13637		Ne 305 "N-000158"
	13672	Ne 305 "N-000159"
13638	13673	Po -749 1003
13639	13674	$EndPAD
13640	13675	$PAD
...	...
13648	13683	Sh "2" R 197 355 0 0 0
13649	13684	Dr 0 0 0
13650	13685	At SMD N 00888000
13651		Ne 310 "N-000165"
	13686	Ne 312 "N-000167"
13652	13687	Po -249 1003
13653	13688	$EndPAD
13654	13689	$PAD
13655	13690	Sh "7" R 197 355 0 0 0
13656	13691	Dr 0 0 0
13657	13692	At SMD N 00888000
13658		Ne 310 "N-000165"
	13693	Ne 312 "N-000167"
13659	13694	Po -249 -1003
13660	13695	$EndPAD
13661	13696	$PAD
13662	13697	Sh "3" R 197 355 0 0 0
13663	13698	Dr 0 0 0
13664	13699	At SMD N 00888000
13665		Ne 304 "N-000157"
	13700	Ne 304 "N-000158"
13666	13701	Po 249 1003
13667	13702	$EndPAD
13668	13703	$PAD
13669	13704	Sh "6" R 197 355 0 0 0
13670	13705	Dr 0 0 0
13671	13706	At SMD N 00888000
13672		Ne 309 "N-000164"
	13707	Ne 311 "N-000166"
13673	13708	Po 249 -1003
13674	13709	$EndPAD
13675	13710	$PAD
...	...
13712	13747	Sh "1" R 157 185 0 0 0
13713	13748	Dr 0 0 0
13714	13749	At SMD N 00888000
13715		Ne 322 "N-000182"
	13750	Ne 330 "N-000190"
13716	13751	Po -255 340
13717	13752	$EndPAD
13718	13753	$PAD
...	...
13733	13768	Sh "5" R 156 185 0 0 0
13734	13769	Dr 0 0 0
13735	13770	At SMD N 00888000
13736		Ne 311 "N-000166"
	13771	Ne 318 "N-000173"
13737	13772	Po 0 -340
13738	13773	$EndPAD
13739	13774	$PAD
...	...
13768	13803	Sh "1" R 157 236 0 0 0
13769	13804	Dr 0 0 0
13770	13805	At SMD N 00888000
13771		Ne 323 "N-000183"
	13806	Ne 326 "N-000181"
13772	13807	Po -176 0
13773	13808	$EndPAD
13774	13809	$PAD
13775	13810	Sh "2" R 157 236 0 0 0
13776	13811	Dr 0 0 0
13777	13812	At SMD N 00888000
13778		Ne 305 "N-000158"
	13813	Ne 305 "N-000159"
13779	13814	Po 176 0
13780	13815	$EndPAD
13781	13816	$EndMODULE 0402
...	...
13796	13831	Sh "1" R 157 236 0 0 0
13797	13832	Dr 0 0 0
13798	13833	At SMD N 00888000
13799		Ne 305 "N-000158"
	13834	Ne 305 "N-000159"
13800	13835	Po -176 0
13801	13836	$EndPAD
13802	13837	$PAD
...	...
13824	13859	Sh "1" R 157 236 0 0 0
13825	13860	Dr 0 0 0
13826	13861	At SMD N 00888000
13827		Ne 304 "N-000157"
	13862	Ne 304 "N-000158"
13828	13863	Po -176 0
13829	13864	$EndPAD
13830	13865	$PAD
13831	13866	Sh "2" R 157 236 0 0 0
13832	13867	Dr 0 0 0
13833	13868	At SMD N 00888000
13834		Ne 308 "N-000163"
	13869	Ne 310 "N-000165"
13835	13870	Po 176 0
13836	13871	$EndPAD
13837	13872	$EndMODULE 0402
...	...
13852	13887	Sh "1" R 157 236 0 0 0
13853	13888	Dr 0 0 0
13854	13889	At SMD N 00888000
13855		Ne 308 "N-000163"
	13890	Ne 310 "N-000165"
13856	13891	Po -176 0
13857	13892	$EndPAD
13858	13893	$PAD
...	...
13880	13915	Sh "1" R 157 236 0 0 0
13881	13916	Dr 0 0 0
13882	13917	At SMD N 00888000
13883		Ne 318 "N-000174"
	13918	Ne 329 "N-000186"
13884	13919	Po -176 0
13885	13920	$EndPAD
13886	13921	$PAD
13887	13922	Sh "2" R 157 236 0 0 0
13888	13923	Dr 0 0 0
13889	13924	At SMD N 00888000
13890		Ne 314 "N-000169"
	13925	Ne 316 "N-000171"
13891	13926	Po 176 0
13892	13927	$EndPAD
13893	13928	$EndMODULE 0402
...	...
13915	13950	Sh "2" R 157 236 0 0 0
13916	13951	Dr 0 0 0
13917	13952	At SMD N 00888000
13918		Ne 313 "N-000168"
	13953	Ne 309 "N-000163"
13919	13954	Po 176 0
13920	13955	$EndPAD
13921	13956	$EndMODULE 0402
...	...
13943	13978	Sh "2" R 157 236 0 0 0
13944	13979	Dr 0 0 0
13945	13980	At SMD N 00888000
13946		Ne 321 "N-000179"
	13981	Ne 308 "N-000162"
13947	13982	Po 176 0
13948	13983	$EndPAD
13949	13984	$EndMODULE 0402
...	...
13999	14034	Sh "2" R 157 236 0 0 0
14000	14035	Dr 0 0 0
14001	14036	At SMD N 00888000
14002		Ne 314 "N-000169"
	14037	Ne 316 "N-000171"
14003	14038	Po 176 0
14004	14039	$EndPAD
14005	14040	$EndMODULE 0402
...	...
14020	14055	Sh "1" R 157 236 0 0 0
14021	14056	Dr 0 0 0
14022	14057	At SMD N 00888000
14023		Ne 315 "N-000170"
	14058	Ne 317 "N-000172"
14024	14059	Po -176 0
14025	14060	$EndPAD
14026	14061	$PAD
14027	14062	Sh "2" R 157 236 0 0 0
14028	14063	Dr 0 0 0
14029	14064	At SMD N 00888000
14030		Ne 319 "N-000177"
	14065	Ne 327 "N-000184"
14031	14066	Po 176 0
14032	14067	$EndPAD
14033	14068	$EndMODULE 0402
...	...
14048	14083	Sh "1" R 157 236 0 0 0
14049	14084	Dr 0 0 0
14050	14085	At SMD N 00888000
14051		Ne 315 "N-000170"
	14086	Ne 317 "N-000172"
14052	14087	Po -176 0
14053	14088	$EndPAD
14054	14089	$PAD
...	...
14076	14111	Sh "1" R 157 236 0 0 0
14077	14112	Dr 0 0 0
14078	14113	At SMD N 00888000
14079		Ne 318 "N-000174"
	14114	Ne 329 "N-000186"
14080	14115	Po -176 0
14081	14116	$EndPAD
14082	14117	$PAD
...	...
14104	14139	Sh "1" R 157 236 0 0 0
14105	14140	Dr 0 0 0
14106	14141	At SMD N 00888000
14107		Ne 323 "N-000183"
	14142	Ne 326 "N-000181"
14108	14143	Po -176 0
14109	14144	$EndPAD
14110	14145	$PAD
...	...
14132	14167	Sh "1" R 157 236 0 0 0
14133	14168	Dr 0 0 0
14134	14169	At SMD N 00888000
14135		Ne 322 "N-000182"
	14170	Ne 330 "N-000190"
14136	14171	Po -176 0
14137	14172	$EndPAD
14138	14173	$PAD
...	...
14160	14195	Sh "1" R 157 236 0 0 0
14161	14196	Dr 0 0 0
14162	14197	At SMD N 00888000
14163		Ne 324 "N-000188"
	14198	Ne 314 "N-000169"
14164	14199	Po -176 0
14165	14200	$EndPAD
14166	14201	$PAD
14167	14202	Sh "2" R 157 236 0 0 0
14168	14203	Dr 0 0 0
14169	14204	At SMD N 00888000
14170		Ne 316 "N-000171"
	14205	Ne 321 "N-000176"
14171	14206	Po 176 0
14172	14207	$EndPAD
14173	14208	$EndMODULE 0402
...	...
14195	14230	Sh "2" R 157 236 0 0 0
14196	14231	Dr 0 0 0
14197	14232	At SMD N 00888000
14198		Ne 325 "N-000189"
	14233	Ne 320 "N-000175"
14199	14234	Po 176 0
14200	14235	$EndPAD
14201	14236	$EndMODULE 0402
...	...
14216	14251	Sh "1" R 157 236 0 0 0
14217	14252	Dr 0 0 0
14218	14253	At SMD N 00888000
14219		Ne 317 "N-000172"
	14254	Ne 313 "N-000168"
14220	14255	Po -176 0
14221	14256	$EndPAD
14222	14257	$PAD
...	...
14244	14279	Sh "1" R 157 236 0 0 0
14245	14280	Dr 0 0 0
14246	14281	At SMD N 00888000
14247		Ne 312 "N-000167"
	14282	Ne 319 "N-000174"
14248	14283	Po -176 0
14249	14284	$EndPAD
14250	14285	$PAD
...	...
14272	14307	Sh "1" R 157 236 0 0 0
14273	14308	Dr 0 0 0
14274	14309	At SMD N 00888000
14275		Ne 325 "N-000189"
	14310	Ne 320 "N-000175"
14276	14311	Po -176 0
14277	14312	$EndPAD
14278	14313	$PAD
14279	14314	Sh "2" R 157 236 0 0 0
14280	14315	Dr 0 0 0
14281	14316	At SMD N 00888000
14282		Ne 317 "N-000172"
	14317	Ne 313 "N-000168"
14283	14318	Po 176 0
14284	14319	$EndPAD
14285	14320	$EndMODULE 0402
...	...
14300	14335	Sh "1" R 157 236 0 0 0
14301	14336	Dr 0 0 0
14302	14337	At SMD N 00888000
14303		Ne 317 "N-000172"
	14338	Ne 313 "N-000168"
14304	14339	Po -176 0
14305	14340	$EndPAD
14306	14341	$PAD
14307	14342	Sh "2" R 157 236 0 0 0
14308	14343	Dr 0 0 0
14309	14344	At SMD N 00888000
14310		Ne 325 "N-000189"
	14345	Ne 320 "N-000175"
14311	14346	Po 176 0
14312	14347	$EndPAD
14313	14348	$EndMODULE 0402
...	...
14328	14363	Sh "1" R 157 236 0 0 0
14329	14364	Dr 0 0 0
14330	14365	At SMD N 00888000
14331		Ne 316 "N-000171"
	14366	Ne 321 "N-000176"
14332	14367	Po -176 0
14333	14368	$EndPAD
14334	14369	$PAD
14335	14370	Sh "2" R 157 236 0 0 0
14336	14371	Dr 0 0 0
14337	14372	At SMD N 00888000
14338		Ne 317 "N-000172"
	14373	Ne 313 "N-000168"
14339	14374	Po 176 0
14340	14375	$EndPAD
14341	14376	$EndMODULE 0402
...	...
14356	14391	Sh "1" R 157 236 0 0 0
14357	14392	Dr 0 0 0
14358	14393	At SMD N 00888000
14359		Ne 316 "N-000171"
	14394	Ne 321 "N-000176"
14360	14395	Po -176 0
14361	14396	$EndPAD
14362	14397	$PAD
...	...
14412	14447	Sh "1" R 275 510 0 0 0
14413	14448	Dr 0 0 0
14414	14449	At SMD N 00888000
14415		Ne 322 "N-000182"
	14450	Ne 330 "N-000190"
14416	14451	Po -373 0
14417	14452	$EndPAD
14418	14453	$PAD
...	...
14440	14475	Sh "1" R 275 510 0 0 0
14441	14476	Dr 0 0 0
14442	14477	At SMD N 00888000
14443		Ne 322 "N-000182"
	14478	Ne 330 "N-000190"
14444	14479	Po -373 0
14445	14480	$EndPAD
14446	14481	$PAD
14447	14482	Sh "2" R 275 510 0 0 0
14448	14483	Dr 0 0 0
14449	14484	At SMD N 00888000
14450		Ne 311 "N-000166"
	14485	Ne 318 "N-000173"
14451	14486	Po 373 0
14452	14487	$EndPAD
14453	14488	$EndMODULE 0805
...	...
14468	14503	Sh "1" R 275 510 0 0 0
14469	14504	Dr 0 0 0
14470	14505	At SMD N 00888000
14471		Ne 326 "N-000190"
	14506	Ne 315 "N-000170"
14472	14507	Po -373 0
14473	14508	$EndPAD
14474	14509	$PAD
14475	14510	Sh "2" R 275 510 0 0 0
14476	14511	Dr 0 0 0
14477	14512	At SMD N 00888000
14478		Ne 317 "N-000172"
	14513	Ne 313 "N-000168"
14479	14514	Po 373 0
14480	14515	$EndPAD
14481	14516	$EndMODULE 0805
...	...
14524	14559	Sh "1" R 355 984 0 0 0
14525	14560	Dr 0 0 0
14526	14561	At SMD N 00888000
14527		Ne 323 "N-000183"
	14562	Ne 326 "N-000181"
14528	14563	Po -570 0
14529	14564	$EndPAD
14530	14565	$PAD
14531	14566	Sh "2" R 355 984 0 0 0
14532	14567	Dr 0 0 0
14533	14568	At SMD N 00888000
14534		Ne 309 "N-000164"
	14569	Ne 311 "N-000166"
14535	14570	Po 570 0
14536	14571	$EndPAD
14537	14572	$EndMODULE 1210
...	...
14552	14587	Sh "1" R 355 984 0 0 0
14553	14588	Dr 0 0 0
14554	14589	At SMD N 00888000
14555		Ne 318 "N-000174"
	14590	Ne 329 "N-000186"
14556	14591	Po -570 0
14557	14592	$EndPAD
14558	14593	$PAD
14559	14594	Sh "2" R 355 984 0 0 0
14560	14595	Dr 0 0 0
14561	14596	At SMD N 00888000
14562		Ne 313 "N-000168"
	14597	Ne 309 "N-000163"
14563	14598	Po 570 0
14564	14599	$EndPAD
14565	14600	$EndMODULE 1210
...	...
14580	14615	Sh "1" R 355 984 0 0 0
14581	14616	Dr 0 0 0
14582	14617	At SMD N 00888000
14583		Ne 318 "N-000174"
	14618	Ne 329 "N-000186"
14584	14619	Po -570 0
14585	14620	$EndPAD
14586	14621	$PAD
...	...
14636	14671	Sh "1" R 355 984 0 0 0
14637	14672	Dr 0 0 0
14638	14673	At SMD N 00888000
14639		Ne 323 "N-000183"
	14674	Ne 326 "N-000181"
14640	14675	Po -570 0
14641	14676	$EndPAD
14642	14677	$PAD
...	...
14664	14699	Sh "1" R 355 984 0 0 0
14665	14700	Dr 0 0 0
14666	14701	At SMD N 00888000
14667		Ne 326 "N-000190"
	14702	Ne 315 "N-000170"
14668	14703	Po -570 0
14669	14704	$EndPAD
14670	14705	$PAD
14671	14706	Sh "2" R 355 984 0 0 0
14672	14707	Dr 0 0 0
14673	14708	At SMD N 00888000
14674		Ne 312 "N-000167"
	14709	Ne 319 "N-000174"
14675	14710	Po 570 0
14676	14711	$EndPAD
14677	14712	$EndMODULE 1210
...	...
14692	14727	Sh "1" R 355 984 0 0 0
14693	14728	Dr 0 0 0
14694	14729	At SMD N 00888000
14695		Ne 317 "N-000172"
	14730	Ne 313 "N-000168"
14696	14731	Po -570 0
14697	14732	$EndPAD
14698	14733	$PAD
...	...
14703	14738	Po 570 0
14704	14739	$EndPAD
14705	14740	$EndMODULE 1210
	14741	$MODULE 0402
	14742	Po 72005 62832 0 15 4D1A6D35 4D1A6DBD ~~
	14743	Li 0402
	14744	Sc 4D1A6DBD
	14745	AR /4C69ED5F/4D1A0FF7
	14746	Op 0 0 0
	14747	At SMD
	14748	T0 0 -150 200 200 0 40 N V 25 N"C176"
	14749	T1 0 150 200 200 0 40 N I 25 N"100nF"
	14750	DS -305 168 -305 -168 50 21
	14751	DS -305 -168 305 -168 50 21
	14752	DS 305 -168 305 168 50 21
	14753	DS 305 168 -305 168 50 21
	14754	$PAD
	14755	Sh "1" R 157 236 0 0 0
	14756	Dr 0 0 0
	14757	At SMD N 00888000
	14758	Ne 322 "N-000177"
	14759	Po -176 0
	14760	$EndPAD
	14761	$PAD
	14762	Sh "2" R 157 236 0 0 0
	14763	Dr 0 0 0
	14764	At SMD N 00888000
	14765	Ne 292 "GND"
	14766	Po 176 0
	14767	$EndPAD
	14768	$EndMODULE 0402
	14769	$MODULE 0402
	14770	Po 72005 62832 0 15 4D1A6D35 4D1A6DBF ~~
	14771	Li 0402
	14772	Sc 4D1A6DBF
	14773	AR /4C69ED5F/4D1A1278
	14774	Op 0 0 0
	14775	At SMD
	14776	T0 0 -150 200 200 0 40 N V 25 N"R99"
	14777	T1 0 150 200 200 0 40 N I 25 N"R"
	14778	DS -305 168 -305 -168 50 21
	14779	DS -305 -168 305 -168 50 21
	14780	DS 305 -168 305 168 50 21
	14781	DS 305 168 -305 168 50 21
	14782	$PAD
	14783	Sh "1" R 157 236 0 0 0
	14784	Dr 0 0 0
	14785	At SMD N 00888000
	14786	Ne 331 "N-000201"
	14787	Po -176 0
	14788	$EndPAD
	14789	$PAD
	14790	Sh "2" R 157 236 0 0 0
	14791	Dr 0 0 0
	14792	At SMD N 00888000
	14793	Ne 292 "GND"
	14794	Po 176 0
	14795	$EndPAD
	14796	$EndMODULE 0402
	14797	$MODULE 0402
	14798	Po 72005 62832 0 15 4D1A6D35 4D1A6DC1 ~~
	14799	Li 0402
	14800	Sc 4D1A6DC1
	14801	AR /4C69ED5F/4D1A1280
	14802	Op 0 0 0
	14803	At SMD
	14804	T0 0 -150 200 200 0 40 N V 25 N"R100"
	14805	T1 0 150 200 200 0 40 N I 25 N"R"
	14806	DS -305 168 -305 -168 50 21
	14807	DS -305 -168 305 -168 50 21
	14808	DS 305 -168 305 168 50 21
	14809	DS 305 168 -305 168 50 21
	14810	$PAD
	14811	Sh "1" R 157 236 0 0 0
	14812	Dr 0 0 0
	14813	At SMD N 00888000
	14814	Ne 323 "N-000178"
	14815	Po -176 0
	14816	$EndPAD
	14817	$PAD
	14818	Sh "2" R 157 236 0 0 0
	14819	Dr 0 0 0
	14820	At SMD N 00888000
	14821	Ne 292 "GND"
	14822	Po 176 0
	14823	$EndPAD
	14824	$EndMODULE 0402
	14825	$MODULE 0402
	14826	Po 72005 62832 0 15 4D1A6D35 4D1A6DC3 ~~
	14827	Li 0402
	14828	Sc 4D1A6DC3
	14829	AR /4C69ED5F/4D1A13AE
	14830	Op 0 0 0
	14831	At SMD
	14832	T0 0 -150 200 200 0 40 N V 25 N"R98"
	14833	T1 0 150 200 200 0 40 N I 25 N"R"
	14834	DS -305 168 -305 -168 50 21
	14835	DS -305 -168 305 -168 50 21
	14836	DS 305 -168 305 168 50 21
	14837	DS 305 168 -305 168 50 21
	14838	$PAD
	14839	Sh "1" R 157 236 0 0 0
	14840	Dr 0 0 0
	14841	At SMD N 00888000
	14842	Ne 332 "N-000202"
	14843	Po -176 0
	14844	$EndPAD
	14845	$PAD
	14846	Sh "2" R 157 236 0 0 0
	14847	Dr 0 0 0
	14848	At SMD N 00888000
	14849	Ne 292 "GND"
	14850	Po 176 0
	14851	$EndPAD
	14852	$EndMODULE 0402
	14853	$MODULE 0402
	14854	Po 72005 62832 0 15 4D1A6D35 4D1A6DC5 ~~
	14855	Li 0402
	14856	Sc 4D1A6DC5
	14857	AR /4C69ED5F/4D1A14C4
	14858	Op 0 0 0
	14859	At SMD
	14860	T0 0 -150 200 200 0 40 N V 25 N"C179"
	14861	T1 0 150 200 200 0 40 N I 25 N"100nF"
	14862	DS -305 168 -305 -168 50 21
	14863	DS -305 -168 305 -168 50 21
	14864	DS 305 -168 305 168 50 21
	14865	DS 305 168 -305 168 50 21
	14866	$PAD
	14867	Sh "1" R 157 236 0 0 0
	14868	Dr 0 0 0
	14869	At SMD N 00888000
	14870	Ne 333 "N-000203"
	14871	Po -176 0
	14872	$EndPAD
	14873	$PAD
	14874	Sh "2" R 157 236 0 0 0
	14875	Dr 0 0 0
	14876	At SMD N 00888000
	14877	Ne 292 "GND"
	14878	Po 176 0
	14879	$EndPAD
	14880	$EndMODULE 0402
	14881	$MODULE 0805
	14882	Po 72005 62832 0 15 4D1A6D35 4D1A6DC6 ~~
	14883	Li 0805
	14884	Sc 4D1A6DC6
	14885	AR /4C69ED5F/4D1A0FF6
	14886	Op 0 0 0
	14887	At SMD
	14888	T0 0 -150 200 200 0 40 N V 25 N"C175"
	14889	T1 0 150 200 200 0 40 N I 25 N"10uF"
	14890	DS -561 305 -561 -305 50 21
	14891	DS -561 -305 561 -305 50 21
	14892	DS 561 -305 561 305 50 21
	14893	DS 561 305 -561 305 50 21
	14894	$PAD
	14895	Sh "1" R 275 510 0 0 0
	14896	Dr 0 0 0
	14897	At SMD N 00888000
	14898	Ne 322 "N-000177"
	14899	Po -373 0
	14900	$EndPAD
	14901	$PAD
	14902	Sh "2" R 275 510 0 0 0
	14903	Dr 0 0 0
	14904	At SMD N 00888000
	14905	Ne 292 "GND"
	14906	Po 373 0
	14907	$EndPAD
	14908	$EndMODULE 0805
	14909	$MODULE 0805
	14910	Po 72005 62832 0 15 4D1A6D35 4D1A6DC8 ~~
	14911	Li 0805
	14912	Sc 4D1A6DC8
	14913	AR /4C69ED5F/4D1A111E
	14914	Op 0 0 0
	14915	At SMD
	14916	T0 0 -150 200 200 0 40 N V 25 N"C177"
	14917	T1 0 150 200 200 0 40 N I 25 N"10uF"
	14918	DS -561 305 -561 -305 50 21
	14919	DS -561 -305 561 -305 50 21
	14920	DS 561 -305 561 305 50 21
	14921	DS 561 305 -561 305 50 21
	14922	$PAD
	14923	Sh "1" R 275 510 0 0 0
	14924	Dr 0 0 0
	14925	At SMD N 00888000
	14926	Ne 324 "N-000179"
	14927	Po -373 0
	14928	$EndPAD
	14929	$PAD
	14930	Sh "2" R 275 510 0 0 0
	14931	Dr 0 0 0
	14932	At SMD N 00888000
	14933	Ne 292 "GND"
	14934	Po 373 0
	14935	$EndPAD
	14936	$EndMODULE 0805
	14937	$MODULE 0805
	14938	Po 72005 62832 0 15 4D1A6D35 4D1A6DCA ~~
	14939	Li 0805
	14940	Sc 4D1A6DCA
	14941	AR /4C69ED5F/4D1A14C5
	14942	Op 0 0 0
	14943	At SMD
	14944	T0 0 -150 200 200 0 40 N V 25 N"C178"
	14945	T1 0 150 200 200 0 40 N I 25 N"10uF"
	14946	DS -561 305 -561 -305 50 21
	14947	DS -561 -305 561 -305 50 21
	14948	DS 561 -305 561 305 50 21
	14949	DS 561 305 -561 305 50 21
	14950	$PAD
	14951	Sh "1" R 275 510 0 0 0
	14952	Dr 0 0 0
	14953	At SMD N 00888000
	14954	Ne 333 "N-000203"
	14955	Po -373 0
	14956	$EndPAD
	14957	$PAD
	14958	Sh "2" R 275 510 0 0 0
	14959	Dr 0 0 0
	14960	At SMD N 00888000
	14961	Ne 292 "GND"
	14962	Po 373 0
	14963	$EndPAD
	14964	$EndMODULE 0805
	14965	$MODULE PVQFN-N20
	14966	Po 71016 61043 0 15 4D1A6D35 4D1A6DCB ~~
	14967	Li PVQFN-N20
	14968	Sc 4D1A6DCB
	14969	AR /4C69ED5F/4D1A0F8D
	14970	Op 0 0 0
	14971	At SMD
	14972	T0 0 -150 200 200 0 40 N V 25 N"U13"
	14973	T1 0 150 200 200 0 40 N I 25 N"BQ2407[0,1]"
	14974	DC -1141 -944 -1141 -1023 39 21
	14975	DS -1062 866 -1062 -866 39 21
	14976	DS -1062 -866 1062 -866 39 21
	14977	DS 1062 -866 1062 866 39 21
	14978	DS 1062 866 -1062 866 39 21
	14979	$PAD
	14980	Sh "PAD" R 1200 806 0 0 0
	14981	Dr 0 0 0
	14982	At SMD N 00888000
	14983	Ne 0 ""
	14984	Po 0 0
	14985	$EndPAD
	14986	$PAD
	14987	Sh "18" R 111 335 0 0 0
	14988	Dr 0 0 0
	14989	At SMD N 00888000
	14990	Ne 0 ""
	14991	Po -688 678
	14992	$EndPAD
	14993	$PAD
	14994	Sh "1" R 111 335 0 0 0
	14995	Dr 0 0 0
	14996	At SMD N 00888000
	14997	Ne 0 ""
	14998	Po -688 -678
	14999	$EndPAD
	15000	$PAD
	15001	Sh "17" R 110 335 0 0 0
	15002	Dr 0 0 0
	15003	At SMD N 00888000
	15004	Ne 325 "N-000180"
	15005	Po -492 678
	15006	$EndPAD
	15007	$PAD
	15008	Sh "2" R 110 335 0 0 0
	15009	Dr 0 0 0
	15010	At SMD N 00888000
	15011	Ne 0 ""
	15012	Po -492 -678
	15013	$EndPAD
	15014	$PAD
	15015	Sh "16" R 110 335 0 0 0
	15016	Dr 0 0 0
	15017	At SMD N 00888000
	15018	Ne 325 "N-000180"
	15019	Po -295 678
	15020	$EndPAD
	15021	$PAD
	15022	Sh "3" R 110 335 0 0 0
	15023	Dr 0 0 0
	15024	At SMD N 00888000
	15025	Ne 0 ""
	15026	Po -295 -678
	15027	$EndPAD
	15028	$PAD
	15029	Sh "15" R 110 335 0 0 0
	15030	Dr 0 0 0
	15031	At SMD N 00888000
	15032	Ne 325 "N-000180"
	15033	Po -98 678
	15034	$EndPAD
	15035	$PAD
	15036	Sh "4" R 110 335 0 0 0
	15037	Dr 0 0 0
	15038	At SMD N 00888000
	15039	Ne 322 "N-000177"
	15040	Po -98 -678
	15041	$EndPAD
	15042	$PAD
	15043	Sh "14" R 110 335 0 0 0
	15044	Dr 0 0 0
	15045	At SMD N 00888000
	15046	Ne 332 "N-000202"
	15047	Po 98 678
	15048	$EndPAD
	15049	$PAD
	15050	Sh "5" R 110 335 0 0 0
	15051	Dr 0 0 0
	15052	At SMD N 00888000
	15053	Ne 324 "N-000179"
	15054	Po 98 -678
	15055	$EndPAD
	15056	$PAD
	15057	Sh "13" R 110 335 0 0 0
	15058	Dr 0 0 0
	15059	At SMD N 00888000
	15060	Ne 323 "N-000178"
	15061	Po 295 678
	15062	$EndPAD
	15063	$PAD
	15064	Sh "6" R 110 335 0 0 0
	15065	Dr 0 0 0
	15066	At SMD N 00888000
	15067	Ne 324 "N-000179"
	15068	Po 295 -678
	15069	$EndPAD
	15070	$PAD
	15071	Sh "12" R 110 335 0 0 0
	15072	Dr 0 0 0
	15073	At SMD N 00888000
	15074	Ne 0 ""
	15075	Po 492 678
	15076	$EndPAD
	15077	$PAD
	15078	Sh "7" R 110 335 0 0 0
	15079	Dr 0 0 0
	15080	At SMD N 00888000
	15081	Ne 0 ""
	15082	Po 492 -678
	15083	$EndPAD
	15084	$PAD
	15085	Sh "11" R 111 335 0 0 0
	15086	Dr 0 0 0
	15087	At SMD N 00888000
	15088	Ne 292 "GND"
	15089	Po 688 678
	15090	$EndPAD
	15091	$PAD
	15092	Sh "8" R 111 335 0 0 0
	15093	Dr 0 0 0
	15094	At SMD N 00888000
	15095	Ne 0 ""
	15096	Po 688 -678
	15097	$EndPAD
	15098	$PAD
	15099	Sh "20" R 335 110 0 0 0
	15100	Dr 0 0 0
	15101	At SMD N 00888000
	15102	Ne 292 "GND"
	15103	Po -875 -295
	15104	$EndPAD
	15105	$PAD
	15106	Sh "9" R 335 110 0 0 0
	15107	Dr 0 0 0
	15108	At SMD N 00888000
	15109	Ne 0 ""
	15110	Po 875 -295
	15111	$EndPAD
	15112	$PAD
	15113	Sh "19" R 335 110 0 0 0
	15114	Dr 0 0 0
	15115	At SMD N 00888000
	15116	Ne 292 "GND"
	15117	Po -875 295
	15118	$EndPAD
	15119	$PAD
	15120	Sh "10" R 335 110 0 0 0
	15121	Dr 0 0 0
	15122	At SMD N 00888000
	15123	Ne 331 "N-000201"
	15124	Po 875 295
	15125	$EndPAD
	15126	$EndMODULE PVQFN-N20
14706	15127	$COTATION
14707	15128	Ge 0 25 0
14708	15129	Va 39410
...	...
16388	16809	De 0 0 9 0 0
16389	16810	Po 0 51919 28655 52407 29143 39 -1
16390	16811	De 0 0 9 0 0
16391		Po 0 52254 27677 52254 28545 39 -1
	16812	Po 0 52087 27530 52087 28563 39 -1
16392	16813	De 0 0 10 0 0
16393		Po 0 49757 24738 49950 24931 39 -1
	16814	Po 0 50574 25584 52077 27087 39 -1
16394	16815	De 15 0 10 0 0
16395		Po 0 49950 24931 50473 24931 39 -1
	16816	Po 0 52077 27087 52077 27520 39 -1
16396	16817	De 15 0 10 0 0
16397		Po 0 50473 24931 50684 25142 39 -1
	16818	Po 0 52077 27520 52087 27530 39 -1
16398	16819	De 15 0 10 0 0
16399		Po 0 50684 25142 50684 25506 39 -1
	16820	Po 3 52087 27530 52087 27530 157 -1
	16821	De 15 1 10 0 0
	16822	Po 0 50288 25584 50574 25584 39 -1
	16823	De 15 0 10 0 800
	16824	Po 0 55476 30436 55679 30639 39 -1
	16825	De 15 0 10 0 400
	16826	Po 0 55476 30054 55476 30436 39 -1
16400	16827	De 15 0 10 0 0
16401		Po 0 50684 25506 52254 27076 39 -1
	16828	Po 0 55465 30043 55476 30054 39 -1
16402	16829	De 15 0 10 0 0
	16830	Po 3 55465 30043 55465 30043 157 -1
	16831	De 15 1 10 0 0
	16832	Po 0 55469 30039 55465 30043 39 -1
	16833	De 0 0 10 0 0
	16834	Po 0 55469 29981 55469 30039 39 -1
	16835	De 0 0 10 0 0
	16836	Po 0 54530 29042 55469 29981 39 -1
	16837	De 0 0 10 0 0
	16838	Po 0 52566 29042 54530 29042 39 -1
	16839	De 0 0 10 0 0
	16840	Po 0 52087 28563 52566 29042 39 -1
	16841	De 0 0 10 0 0
	16842	Po 0 52254 27677 52254 28545 39 -1
	16843	De 0 0 11 0 0
	16844	Po 0 49757 24738 49950 24931 39 -1
	16845	De 15 0 11 0 0
	16846	Po 0 49950 24931 50473 24931 39 -1
	16847	De 15 0 11 0 0
	16848	Po 0 50473 24931 50684 25142 39 -1
	16849	De 15 0 11 0 0
	16850	Po 0 50684 25142 50684 25506 39 -1
	16851	De 15 0 11 0 0
	16852	Po 0 50684 25506 52254 27076 39 -1
	16853	De 15 0 11 0 0
16403	16854	Po 0 52254 27076 52254 27677 39 -1
16404		De 15 0 10 0 0
	16855	De 15 0 11 0 0
16405	16856	Po 3 52254 27677 52254 27677 157 -1
16406		De 15 1 10 0 0
	16857	De 15 1 11 0 0
16407	16858	Po 0 49757 24659 49757 24738 39 -1
16408		De 15 0 10 0 800
	16859	De 15 0 11 0 800
16409	16860	Po 0 55679 29896 55679 30245 39 -1
16410		De 15 0 10 0 400
	16861	De 15 0 11 0 400
16411	16862	Po 0 55661 29878 55679 29896 39 -1
16412		De 15 0 10 0 0
	16863	De 15 0 11 0 0
16413	16864	Po 3 55661 29878 55661 29878 157 -1
16414		De 15 1 10 0 0
	16865	De 15 1 11 0 0
16415	16866	Po 0 55661 29854 55661 29878 39 -1
16416		De 0 0 10 0 0
	16867	De 0 0 11 0 0
16417	16868	Po 0 54740 28933 55661 29854 39 -1
16418		De 0 0 10 0 0
	16869	De 0 0 11 0 0
16419	16870	Po 0 52642 28933 54740 28933 39 -1
16420		De 0 0 10 0 0
	16871	De 0 0 11 0 0
16421	16872	Po 0 52254 28545 52642 28933 39 -1
16422		De 0 0 10 0 0
	16873	De 0 0 11 0 0
16423	16874	Po 0 49855 24130 49846 24130 79 -1
16424		De 0 0 11 0 800
	16875	De 0 0 12 0 800
16425	16876	Po 0 49846 24130 49764 24212 79 -1
16426		De 0 0 11 0 0
	16877	De 0 0 12 0 0
16427	16878	Po 0 49560 24659 49560 24421 79 -1
16428		De 15 0 11 0 800
	16879	De 15 0 12 0 800
16429	16880	Po 0 49764 24212 49764 24209 79 -1
16430		De 0 0 11 0 0
	16881	De 0 0 12 0 0
16431	16882	Po 0 49657 24319 49764 24212 79 -1
16432		De 0 0 11 0 0
	16883	De 0 0 12 0 0
16433	16884	Po 3 49657 24319 49657 24319 157 -1
16434		De 15 1 11 0 0
	16885	De 15 1 12 0 0
16435	16886	Po 0 49657 24324 49657 24319 79 -1
16436		De 15 0 11 0 0
	16887	De 15 0 12 0 0
16437	16888	Po 0 49560 24421 49657 24324 79 -1
16438		De 15 0 11 0 0
	16889	De 15 0 12 0 0
16439	16890	Po 0 49363 24659 49363 24987 79 -1
16440		De 15 0 12 0 800
	16891	De 15 0 13 0 800
16441	16892	Po 0 49241 24143 49241 24124 79 -1
16442		De 0 0 12 0 400
	16893	De 0 0 13 0 400
16443	16894	Po 0 49360 24262 49241 24143 79 -1
16444		De 0 0 12 0 0
	16895	De 0 0 13 0 0
16445	16896	Po 0 49360 24970 49360 24262 79 -1
16446		De 0 0 12 0 0
	16897	De 0 0 13 0 0
16447	16898	Po 3 49360 24970 49360 24970 157 -1
16448		De 15 1 12 0 0
	16899	De 15 1 13 0 0
16449	16900	Po 0 49360 24984 49360 24970 79 -1
16450		De 15 0 12 0 0
	16901	De 15 0 13 0 0
16451	16902	Po 0 49363 24987 49360 24984 79 -1
16452		De 15 0 12 0 0
16453		Po 0 47515 26665 47515 27059 118 -1
16454		De 0 0 13 0 C00
16455		Po 0 47062 27157 47354 27157 118 -1
16456		De 15 0 13 0 800
16457		Po 0 47468 27059 47515 27059 118 -1
16458		De 0 0 13 0 400
16459		Po 0 47362 27165 47468 27059 118 -1
16460		De 0 0 13 0 0
16461		Po 3 47362 27165 47362 27165 157 -1
16462		De 15 1 13 0 0
16463		Po 0 47354 27157 47362 27165 118 -1
16464	16903	De 15 0 13 0 0
16465		Po 0 53917 30394 53917 30452 39 -1
16466		De 15 0 14 0 0
16467		Po 0 53917 30452 54104 30639 39 -1
16468		De 15 0 14 0 400
16469		Po 0 50666 29004 51040 29378 39 -1
16470		De 15 0 14 0 0
16471		Po 0 50312 28650 50666 29004 39 -1
16472		De 15 0 14 0 0
16473		Po 0 49803 28650 50312 28650 39 -1
16474		De 15 0 14 0 0
16475		Po 0 53917 30394 53917 30354 39 -1
16476		De 15 0 14 0 0
16477		Po 0 53917 30058 53917 30394 39 -1
16478		De 15 0 14 0 0
16479		Po 0 53237 29378 53917 30058 39 -1
16480		De 15 0 14 0 0
16481		Po 0 51040 29378 53237 29378 39 -1
16482		De 15 0 14 0 0
16483		Po 0 48577 27885 48577 28348 39 -1
	16904	Po 3 54301 31220 54301 31220 157 -1
	16905	De 15 1 14 0 0
	16906	Po 0 53249 29449 53888 30088 39 -1
	16907	De 3 0 14 0 0
	16908	Po 0 53888 30088 53888 30807 39 -1
	16909	De 3 0 14 0 0
	16910	Po 0 53888 30807 54301 31220 39 -1
	16911	De 3 0 14 0 0
	16912	Po 0 47790 27885 47790 28263 39 -1
16484	16913	De 15 0 14 0 800
16485		Po 0 48879 28650 49803 28650 39 -1
16486		De 15 0 14 0 0
16487		Po 0 49803 28650 49806 28650 39 -1
	16914	Po 0 51220 29449 51299 29449 39 -1
	16915	De 3 0 14 0 0
	16916	Po 0 50472 28701 51220 29449 39 -1
	16917	De 3 0 14 0 0
	16918	Po 0 48228 28701 50472 28701 39 -1
	16919	De 3 0 14 0 0
	16920	Po 0 47913 28386 48228 28701 39 -1
	16921	De 3 0 14 0 0
	16922	Po 3 47913 28386 47913 28386 157 -1
	16923	De 15 1 14 0 0
	16924	Po 0 47790 28263 47913 28386 39 -1
16488	16925	De 15 0 14 0 0
16489		Po 0 48577 28348 48879 28650 39 -1
	16926	Po 0 51299 29449 53249 29449 39 -1
	16927	De 3 0 14 0 0
	16928	Po 0 54498 31417 54498 31426 39 -1
	16929	De 15 0 14 0 400
	16930	Po 0 54301 31220 54498 31417 39 -1
16490	16931	De 15 0 14 0 0
16491		Po 0 53524 30315 53642 30433 39 -1
16492		De 15 0 15 0 0
16493		Po 0 53150 29606 53524 29980 39 -1
16494		De 15 0 15 0 0
16495		Po 0 53524 29980 53524 30315 39 -1
16496		De 15 0 15 0 0
16497		Po 0 50984 29606 50865 29487 39 -1
16498		De 15 0 15 0 0
16499		Po 0 48184 27885 48184 28239 39 -1
	16932	Po 0 47361 27878 47361 28070 39 -1
	16933	De 0 0 15 0 800
	16934	Po 0 47361 28070 47677 28386 39 -1
	16935	De 0 0 15 0 0
	16936	Po 0 47628 28337 47677 28386 39 -1
	16937	De 0 0 15 0 0
	16938	Po 0 54104 31426 54017 31339 39 -1
16500	16939	De 15 0 15 0 800
16501		Po 0 50230 28852 50481 29103 39 -1
16502		De 15 0 15 0 0
16503		Po 0 48797 28852 50230 28852 39 -1
16504		De 15 0 15 0 0
16505		Po 0 48184 28239 48797 28852 39 -1
16506		De 15 0 15 0 0
16507		Po 0 50865 29487 50481 29103 39 -1
16508		De 15 0 15 0 0
16509		Po 0 50984 29606 53150 29606 39 -1
	16940	Po 0 51291 29550 53113 29550 39 -1
	16941	De 3 0 15 0 0
	16942	Po 0 47593 28302 47677 28386 39 -1
16510	16943	De 15 0 15 0 0
16511		Po 0 53878 30806 54104 31032 39 -1
	16944	Po 3 47677 28386 47677 28386 157 -1
	16945	De 15 1 15 0 0
	16946	Po 0 47677 28386 48093 28802 39 -1
	16947	De 3 0 15 0 0
	16948	Po 0 48093 28802 50431 28802 39 -1
	16949	De 3 0 15 0 0
	16950	Po 0 50431 28802 51179 29550 39 -1
	16951	De 3 0 15 0 0
	16952	Po 0 51179 29550 51291 29550 39 -1
	16953	De 3 0 15 0 0
	16954	Po 0 47593 28302 47593 27885 39 -1
16512	16955	De 15 0 15 0 400
16513		Po 0 53878 30571 53878 30806 39 -1
16514		De 15 0 15 0 0
16515		Po 0 53740 30433 53878 30571 39 -1
	16956	Po 3 53898 31220 53898 31220 157 -1
	16957	De 15 1 15 0 0
	16958	Po 0 53720 31042 53898 31220 39 -1
	16959	De 3 0 15 0 0
	16960	Po 0 53720 30157 53720 31042 39 -1
	16961	De 3 0 15 0 0
	16962	Po 0 53113 29550 53720 30157 39 -1
	16963	De 3 0 15 0 0
	16964	Po 0 53997 31319 53898 31220 39 -1
16516	16965	De 15 0 15 0 0
16517		Po 0 53642 30433 53740 30433 39 -1
	16966	Po 0 54017 31339 53997 31319 39 -1
16518	16967	De 15 0 15 0 0
16519		Po 0 53110 30728 53110 30748 39 -1
16520		De 15 0 16 0 0
16521		Po 0 53110 30748 53208 30846 39 -1
16522		De 15 0 16 0 0
16523		Po 0 53525 30846 53711 31032 39 -1
16524		De 15 0 16 0 400
16525		Po 0 53208 30846 53525 30846 39 -1
16526		De 15 0 16 0 0
16527		Po 0 52520 29724 52697 29724 39 -1
16528		De 15 0 16 0 0
16529		Po 0 51536 29724 52520 29724 39 -1
16530		De 15 0 16 0 0
16531		Po 0 48756 28953 50174 28953 39 -1
16532		De 15 0 16 0 0
16533		Po 0 47996 28193 47996 27894 39 -1
16534		De 15 0 16 0 0
16535		Po 0 48756 28953 47996 28193 39 -1
16536		De 15 0 16 0 0
16537		Po 0 47987 27885 47996 27894 39 -1
	16968	Po 0 47515 26665 47515 27059 118 -1
	16969	De 0 0 16 0 C00
	16970	Po 0 47062 27157 47354 27157 118 -1
16538	16971	De 15 0 16 0 800
16539		Po 0 50174 28953 50945 29724 39 -1
16540		De 15 0 16 0 0
16541		Po 0 50945 29724 51536 29724 39 -1
16542		De 15 0 16 0 0
16543		Po 0 53110 30137 53110 30728 39 -1
16544		De 15 0 16 0 0
16545		Po 0 52697 29724 53110 30137 39 -1
	16972	Po 0 47468 27059 47515 27059 118 -1
	16973	De 0 0 16 0 400
	16974	Po 0 47362 27165 47468 27059 118 -1
	16975	De 0 0 16 0 0
	16976	Po 3 47362 27165 47362 27165 157 -1
	16977	De 15 1 16 0 0
	16978	Po 0 47354 27157 47362 27165 118 -1
16546	16979	De 15 0 16 0 0
16547		Po 0 54695 30837 54696 30837 39 -1
16548		De 3 0 17 0 0
16549		Po 0 50513 26960 50945 27392 39 -1
	16980	Po 0 54370 30167 54370 30168 39 -1
16550	16981	De 15 0 17 0 0
16551		Po 0 50945 27392 50945 28021 39 -1
	16982	Po 0 54447 30245 54498 30245 39 -1
	16983	De 15 0 17 0 400
	16984	Po 0 54370 30168 54447 30245 39 -1
16552	16985	De 15 0 17 0 0
16553		Po 0 50945 28021 50955 28031 39 -1
	16986	Po 0 53346 29163 53366 29163 39 -1
16554	16987	De 15 0 17 0 0
16555		Po 3 50955 28031 50955 28031 157 -1
16556		De 15 1 17 0 0
16557		Po 0 50955 28031 51920 28996 39 -1
16558		De 3 0 17 0 0
16559		Po 0 51920 28996 53426 28996 39 -1
16560		De 3 0 17 0 0
16561		Po 0 53426 28996 54685 30255 39 -1
16562		De 3 0 17 0 0
16563		Po 0 54685 30255 54685 30827 39 -1
16564		De 3 0 17 0 0
16565		Po 0 54685 30827 54695 30837 39 -1
16566		De 3 0 17 0 0
16567		Po 0 50288 26960 50513 26960 39 -1
	16988	Po 0 53366 29163 54370 30167 39 -1
	16989	De 15 0 17 0 0
	16990	Po 0 54370 30167 54360 30157 39 -1
	16991	De 15 0 17 0 0
	16992	Po 0 49363 27885 49363 28152 39 -1
16568	16993	De 15 0 17 0 800
16569		Po 0 54891 31032 54892 31032 39 -1
16570		De 15 0 17 0 400
16571		Po 0 54715 30856 54891 31032 39 -1
	16994	Po 0 51121 29163 53346 29163 39 -1
16572	16995	De 15 0 17 0 0
16573		Po 3 54715 30856 54715 30856 157 -1
16574		De 15 1 17 0 0
16575		Po 0 54696 30837 54715 30856 39 -1
16576		De 3 0 17 0 0
16577		Po 0 55512 31260 55513 31260 39 -1
	16996	Po 0 53346 29163 53336 29163 39 -1
	16997	De 15 0 17 0 0
	16998	Po 0 50373 28415 51121 29163 39 -1
	16999	De 15 0 17 0 0
	17000	Po 0 49626 28415 50373 28415 39 -1
	17001	De 15 0 17 0 0
	17002	Po 0 49363 28152 49626 28415 39 -1
	17003	De 15 0 17 0 0
	17004	Po 0 54055 30039 54075 30059 39 -1
16578	17005	De 15 0 18 0 0
16579		Po 0 55513 31260 55679 31426 39 -1
	17006	Po 0 51052 29248 51082 29278 39 -1
	17007	De 15 0 18 0 0
	17008	Po 0 51082 29278 53293 29278 39 -1
	17009	De 15 0 18 0 0
	17010	Po 0 53293 29278 54054 30039 39 -1
	17011	De 15 0 18 0 0
	17012	Po 0 54054 30039 54055 30039 39 -1
	17013	De 15 0 18 0 0
	17014	Po 0 50610 28806 51052 29248 39 -1
	17015	De 15 0 18 0 0
	17016	Po 0 54104 30089 54104 30245 39 -1
16580	17017	De 15 0 18 0 400
	17018	Po 0 54075 30060 54104 30089 39 -1
	17019	De 15 0 18 0 0
	17020	Po 0 54075 30059 54075 30060 39 -1
	17021	De 15 0 18 0 0
	17022	Po 0 49166 27885 49166 28199 39 -1
	17023	De 15 0 18 0 800
	17024	Po 0 50347 28543 50610 28806 39 -1
	17025	De 15 0 18 0 0
	17026	Po 0 50610 28806 50601 28797 39 -1
	17027	De 15 0 18 0 0
	17028	Po 0 49510 28543 50347 28543 39 -1
	17029	De 15 0 18 0 0
	17030	Po 0 49166 28199 49510 28543 39 -1
	17031	De 15 0 18 0 0
	17032	Po 0 55512 31260 55513 31260 39 -1
	17033	De 15 0 19 0 0
	17034	Po 0 55513 31260 55679 31426 39 -1
	17035	De 15 0 19 0 400
16581	17036	Po 0 51378 28957 51379 28957 39 -1
16582		De 0 0 18 0 0
	17037	De 0 0 19 0 0
16583	17038	Po 0 55492 31240 55512 31260 39 -1
16584		De 15 0 18 0 0
	17039	De 15 0 19 0 0
16585	17040	Po 0 55512 31260 55502 31250 39 -1
16586		De 15 0 18 0 0
	17041	De 15 0 19 0 0
16587	17042	Po 3 55492 31240 55492 31240 157 -1
16588		De 15 1 18 0 0
	17043	De 15 1 19 0 0
16589	17044	Po 0 55482 31240 55492 31240 39 -1
16590		De 0 0 18 0 0
	17045	De 0 0 19 0 0
16591	17046	Po 0 55295 31053 55482 31240 39 -1
16592		De 0 0 18 0 0
	17047	De 0 0 19 0 0
16593	17048	Po 0 54655 31053 55295 31053 39 -1
16594		De 0 0 18 0 0
	17049	De 0 0 19 0 0
16595	17050	Po 0 54528 30926 54655 31053 39 -1
16596		De 0 0 18 0 0
	17051	De 0 0 19 0 0
16597	17052	Po 0 54528 30296 54528 30926 39 -1
16598		De 0 0 18 0 0
	17053	De 0 0 19 0 0
16599	17054	Po 0 53779 29547 54528 30296 39 -1
16600		De 0 0 18 0 0
16601		Po 0 51969 29547 53779 29547 39 -1
16602		De 0 0 18 0 0
16603		Po 0 51379 28957 51969 29547 39 -1
16604		De 0 0 18 0 0
16605		Po 0 51260 27687 51260 27766 39 -1
16606		De 0 0 18 0 0
16607		Po 0 50288 26567 50523 26567 39 -1
16608		De 15 0 18 0 800
16609		Po 3 51260 27687 51260 27687 157 -1
16610		De 15 1 18 0 0
16611		Po 0 51260 27304 51260 27687 39 -1
16612		De 15 0 18 0 0
16613		Po 0 50523 26567 51260 27304 39 -1
16614		De 15 0 18 0 0
16615		Po 0 51280 28859 51378 28957 39 -1
16616		De 0 0 18 0 0
16617		Po 0 51378 28957 51378 28957 39 -1
16618		De 0 0 18 0 0
16619		Po 0 51280 27786 51280 28859 39 -1
16620		De 0 0 18 0 0
16621		Po 0 51260 27766 51280 27786 39 -1
16622		De 0 0 18 0 0
16623		Po 0 55488 30846 55493 30846 39 -1
16624		De 15 0 19 0 0
16625		Po 0 55493 30846 55679 31032 39 -1
16626		De 15 0 19 0 400
16627		Po 0 54756 30004 54756 30008 39 -1
16628	17055	De 0 0 19 0 0
16629		Po 0 51585 28737 52193 29345 39 -1
	17056	Po 0 51969 29547 53779 29547 39 -1
16630	17057	De 0 0 19 0 0
16631		Po 0 52193 29345 54097 29345 39 -1
	17058	Po 0 51379 28957 51969 29547 39 -1
16632	17059	De 0 0 19 0 0
16633		Po 0 54097 29345 54756 30004 39 -1
	17060	Po 0 51260 27687 51260 27766 39 -1
16634	17061	De 0 0 19 0 0
16635		Po 0 50288 26174 50599 26174 39 -1
	17062	Po 0 50288 26567 50523 26567 39 -1
16636	17063	De 15 0 19 0 800
16637		Po 3 51585 27697 51585 27697 157 -1
	17064	Po 3 51260 27687 51260 27687 157 -1
16638	17065	De 15 1 19 0 0
16639		Po 0 51585 27160 51585 27697 39 -1
16640		De 15 0 19 0 0
16641		Po 0 50599 26174 51585 27160 39 -1
16642		De 15 0 19 0 0
16643		Po 0 51585 27697 51585 28737 39 -1
16644		De 0 0 19 0 0
16645		Po 0 55496 30838 55496 30835 39 -1
	17066	Po 0 51260 27304 51260 27687 39 -1
16646	17067	De 15 0 19 0 0
16647		Po 0 55488 30846 55496 30838 39 -1
	17068	Po 0 50523 26567 51260 27304 39 -1
16648	17069	De 15 0 19 0 0
16649		Po 3 55488 30846 55488 30846 157 -1
16650		De 15 1 19 0 0
16651		Po 0 55480 30846 55488 30846 39 -1
16652		De 0 0 19 0 0
16653		Po 0 55480 30531 55480 30846 39 -1
	17070	Po 0 51280 28859 51378 28957 39 -1
16654	17071	De 0 0 19 0 0
16655		Po 0 55189 30240 55480 30531 39 -1
	17072	Po 0 51378 28957 51378 28957 39 -1
16656	17073	De 0 0 19 0 0
16657		Po 0 54988 30240 55189 30240 39 -1
	17074	Po 0 51280 27786 51280 28859 39 -1
16658	17075	De 0 0 19 0 0
16659		Po 0 54756 30008 54988 30240 39 -1
	17076	Po 0 51260 27766 51280 27786 39 -1
16660	17077	De 0 0 19 0 0
16661	17078	Po 0 51752 27530 51752 28646 39 -1
16662	17079	De 0 0 20 0 0
...	...
16852	17269	De 15 0 27 0 0
16853	17270	Po 0 58827 36237 58944 36354 39 -1
16854	17271	De 15 0 27 0 0
16855		Po 0 58040 35800 58201 35961 39 -1
16856		De 15 0 28 0 0
16857		Po 3 58201 35961 58201 35961 157 -1
16858		De 15 1 28 0 0
16859		Po 0 58201 35961 58224 35984 39 -1
16860		De 2 0 28 0 0
16861		Po 0 58224 35984 58224 36107 39 -1
16862		De 2 0 28 0 0
16863		Po 0 58224 36107 58185 36146 39 -1
16864		De 2 0 28 0 0
16865		Po 0 58185 36146 57390 36146 39 -1
16866		De 2 0 28 0 0
16867		Po 0 57390 36146 57283 36039 39 -1
16868		De 2 0 28 0 0
16869		Po 0 57283 36039 57283 35960 39 -1
16870		De 2 0 28 0 0
16871		Po 0 57283 35960 57173 35850 39 -1
16872		De 2 0 28 0 0
16873		Po 0 57173 35850 57012 35850 39 -1
	17272	Po 0 59520 44016 59520 44422 39 -1
16874	17273	De 2 0 28 0 0
16875		Po 0 57012 35850 56488 36374 39 -1
	17274	Po 0 59449 38071 59449 38638 39 -1
	17275	De 15 0 28 0 0
	17276	Po 0 59614 42063 59520 42157 39 -1
16876	17277	De 2 0 28 0 0
16877		Po 0 56488 36374 56488 38362 39 -1
	17278	Po 0 59520 42157 59520 44016 39 -1
16878	17279	De 2 0 28 0 0
16879		Po 0 56488 38362 56169 38681 39 -1
	17280	Po 0 59118 40236 59118 41232 39 -1
	17281	De 15 0 28 0 0
	17282	Po 0 59449 38638 59118 38969 39 -1
	17283	De 15 0 28 0 0
	17284	Po 0 59118 38969 59118 40236 39 -1
	17285	De 15 0 28 0 0
	17286	Po 0 59221 37107 59457 37343 39 -1
	17287	De 15 0 28 0 0
	17288	Po 0 59457 37343 59457 37811 39 -1
	17289	De 15 0 28 0 0
	17290	Po 0 59457 37811 59520 37874 39 -1
	17291	De 15 0 28 0 0
	17292	Po 0 59520 37874 59520 38000 39 -1
	17293	De 15 0 28 0 0
	17294	Po 0 59520 38000 59449 38071 39 -1
	17295	De 15 0 28 0 0
	17296	Po 0 59221 37107 59221 36936 39 -1
	17297	De 15 0 28 0 400
	17298	Po 3 59614 41728 59614 41728 157 -1
	17299	De 15 1 28 0 0
	17300	Po 0 59118 41232 59614 41728 39 -1
	17301	De 15 0 28 0 0
	17302	Po 0 59614 41728 59614 42063 39 -1
16880	17303	De 2 0 28 0 0
16881		Po 0 58040 35755 58040 35800 39 -1
16882		De 15 0 28 0 800
	17304	Po 0 58927 40232 58927 41466 39 -1
	17305	De 15 0 29 0 0
	17306	Po 0 58976 38776 58927 38825 39 -1
	17307	De 15 0 29 0 0
	17308	Po 0 58927 38825 58927 40232 39 -1
	17309	De 15 0 29 0 0
	17310	Po 0 58976 38776 58976 38646 39 -1
	17311	De 15 0 29 0 0
	17312	Po 3 59189 41728 59189 41728 157 -1
	17313	De 15 1 29 0 0
	17314	Po 0 58927 41466 59189 41728 39 -1
	17315	De 15 0 29 0 0
	17316	Po 0 58827 36936 58827 37130 39 -1
	17317	De 15 0 29 0 800
	17318	Po 0 58976 37606 58976 38646 39 -1
	17319	De 15 0 29 0 0
	17320	Po 0 58846 37476 58976 37606 39 -1
	17321	De 15 0 29 0 0
	17322	Po 0 58775 37476 58846 37476 39 -1
	17323	De 15 0 29 0 0
	17324	Po 0 58681 37382 58775 37476 39 -1
	17325	De 15 0 29 0 0
	17326	Po 0 58681 37276 58681 37382 39 -1
	17327	De 15 0 29 0 0
	17328	Po 0 58827 37130 58681 37276 39 -1
	17329	De 15 0 29 0 0
	17330	Po 0 58976 38646 58976 38748 39 -1
	17331	De 15 0 29 0 0
16883	17332	Po 0 59842 43992 59842 44582 39 -1
16884		De 2 0 29 0 0
	17333	De 2 0 30 0 0
16885	17334	Po 0 58434 37375 58587 37528 39 -1
16886		De 15 0 29 0 0
	17335	De 15 0 30 0 0
16887	17336	Po 3 58587 37528 58587 37528 157 -1
16888		De 15 1 29 0 0
	17337	De 15 1 30 0 0
16889	17338	Po 0 58587 37528 59012 37953 39 -1
16890		De 2 0 29 0 0
	17339	De 2 0 30 0 0
16891	17340	Po 0 59012 37953 59012 40146 39 -1
16892		De 2 0 29 0 0
	17341	De 2 0 30 0 0
16893	17342	Po 0 59846 43988 59842 43992 39 -1
16894		De 2 0 29 0 0
	17343	De 2 0 30 0 0
16895	17344	Po 0 58434 37330 58434 37375 39 -1
16896		De 15 0 29 0 800
	17345	De 15 0 30 0 800
16897	17346	Po 0 59012 40146 59846 40980 39 -1
16898		De 2 0 29 0 0
	17347	De 2 0 30 0 0
16899	17348	Po 0 59846 40980 59846 43988 39 -1
16900		De 2 0 29 0 0
	17349	De 2 0 30 0 0
16901	17350	Po 0 57646 36936 57826 36936 39 -1
16902		De 15 0 30 0 800
	17351	De 15 0 31 0 800
16903	17352	Po 0 58472 42315 58701 42544 39 -1
16904		De 2 0 30 0 0
	17353	De 2 0 31 0 0
16905	17354	Po 0 58472 41922 58472 42315 39 -1
16906		De 2 0 30 0 0