Root/kicad/xue-rnc/xue-rnc.sch

Source at commit 1deb259 created 13 years 5 months ago.
By Juan64Bits, Placing image sensor and sources
1EESchema Schematic File Version 2 date Tue 05 Oct 2010 10:46:54 AM COT
2LIBS:power
3LIBS:r_pack2
4LIBS:v0402mhs03
5LIBS:usb-48204-0001
6LIBS:microsmd075f
7LIBS:mic2550
8LIBS:rj45-48025
9LIBS:xue-nv
10LIBS:xc6slx75fgg484
11LIBS:xc6slx45fgg484
12LIBS:micron_mobile_ddr
13LIBS:micron_ddr_512Mb
14LIBS:k8001
15LIBS:device
16LIBS:transistors
17LIBS:conn
18LIBS:linear
19LIBS:regul
20LIBS:74xx
21LIBS:cmos4000
22LIBS:adc-dac
23LIBS:memory
24LIBS:xilinx
25LIBS:special
26LIBS:microcontrollers
27LIBS:dsp
28LIBS:microchip
29LIBS:analog_switches
30LIBS:motorola
31LIBS:texas
32LIBS:intel
33LIBS:audio
34LIBS:interface
35LIBS:digital-audio
36LIBS:philips
37LIBS:display
38LIBS:cypress
39LIBS:siliconi
40LIBS:opto
41LIBS:atmel
42LIBS:contrib
43LIBS:valves
44LIBS:pasives-connectors
45LIBS:x25x64mb
46LIBS:attiny
47LIBS:PSU
48LIBS:tps793xx
49LIBS:reg102
50LIBS:mt9m033
51LIBS:xue-rnc-cache
52EELAYER 24 0
53EELAYER END
54$Descr A3 16535 11700
55Sheet 1 11
56Title ""
57Date "5 oct 2010"
58Rev ""
59Comp ""
60Comment1 ""
61Comment2 ""
62Comment3 ""
63Comment4 ""
64$EndDescr
65NoConn ~ 3150 8450
66Wire Wire Line
67    4950 8600 5950 8600
68Wire Wire Line
69    4950 8400 5950 8400
70Wire Wire Line
71    5950 7400 4950 7400
72Wire Wire Line
73    4950 8200 5950 8200
74Wire Wire Line
75    4950 8000 5950 8000
76Wire Wire Line
77    4950 7800 5950 7800
78Wire Wire Line
79    5950 7600 4950 7600
80Wire Wire Line
81    3150 9050 3400 9050
82Wire Wire Line
83    3150 8750 3400 8750
84Wire Wire Line
85    10600 1950 9250 1950
86Wire Wire Line
87    10600 1750 9250 1750
88Wire Wire Line
89    10600 1550 9250 1550
90Wire Wire Line
91    4950 6650 5950 6650
92Wire Wire Line
93    5950 6450 4950 6450
94Wire Bus Line
95    10650 9150 9300 9150
96Wire Wire Line
97    10650 8100 9300 8100
98Wire Wire Line
99    10650 8500 9300 8500
100Wire Wire Line
101    9300 8200 10650 8200
102Wire Wire Line
103    10600 5850 9300 5850
104Wire Bus Line
105    9300 7750 10650 7750
106Wire Wire Line
107    9300 7550 10650 7550
108Wire Wire Line
109    10600 1350 9250 1350
110Wire Wire Line
111    10600 1150 9250 1150
112Wire Wire Line
113    10600 950 9250 950
114Wire Wire Line
115    9300 6850 10600 6850
116Wire Wire Line
117    9300 6450 10600 6450
118Wire Wire Line
119    10600 5950 9300 5950
120Wire Wire Line
121    9300 5550 10600 5550
122Wire Bus Line
123    4700 1300 5950 1300
124Wire Wire Line
125    4700 950 5950 950
126Wire Wire Line
127    4700 1900 5950 1900
128Wire Wire Line
129    4700 2050 5950 2050
130Wire Wire Line
131    4700 2400 5950 2400
132Wire Wire Line
133    4700 4100 5950 4100
134Wire Wire Line
135    4700 4700 5950 4700
136Wire Bus Line
137    4700 3400 5950 3400
138Wire Wire Line
139    4700 4450 5950 4450
140Wire Wire Line
141    4700 3850 5950 3850
142Wire Wire Line
143    4700 3550 5950 3550
144Wire Bus Line
145    4700 1200 5950 1200
146Wire Wire Line
147    5950 2250 4700 2250
148Wire Wire Line
149    4700 4300 5950 4300
150Wire Bus Line
151    5950 3250 5950 3200
152Wire Bus Line
153    5950 3200 4700 3200
154Wire Wire Line
155    4700 4200 5950 4200
156Wire Wire Line
157    4700 2150 5950 2150
158Wire Bus Line
159    4700 3300 5950 3300
160Wire Wire Line
161    4700 3950 5950 3950
162Wire Wire Line
163    4700 3650 5950 3650
164Wire Wire Line
165    4700 4550 5950 4550
166Wire Wire Line
167    4700 3050 5950 3050
168Wire Wire Line
169    4700 2500 5950 2500
170Wire Wire Line
171    4700 2650 5950 2650
172Wire Wire Line
173    4700 1800 5950 1800
174Wire Wire Line
175    4700 1600 5950 1600
176Wire Wire Line
177    4700 1500 5950 1500
178Wire Bus Line
179    4700 1100 5950 1100
180Wire Wire Line
181    9300 5400 10600 5400
182Wire Wire Line
183    9300 5650 10600 5650
184Wire Wire Line
185    9300 6050 10600 6050
186Wire Wire Line
187    9300 6350 10600 6350
188Wire Wire Line
189    9300 6550 10600 6550
190Wire Wire Line
191    9300 6750 10600 6750
192Wire Wire Line
193    9300 6950 10600 6950
194Wire Wire Line
195    10600 1050 9250 1050
196Wire Wire Line
197    10600 1250 9250 1250
198Wire Bus Line
199    9300 6650 10600 6650
200Wire Bus Line
201    10600 6250 9300 6250
202Wire Wire Line
203    9300 7650 10650 7650
204Wire Wire Line
205    10600 5750 9300 5750
206Wire Bus Line
207    10650 8700 9300 8700
208Wire Wire Line
209    10650 8300 9300 8300
210Wire Wire Line
211    10650 8400 9300 8400
212Wire Wire Line
213    10650 8600 9300 8600
214Wire Wire Line
215    10650 8950 9300 8950
216Wire Wire Line
217    10650 9050 9300 9050
218Wire Wire Line
219    5950 6550 4950 6550
220Wire Wire Line
221    5950 6750 4950 6750
222Wire Wire Line
223    10600 1650 9250 1650
224Wire Wire Line
225    10600 1850 9250 1850
226Wire Wire Line
227    3150 8600 3400 8600
228Wire Wire Line
229    3150 8900 3400 8900
230Wire Wire Line
231    3150 9200 3400 9200
232Wire Bus Line
233    5950 9000 4950 9000
234Wire Wire Line
235    4950 7700 5950 7700
236Wire Wire Line
237    5950 7900 4950 7900
238Wire Wire Line
239    4950 8100 5950 8100
240Wire Wire Line
241    4950 8300 5950 8300
242Wire Wire Line
243    4950 7500 5950 7500
244Wire Wire Line
245    4950 8500 5950 8500
246$Sheet
247S 3400 7300 1550 2050
248U 4C9E2AF4
249F0 "Image Sensor" 60
250F1 "sensor.sch" 60
251F2 "+2.8_VDDIO" B L 3400 8750 60
252F3 "+1.8_VDD" B L 3400 8900 60
253F4 "+2.8_VAA" B L 3400 9200 60
254F5 "+2.8_VAAPIX" B L 3400 9050 60
255F6 "+2.8_VDDPLL" B L 3400 8600 60
256F7 "IS_TRIGGER" I R 4950 7400 60
257F8 "IS_FLASH" O R 4950 7500 60
258F9 "IS_SDA" B R 4950 7600 60
259F10 "IS_SCL" B R 4950 7700 60
260F11 "IS_I2C_ADDR" I R 4950 7800 60
261F12 "IS_EXTCLK" I R 4950 7900 60
262F13 "IS_RESET_N" I R 4950 8000 60
263F14 "IS_OE_N" I R 4950 8100 60
264F15 "IS_STANDBY" I R 4950 8200 60
265F16 "IS_TEST" I R 4950 8300 60
266F17 "IS_PIXEL" O R 4950 8400 60
267F18 "IS_LINE" O R 4950 8500 60
268F19 "IS_FRAME" O R 4950 8600 60
269F20 "IS_DOUT[0..11]" O R 4950 9000 60
270$EndSheet
271$Sheet
272S 2050 8300 1100 1000
273U 4C9E2B0F
274F0 "Snesor PSU" 60
275F1 "sensor_psu.sch" 60
276F2 "+3.3_VDD" B R 3150 8450 60
277F3 "+2.8_VDDPLL" B R 3150 8600 60
278F4 "+2.8_VDDIO" B R 3150 8750 60
279F5 "+1.8_VDD" B R 3150 8900 60
280F6 "+2.8_VAAPIX" B R 3150 9050 60
281F7 "+2.8_VAA" B R 3150 9200 60
282$EndSheet
283$Sheet
284S 5950 5150 3350 4350
285U 4C7BC2B2
286F0 "FPGA, Port0, Port2, PROG IF" 60
287F1 "FPGA_0_2_PROG.sch" 60
288F2 "S6_TCK" I L 5950 6450 60
289F3 "S6_TDI" I L 5950 6550 60
290F4 "S6_TDO" O L 5950 6650 60
291F5 "S6_TMS" I L 5950 6750 60
292F6 "PROG_MISO[0..3]" B R 9300 9150 60
293F7 "PROG_CCLK" O R 9300 9050 60
294F8 "PROG_CSO" O R 9300 8950 60
295F9 "NF_D[0..7]" B R 9300 8700 60
296F10 "ETH_COL" B R 9300 5850 60
297F11 "ETH_CRS" B R 9300 5750 60
298F12 "NF_WE_N" O R 9300 8400 60
299F13 "NF_ALE" O R 9300 8200 60
300F14 "NF_CLE" O R 9300 8300 60
301F15 "NF_CS1_N" O R 9300 8100 60
302F16 "NF_RE_N" O R 9300 8500 60
303F17 "NF_RNB" B R 9300 8600 60
304F18 "SD_CLK" B R 9300 7550 60
305F19 "SD_CMD" B R 9300 7650 60
306F20 "SD_DAT[0..3]" B R 9300 7750 60
307F21 "ETH_CLK" B R 9300 6950 60
308F22 "ETH_RXC" B R 9300 5550 60
309F23 "ETH_TXC" B R 9300 6550 60
310F24 "ETH_TXD[0..3]" O R 9300 6650 60
311F25 "ETH_TXEN" B R 9300 6750 60
312F26 "ETH_TXER" B R 9300 6850 60
313F27 "ETH_RXER" B R 9300 6450 60
314F28 "ETH_RXDV" B R 9300 6350 60
315F29 "ETH_RXD[0..3]" I R 9300 6250 60
316F30 "ETH_RESET_N" B R 9300 5650 60
317F31 "ETH_MDIO" B R 9300 5950 60
318F32 "ETH_MDC" B R 9300 6050 60
319F33 "ETH_INT" B R 9300 5400 60
320F34 "IS_DOUT[0..11]" I L 5950 9000 60
321F35 "IS_TEST" O L 5950 8300 60
322F36 "IS_STANDBY" O L 5950 8200 60
323F37 "IS_OE_N" O L 5950 8100 60
324F38 "IS_RESET_N" O L 5950 8000 60
325F39 "IS_EXTCLK" O L 5950 7900 60
326F40 "IS_I2C_ADDR" O L 5950 7800 60
327F41 "IS_SCL" B L 5950 7700 60
328F42 "IS_SDA" B L 5950 7600 60
329F43 "IS_FRAME" I L 5950 8600 60
330F44 "IS_LINE" I L 5950 8500 60
331F45 "IS_PIXEL" I L 5950 8400 60
332F46 "IS_FLASH" I L 5950 7500 60
333F47 "IS_TRIGGER" O L 5950 7400 60
334$EndSheet
335$Sheet
336S 5950 700 3300 4200
337U 4C7BC2A2
338F0 "FPGA Port 1, Port 3 DDR, USB" 60
339F1 "FPGA_1_3.sch" 60
340F2 "USBD_VP" B R 9250 1850 60
341F3 "USBD_SPD" B R 9250 1550 60
342F4 "USBD_OE_N" B R 9250 1650 60
343F5 "USBD_RCV" B R 9250 1750 60
344F6 "USBD_VM" B R 9250 1950 60
345F7 "M0_CKE" O L 5950 4100 60
346F8 "M0_UDM" O L 5950 3850 60
347F9 "M0_UDQS" O L 5950 3550 60
348F10 "M0_BA[0..1]" O L 5950 3400 60
349F11 "M0_CAS#" O L 5950 4450 60
350F12 "M0_RAS#" O L 5950 4550 60
351F13 "M0_WE#" O L 5950 4700 60
352F14 "M0_LDM" O L 5950 3950 60
353F15 "M0_LDQS" O L 5950 3650 60
354F16 "M1_UDQS" O L 5950 1500 60
355F17 "M1_UDM" O L 5950 1800 60
356F18 "M1_LDQS" O L 5950 1600 60
357F19 "M1_LDM" O L 5950 1900 60
358F20 "M1_WE#" O L 5950 2650 60
359F21 "M1_CKE" O L 5950 2050 60
360F22 "M1_RAS#" O L 5950 2500 60
361F23 "M1_CAS#" O L 5950 2400 60
362F24 "M1_BA[0..1]" O L 5950 1300 60
363F25 "M1_CS#" O L 5950 950 60
364F26 "USBA_VM" B R 9250 1350 60
365F27 "USBA_VP" B R 9250 1250 60
366F28 "USBA_RCV" B R 9250 1150 60
367F29 "USBA_OE_N" B R 9250 1050 60
368F30 "USBA_SPD" B R 9250 950 60
369F31 "M1_DQ[0..15]" B L 5950 1100 60
370F32 "M0_CS#" O L 5950 3050 60
371F33 "M0_DQ[0..15]" B L 5950 3200 60
372F34 "M0_A[0..12]" O L 5950 3300 60
373F35 "M1_A[0..12]" O L 5950 1200 60
374F36 "M1_CLK" O L 5950 2150 60
375F37 "M1_CLK#" O L 5950 2250 60
376F38 "M0_CLK" O L 5950 4200 60
377F39 "M0_CLK#" O L 5950 4300 60
378$EndSheet
379$Sheet
380S 3750 6400 1200 700
381U 4C716A4D
382F0 "DBG_PRG" 60
383F1 "DBG_PRG.sch" 60
384F2 "FPGA_TDO" B R 4950 6650 60
385F3 "FPGA_TDI" B R 4950 6550 60
386F4 "FPGA_TMS" B R 4950 6750 60
387F5 "FPGA_TCK" B R 4950 6450 60
388$EndSheet
389$Sheet
390S 3750 5400 1200 750
391U 4C69ED5F
392F0 "PSU" 60
393F1 "PSU.sch" 60
394$EndSheet
395$Sheet
396S 10650 7350 1050 1950
397U 4C4227FE
398F0 "Non volatile memories" 60
399F1 "NV_MEMORIES.sch" 60
400F2 "SD_CMD" I L 10650 7650 60
401F3 "SD_CLK" I L 10650 7550 60
402F4 "SD_DAT[0..3]" B L 10650 7750 60
403F5 "NF_D[0..7]" B L 10650 8700 60
404F6 "NF_ALE" B L 10650 8200 60
405F7 "NF_CLE" B L 10650 8300 60
406F8 "NF_WE_N" B L 10650 8400 60
407F9 "NF_CS1_N" B L 10650 8100 60
408F10 "NF_RE_N" B L 10650 8500 60
409F11 "NF_RNB" B L 10650 8600 60
410F12 "SPI_CLK" I L 10650 9050 60
411F13 "SPI_FLASH_CS#" I L 10650 8950 60
412F14 "SPI_DQ[0..3]" B L 10650 9150 60
413$EndSheet
414$Sheet
415S 10600 900 1100 1150
416U 4C5F1EDC
417F0 "USB" 60
418F1 "USB.sch" 60
419F2 "USBA_SPD" B L 10600 950 60
420F3 "USBA_OE_N" B L 10600 1050 60
421F4 "USBA_RCV" B L 10600 1150 60
422F5 "USBA_VP" B L 10600 1250 60
423F6 "USBA_VM" B L 10600 1350 60
424F7 "USBD_SPD" B L 10600 1550 60
425F8 "USBD_OE_N" B L 10600 1650 60
426F9 "USBD_RCV" B L 10600 1750 60
427F10 "USBD_VP" B L 10600 1850 60
428F11 "USBD_VM" B L 10600 1950 60
429$EndSheet
430Text Notes 12850 10750 0 60 ~ 0
431Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com
432$Sheet
433S 10600 5300 1300 1800
434U 4C4320F3
435F0 "Ethernet Phy" 60
436F1 "eth_phy.sch" 60
437F2 "ETH_RXC" O L 10600 5550 60
438F3 "ETH_RST_N" I L 10600 5650 60
439F4 "ETH_CRS" O L 10600 5750 60
440F5 "ETH_COL" O L 10600 5850 60
441F6 "ETH_MDIO" B L 10600 5950 60
442F7 "ETH_MDC" I L 10600 6050 60
443F8 "ETH_RXD[0..3]" O L 10600 6250 60
444F9 "ETH_RXDV" O L 10600 6350 60
445F10 "ETH_RXER" O L 10600 6450 60
446F11 "ETH_TXC" B L 10600 6550 60
447F12 "ETH_TXD[0..3]" I L 10600 6650 60
448F13 "ETH_TXEN" I L 10600 6750 60
449F14 "ETH_TXER" I L 10600 6850 60
450F15 "ETH_CLK" I L 10600 6950 60
451F16 "ETH_INT" O L 10600 5400 60
452$EndSheet
453$Sheet
454S 3600 850 1100 4000
455U 4C421DD3
456F0 "DDR Banks" 60
457F1 "DRAM.sch" 60
458F2 "M0_BA[0..1]" I R 4700 3400 60
459F3 "M1_BA[0..1]" I R 4700 1300 60
460F4 "M0_WE#" I R 4700 4700 60
461F5 "M0_RAS#" I R 4700 4550 60
462F6 "M1_RAS#" I R 4700 2500 60
463F7 "M1_WE#" I R 4700 2650 60
464F8 "M0_CAS#" I R 4700 4450 60
465F9 "M0_CKE" I R 4700 4100 60
466F10 "M0_CLK" I R 4700 4200 60
467F11 "M0_CLK#" I R 4700 4300 60
468F12 "M0_CS#" I R 4700 3050 60
469F13 "M1_CLK#" I R 4700 2250 60
470F14 "M1_CLK" I R 4700 2150 60
471F15 "M1_CKE" I R 4700 2050 60
472F16 "M1_CAS#" I R 4700 2400 60
473F17 "M0_DQ[0..15]" B R 4700 3200 60
474F18 "M0_UDM" I R 4700 3850 60
475F19 "M0_LDQS" I R 4700 3650 60
476F20 "M0_A[0..12]" I R 4700 3300 60
477F21 "M0_LDM" I R 4700 3950 60
478F22 "M0_UDQS" I R 4700 3550 60
479F23 "M1_UDQS" I R 4700 1500 60
480F24 "M1_LDM" I R 4700 1900 60
481F25 "M1_LDQS" I R 4700 1600 60
482F26 "M1_UDM" I R 4700 1800 60
483F27 "M1_CS#" I R 4700 950 60
484F28 "M1_A[0..12]" I R 4700 1200 60
485F29 "M1_DQ[0..15]" B R 4700 1100 60
486$EndSheet
487$EndSCHEMATC
488

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