Xué video camera
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Xué video camera Git Source Tree
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Source at commit b22aa62 created 13 years 7 months ago. By Juan64Bits, Ethernet-phy and USB connected to FPGA | |
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1 | # EESchema Netlist Version 1.1 created Mon 09 Aug 2010 03:31:28 PM COT |
2 | ( |
3 | ( /4C431A63/4C431E53 $noname U1 XC6SLX45FGG484 {Lib=XC6SLX45FGG484} |
4 | ( H9 N-000119 ) |
5 | ( U11 N-000119 ) |
6 | ( F11 N-000119 ) |
7 | ( R6 N-000119 ) |
8 | ( M15 N-000119 ) |
9 | ( V6 N-000119 ) |
10 | ( G12 N-000119 ) |
11 | ( H15 N-000119 ) |
12 | ( D16 N-000119 ) |
13 | ( K15 N-000119 ) |
14 | ( R12 N-000119 ) |
15 | ( N8 N-000119 ) |
16 | ( R10 N-000119 ) |
17 | ( L8 N-000119 ) |
18 | ( N10 N-000118 ) |
19 | ( P11 N-000118 ) |
20 | ( P13 N-000118 ) |
21 | ( P9 N-000118 ) |
22 | ( R14 N-000118 ) |
23 | ( N12 N-000118 ) |
24 | ( J10 N-000118 ) |
25 | ( J12 N-000118 ) |
26 | ( J14 N-000118 ) |
27 | ( J8 N-000118 ) |
28 | ( K11 N-000118 ) |
29 | ( K13 N-000118 ) |
30 | ( K9 N-000118 ) |
31 | ( L10 N-000118 ) |
32 | ( L12 N-000118 ) |
33 | ( L14 N-000118 ) |
34 | ( M11 N-000118 ) |
35 | ( M13 N-000118 ) |
36 | ( M9 N-000118 ) |
37 | ( N14 N-000118 ) |
38 | ( G13 ? ) |
39 | ( G8 ? ) |
40 | ( G9 ? ) |
41 | ( H10 ? ) |
42 | ( H11 ? ) |
43 | ( H12 ? ) |
44 | ( H13 ? ) |
45 | ( H14 ? ) |
46 | ( P16 ? ) |
47 | ( D13 ? ) |
48 | ( AA1 ? ) |
49 | ( N15 ? ) |
50 | ( G15 ? ) |
51 | ( E18 ? ) |
52 | ( A19 ? ) |
53 | ( C18 ? ) |
54 | ( G11 ? ) |
55 | ( F9 ? ) |
56 | ( F8 ? ) |
57 | ( F15 ? ) |
58 | ( F14 ? ) |
59 | ( F13 ? ) |
60 | ( F12 ? ) |
61 | ( F10 ? ) |
62 | ( E8 ? ) |
63 | ( E14 ? ) |
64 | ( E12 ? ) |
65 | ( E10 ? ) |
66 | ( D12 ? ) |
67 | ( P15 ? ) |
68 | ( R17 ? ) |
69 | ( Y22 ? ) |
70 | ( P10 GND ) |
71 | ( V10 GND ) |
72 | ( M10 GND ) |
73 | ( K10 GND ) |
74 | ( L13 GND ) |
75 | ( A1 GND ) |
76 | ( N13 GND ) |
77 | ( A22 GND ) |
78 | ( R5 GND ) |
79 | ( AA13 GND ) |
80 | ( W19 GND ) |
81 | ( AA17 GND ) |
82 | ( K14 GND ) |
83 | ( AA5 GND ) |
84 | ( L5 GND ) |
85 | ( AA9 GND ) |
86 | ( M14 GND ) |
87 | ( AB1 GND ) |
88 | ( N2 GND ) |
89 | ( AB22 GND ) |
90 | ( P14 GND ) |
91 | ( B13 GND ) |
92 | ( U21 GND ) |
93 | ( B17 GND ) |
94 | ( V4 GND ) |
95 | ( B5 GND ) |
96 | ( J9 GND ) |
97 | ( B9 GND ) |
98 | ( K12 GND ) |
99 | ( D18 GND ) |
100 | ( L11 GND ) |
101 | ( D4 GND ) |
102 | ( L18 GND ) |
103 | ( E11 GND ) |
104 | ( L9 GND ) |
105 | ( E15 GND ) |
106 | ( M12 GND ) |
107 | ( E2 GND ) |
108 | ( N11 GND ) |
109 | ( E21 GND ) |
110 | ( N17 GND ) |
111 | ( E7 GND ) |
112 | ( N21 GND ) |
113 | ( G18 GND ) |
114 | ( P12 GND ) |
115 | ( G5 GND ) |
116 | ( R18 GND ) |
117 | ( H7 GND ) |
118 | ( U2 GND ) |
119 | ( J11 GND ) |
120 | ( U7 GND ) |
121 | ( J13 GND ) |
122 | ( V14 GND ) |
123 | ( J15 GND ) |
124 | ( W16 GND ) |
125 | ( J2 GND ) |
126 | ( W7 GND ) |
127 | ( J21 GND ) |
128 | ( N9 GND ) |
129 | ( AA15 N-000123 ) |
130 | ( V16 N-000123 ) |
131 | ( T13 N-000123 ) |
132 | ( V8 N-000123 ) |
133 | ( V12 N-000123 ) |
134 | ( AA3 N-000123 ) |
135 | ( T9 N-000123 ) |
136 | ( AA19 N-000123 ) |
137 | ( AA11 N-000123 ) |
138 | ( W5 N-000123 ) |
139 | ( AA7 N-000123 ) |
140 | ( AA12 ? ) |
141 | ( AB12 ? ) |
142 | ( Y11 ? ) |
143 | ( AB11 ? ) |
144 | ( R11 ? ) |
145 | ( T11 ? ) |
146 | ( AA10 ? ) |
147 | ( AB10 ? ) |
148 | ( V11 ? ) |
149 | ( W11 ? ) |
150 | ( Y9 ? ) |
151 | ( AB9 ? ) |
152 | ( W10 ? ) |
153 | ( Y10 ? ) |
154 | ( AA8 ? ) |
155 | ( AB8 ? ) |
156 | ( W8 ? ) |
157 | ( V7 ? ) |
158 | ( W9 ? ) |
159 | ( Y8 ? ) |
160 | ( Y7 ? ) |
161 | ( AB7 ? ) |
162 | ( AA6 ? ) |
163 | ( AB6 ? ) |
164 | ( U9 ? ) |
165 | ( V9 ? ) |
166 | ( T8 ? ) |
167 | ( U8 ? ) |
168 | ( T10 ? ) |
169 | ( U10 ? ) |
170 | ( W6 ? ) |
171 | ( Y6 ? ) |
172 | ( Y5 ? ) |
173 | ( AB5 ? ) |
174 | ( AA4 ? ) |
175 | ( AB4 ? ) |
176 | ( Y3 ? ) |
177 | ( AB3 ? ) |
178 | ( R9 ? ) |
179 | ( R8 ? ) |
180 | ( T7 ? ) |
181 | ( R7 ? ) |
182 | ( W4 ? ) |
183 | ( Y4 ? ) |
184 | ( U6 ? ) |
185 | ( V5 ? ) |
186 | ( AA2 ? ) |
187 | ( AB2 ? ) |
188 | ( T6 ? ) |
189 | ( T5 ? ) |
190 | ( AB13 ? ) |
191 | ( Y13 ? ) |
192 | ( Y12 ? ) |
193 | ( W12 ? ) |
194 | ( R13 ? ) |
195 | ( T14 ? ) |
196 | ( U12 ? ) |
197 | ( T12 ? ) |
198 | ( AB15 ? ) |
199 | ( Y15 ? ) |
200 | ( Y14 ? ) |
201 | ( W14 ? ) |
202 | ( AB16 ? ) |
203 | ( AA16 ? ) |
204 | ( W13 ? ) |
205 | ( V13 ? ) |
206 | ( W15 ? ) |
207 | ( Y16 ? ) |
208 | ( AB14 ? ) |
209 | ( AA14 ? ) |
210 | ( AB17 ? ) |
211 | ( Y17 ? ) |
212 | ( AB18 ? ) |
213 | ( AA18 ? ) |
214 | ( V15 ? ) |
215 | ( U15 ? ) |
216 | ( U13 ? ) |
217 | ( U14 ? ) |
218 | ( W17 ? ) |
219 | ( V17 ? ) |
220 | ( R15 ? ) |
221 | ( R16 ? ) |
222 | ( V18 ? ) |
223 | ( V19 ? ) |
224 | ( U16 ? ) |
225 | ( U17 ? ) |
226 | ( T15 ? ) |
227 | ( T16 ? ) |
228 | ( Y18 ? ) |
229 | ( W18 ? ) |
230 | ( AB19 ? ) |
231 | ( Y19 ? ) |
232 | ( T17 ? ) |
233 | ( T18 ? ) |
234 | ( AB20 ? ) |
235 | ( AA20 ? ) |
236 | ( AB21 ? ) |
237 | ( AA21 ? ) |
238 | ( AA22 ? ) |
239 | ( W2 N-000120 ) |
240 | ( L2 N-000120 ) |
241 | ( L7 N-000120 ) |
242 | ( C2 N-000120 ) |
243 | ( N5 N-000120 ) |
244 | ( R2 N-000120 ) |
245 | ( U5 N-000120 ) |
246 | ( G2 N-000120 ) |
247 | ( F4 N-000120 ) |
248 | ( F6 N-000120 ) |
249 | ( J5 N-000120 ) |
250 | ( M3 /DDR_Banks/M0_UDM ) |
251 | ( L4 /DDR_Banks/M0_LDM ) |
252 | ( K5 /DDR_Banks/M0_RAS# ) |
253 | ( K4 /DDR_Banks/M0_CAS# ) |
254 | ( K3 /DDR_Banks/M0_A5 ) |
255 | ( J4 /DDR_Banks/M0_A6 ) |
256 | ( K6 /DDR_Banks/M0_A3 ) |
257 | ( J6 ? ) |
258 | ( H4 /DDR_Banks/M0_CLK ) |
259 | ( H3 /DDR_Banks/M0_CLK# ) |
260 | ( H2 /DDR_Banks/M0_A0 ) |
261 | ( H1 /DDR_Banks/M0_A1 ) |
262 | ( G3 ? ) |
263 | ( G1 ? ) |
264 | ( H6 /DDR_Banks/M0_A7 ) |
265 | ( H5 /DDR_Banks/M0_A2 ) |
266 | ( F2 /DDR_Banks/M0_WE# ) |
267 | ( F1 ? ) |
268 | ( G4 /DDR_Banks/M0_A10 ) |
269 | ( F3 /DDR_Banks/M0_A4 ) |
270 | ( E3 /DDR_Banks/M0_A8 ) |
271 | ( E1 /DDR_Banks/M0_A9 ) |
272 | ( D2 /DDR_Banks/M0_CKE ) |
273 | ( D1 /DDR_Banks/M0_A12 ) |
274 | ( C3 ? ) |
275 | ( C1 /DDR_Banks/M0_A11 ) |
276 | ( G6 ? ) |
277 | ( F5 ? ) |
278 | ( K7 ? ) |
279 | ( K8 ? ) |
280 | ( D5 ? ) |
281 | ( E4 ? ) |
282 | ( J7 ? ) |
283 | ( H8 ? ) |
284 | ( B2 ? ) |
285 | ( B1 ? ) |
286 | ( G7 ? ) |
287 | ( F7 ? ) |
288 | ( D3 ? ) |
289 | ( C4 ? ) |
290 | ( E5 ? ) |
291 | ( E6 ? ) |
292 | ( A2 ? ) |
293 | ( B3 ? ) |
294 | ( J1 /DDR_Banks/M0_DQ5 ) |
295 | ( J3 /DDR_Banks/M0_DQ4 ) |
296 | ( K1 /DDR_Banks/M0_DQ7 ) |
297 | ( K2 /DDR_Banks/M0_DQ6 ) |
298 | ( L1 ? ) |
299 | ( L3 /DDR_Banks/M0_LDQS ) |
300 | ( M1 /DDR_Banks/M0_DQ3 ) |
301 | ( M2 /DDR_Banks/M0_DQ2 ) |
302 | ( N1 /DDR_Banks/M0_DQ1 ) |
303 | ( N3 /DDR_Banks/M0_DQ0 ) |
304 | ( P1 /DDR_Banks/M0_DQ9 ) |
305 | ( P2 /DDR_Banks/M0_DQ8 ) |
306 | ( R1 /DDR_Banks/M0_DQ11 ) |
307 | ( R3 /DDR_Banks/M0_DQ10 ) |
308 | ( T1 ? ) |
309 | ( T2 /DDR_Banks/M0_UDQS ) |
310 | ( U1 /DDR_Banks/M0_DQ13 ) |
311 | ( U3 /DDR_Banks/M0_DQ12 ) |
312 | ( V1 /DDR_Banks/M0_DQ15 ) |
313 | ( V2 /DDR_Banks/M0_DQ14 ) |
314 | ( M4 ? ) |
315 | ( M5 ? ) |
316 | ( N4 ? ) |
317 | ( P3 ? ) |
318 | ( L6 ? ) |
319 | ( M6 ? ) |
320 | ( P4 ? ) |
321 | ( R4 ? ) |
322 | ( M8 ? ) |
323 | ( M7 ? ) |
324 | ( N7 ? ) |
325 | ( N6 ? ) |
326 | ( V3 ? ) |
327 | ( U4 ? ) |
328 | ( T3 ? ) |
329 | ( T4 ? ) |
330 | ( P5 ? ) |
331 | ( P6 ? ) |
332 | ( P7 ? ) |
333 | ( P8 ? ) |
334 | ( W1 ? ) |
335 | ( W3 ? ) |
336 | ( Y1 ? ) |
337 | ( W21 N-000121 ) |
338 | ( C21 N-000121 ) |
339 | ( G21 N-000121 ) |
340 | ( J18 N-000121 ) |
341 | ( L16 N-000121 ) |
342 | ( L21 N-000121 ) |
343 | ( N18 N-000121 ) |
344 | ( R21 N-000121 ) |
345 | ( U18 N-000121 ) |
346 | ( E19 N-000121 ) |
347 | ( L19 /DDR_Banks/M1_LDM ) |
348 | ( J20 /DDR_Banks/M1_DQ4 ) |
349 | ( J22 /DDR_Banks/M1_DQ5 ) |
350 | ( K21 /DDR_Banks/M1_DQ6 ) |
351 | ( K22 /DDR_Banks/M1_DQ7 ) |
352 | ( L20 /DDR_Banks/M1_LDQS ) |
353 | ( L22 ? ) |
354 | ( M21 /DDR_Banks/M1_DQ2 ) |
355 | ( M22 /DDR_Banks/M1_DQ3 ) |
356 | ( N20 /DDR_Banks/M1_DQ0 ) |
357 | ( N22 /DDR_Banks/M1_DQ1 ) |
358 | ( P21 /DDR_Banks/M1_DQ8 ) |
359 | ( P22 /DDR_Banks/M1_DQ9 ) |
360 | ( R20 /DDR_Banks/M1_DQ10 ) |
361 | ( R22 /DDR_Banks/M1_DQ11 ) |
362 | ( T21 /DDR_Banks/M1_UDQS ) |
363 | ( T22 ? ) |
364 | ( U20 /DDR_Banks/M1_DQ12 ) |
365 | ( U22 /DDR_Banks/M1_DQ13 ) |
366 | ( V21 /DDR_Banks/M1_DQ14 ) |
367 | ( V22 /DDR_Banks/M1_DQ15 ) |
368 | ( M19 ? ) |
369 | ( N19 ? ) |
370 | ( M16 ? ) |
371 | ( L15 ? ) |
372 | ( P19 ? ) |
373 | ( P20 ? ) |
374 | ( W20 ? ) |
375 | ( W22 ? ) |
376 | ( L17 ? ) |
377 | ( K18 ? ) |
378 | ( U19 ? ) |
379 | ( V20 ? ) |
380 | ( M17 ? ) |
381 | ( M18 ? ) |
382 | ( P17 ? ) |
383 | ( N16 ? ) |
384 | ( P18 ? ) |
385 | ( R19 ? ) |
386 | ( T19 ? ) |
387 | ( T20 ? ) |
388 | ( M20 /DDR_Banks/M1_UDM ) |
389 | ( H22 /DDR_Banks/M1_CAS# ) |
390 | ( H21 /DDR_Banks/M1_RAS# ) |
391 | ( K19 /DDR_Banks/M1_A6 ) |
392 | ( K20 /DDR_Banks/M1_A5 ) |
393 | ( G22 ? ) |
394 | ( G20 /DDR_Banks/M1_A3 ) |
395 | ( J19 /DDR_Banks/M1_CLK# ) |
396 | ( H20 /DDR_Banks/M1_CLK ) |
397 | ( F22 /DDR_Banks/M1_A1 ) |
398 | ( F21 /DDR_Banks/M1_A0 ) |
399 | ( K17 ? ) |
400 | ( J17 ? ) |
401 | ( E22 /DDR_Banks/M1_A2 ) |
402 | ( E20 /DDR_Banks/M1_A7 ) |
403 | ( H18 ? ) |
404 | ( H19 /DDR_Banks/M1_WE# ) |
405 | ( F20 /DDR_Banks/M1_A4 ) |
406 | ( G19 /DDR_Banks/M1_A10 ) |
407 | ( C22 /DDR_Banks/M1_A9 ) |
408 | ( C20 /DDR_Banks/M1_A8 ) |
409 | ( D22 /DDR_Banks/M1_A12 ) |
410 | ( D21 /DDR_Banks/M1_CKE ) |
411 | ( F19 /DDR_Banks/M1_A11 ) |
412 | ( F18 ? ) |
413 | ( D20 ? ) |
414 | ( D19 ? ) |
415 | ( H17 ? ) |
416 | ( H16 ? ) |
417 | ( J16 ? ) |
418 | ( K16 ? ) |
419 | ( A21 ? ) |
420 | ( A20 ? ) |
421 | ( B22 ? ) |
422 | ( B21 ? ) |
423 | ( F17 ? ) |
424 | ( F16 ? ) |
425 | ( G17 ? ) |
426 | ( G16 ? ) |
427 | ( B20 ? ) |
428 | ( B4 N-000122 ) |
429 | ( B7 N-000122 ) |
430 | ( E13 N-000122 ) |
431 | ( E17 N-000122 ) |
432 | ( G10 N-000122 ) |
433 | ( G14 N-000122 ) |
434 | ( B11 N-000122 ) |
435 | ( B15 N-000122 ) |
436 | ( B19 N-000122 ) |
437 | ( E9 N-000122 ) |
438 | ( A11 ? ) |
439 | ( D11 ? ) |
440 | ( C12 ? ) |
441 | ( B12 ? ) |
442 | ( A12 ? ) |
443 | ( C13 ? ) |
444 | ( A13 ? ) |
445 | ( D14 ? ) |
446 | ( C14 ? ) |
447 | ( B14 ? ) |
448 | ( A14 ? ) |
449 | ( C15 ? ) |
450 | ( A15 ? ) |
451 | ( D15 ? ) |
452 | ( C16 ? ) |
453 | ( B16 ? ) |
454 | ( A16 ? ) |
455 | ( C17 ? ) |
456 | ( A17 ? ) |
457 | ( B18 ? ) |
458 | ( A18 ? ) |
459 | ( E16 ? ) |
460 | ( D17 ? ) |
461 | ( C11 ? ) |
462 | ( A10 ? ) |
463 | ( B10 ? ) |
464 | ( C10 ? ) |
465 | ( D10 ? ) |
466 | ( D8 ? ) |
467 | ( D7 ? ) |
468 | ( A9 ? ) |
469 | ( C9 ? ) |
470 | ( C8 ? ) |
471 | ( D9 ? ) |
472 | ( A8 ? ) |
473 | ( B8 ? ) |
474 | ( A7 ? ) |
475 | ( C7 ? ) |
476 | ( A6 ? ) |
477 | ( B6 ? ) |
478 | ( C6 ? ) |
479 | ( D6 ? ) |
480 | ( A5 /FPGA_Spartan6/ETH_INT ) |
481 | ( C5 ? ) |
482 | ( A4 ? ) |
483 | ) |
484 | ( /4C5F1EDC/4C5F2D27 $noname R? 1M {Lib=R} |
485 | ( 1 N-000412 ) |
486 | ( 2 GND ) |
487 | ) |
488 | ( /4C5F1EDC/4C5F2D1E $noname C? 4.7nF {Lib=C} |
489 | ( 1 N-000412 ) |
490 | ( 2 GND ) |
491 | ) |
492 | ( /4C5F1EDC/4C5F2CA7 $noname V? V0402MHS03 {Lib=V0402MHS03} |
493 | ( 1 N-000410 ) |
494 | ( 2 GND ) |
495 | ) |
496 | ( /4C5F1EDC/4C5F2CA3 $noname V? V0402MHS03 {Lib=V0402MHS03} |
497 | ( 1 N-000409 ) |
498 | ( 2 GND ) |
499 | ) |
500 | ( /4C5F1EDC/4C5F2B55 $noname F? MICROSMD075F {Lib=MICROSMD075F} |
501 | ( 1 N-000411 ) |
502 | ( 2 ? ) |
503 | ) |
504 | ( /4C5F1EDC/4C5F23DD $noname J? USB-48204-0001 {Lib=USB-48204-0001} |
505 | ( S1 N-000412 ) |
506 | ( S2 N-000412 ) |
507 | ( S3 N-000412 ) |
508 | ( S4 N-000412 ) |
509 | ( 1 N-000411 ) |
510 | ( 2 N-000409 ) |
511 | ( 3 N-000410 ) |
512 | ( 4 GND ) |
513 | ) |
514 | ( /4C5F1EDC/4C5F2039 $noname C? 470nF {Lib=C} |
515 | ( 1 N-000068 ) |
516 | ( 2 GND ) |
517 | ) |
518 | ( /4C5F1EDC/4C5F2037 $noname C? 1uF {Lib=C} |
519 | ( 1 N-000068 ) |
520 | ( 2 GND ) |
521 | ) |
522 | ( /4C5F1EDC/4C5F2033 $noname C? 1uF {Lib=C} |
523 | ( 1 N-000068 ) |
524 | ( 2 GND ) |
525 | ) |
526 | ( /4C5F1EDC/4C5F2025 $noname U6 MIC2550AYTS {Lib=MIC2550AYTS} |
527 | ( 1 N-000068 ) |
528 | ( 2 ? ) |
529 | ( 3 ? ) |
530 | ( 4 ? ) |
531 | ( 5 ? ) |
532 | ( 7 GND ) |
533 | ( 8 GND ) |
534 | ( 9 ? ) |
535 | ( 10 N-000409 ) |
536 | ( 11 N-000410 ) |
537 | ( 12 N-000068 ) |
538 | ( 14 N-000068 ) |
539 | ) |
540 | ( /4C4320F3/4C5D8114 $noname C? C {Lib=C} |
541 | ( 1 /Ethernet_Phy/ETH_PLL1.8V ) |
542 | ( 2 N-000395 ) |
543 | ) |
544 | ( /4C4320F3/4C5D810A $noname L? INDUCTOR {Lib=INDUCTOR} |
545 | ( 1 /Ethernet_Phy/ETH_A1.8V ) |
546 | ( 2 /Ethernet_Phy/ETH_PLL1.8V ) |
547 | ) |
548 | ( /4C4320F3/4C5D8104 $noname C? C {Lib=C} |
549 | ( 1 /Ethernet_Phy/ETH_A1.8V ) |
550 | ( 2 N-000395 ) |
551 | ) |
552 | ( /4C4320F3/4C5D80F3 $noname L? INDUCTOR {Lib=INDUCTOR} |
553 | ( 1 N-000394 ) |
554 | ( 2 /Ethernet_Phy/ETH_A1.8V ) |
555 | ) |
556 | ( /4C4320F3/4C5D80F0 $noname C? C {Lib=C} |
557 | ( 1 N-000394 ) |
558 | ( 2 N-000395 ) |
559 | ) |
560 | ( /4C4320F3/4C5D80ED $noname C? C {Lib=C} |
561 | ( 1 /Ethernet_Phy/ETH_1.8V ) |
562 | ( 2 GND ) |
563 | ) |
564 | ( /4C4320F3/4C5D7FB7 $noname L? FB {Lib=INDUCTOR} |
565 | ( 1 N-000068 ) |
566 | ( 2 /Ethernet_Phy/ETH_A3.3V ) |
567 | ) |
568 | ( /4C4320F3/4C5D7FA7 $noname C? 100nF {Lib=C} |
569 | ( 1 /Ethernet_Phy/ETH_A3.3V ) |
570 | ( 2 GND ) |
571 | ) |
572 | ( /4C4320F3/4C5D7FA5 $noname C? 1uF {Lib=C} |
573 | ( 1 /Ethernet_Phy/ETH_A3.3V ) |
574 | ( 2 GND ) |
575 | ) |
576 | ( /4C4320F3/4C5D7FA3 $noname C? 100nF {Lib=C} |
577 | ( 1 N-000068 ) |
578 | ( 2 GND ) |
579 | ) |
580 | ( /4C4320F3/4C5D7FA1 $noname C? 100nF {Lib=C} |
581 | ( 1 N-000068 ) |
582 | ( 2 GND ) |
583 | ) |
584 | ( /4C4320F3/4C5D7F9F $noname C? 1uF {Lib=C} |
585 | ( 1 N-000068 ) |
586 | ( 2 GND ) |
587 | ) |
588 | ( /4C4320F3/4C5D7F39 $noname R? 4.7K {Lib=R} |
589 | ( 1 /ETH_MDIO ) |
590 | ( 2 N-000068 ) |
591 | ) |
592 | ( /4C4320F3/4C5D7ECF $noname R? 6.65K {Lib=R} |
593 | ( 1 N-000384 ) |
594 | ( 2 GND ) |
595 | ) |
596 | ( /4C4320F3/4C5D7E43 $noname C? 100nF {Lib=C} |
597 | ( 1 N-000068 ) |
598 | ( 2 GND ) |
599 | ) |
600 | ( /4C4320F3/4C5D7E41 $noname C? 100nF {Lib=C} |
601 | ( 1 N-000068 ) |
602 | ( 2 GND ) |
603 | ) |
604 | ( /4C4320F3/4C5D7DCB $noname C? 47nF {Lib=C} |
605 | ( 1 N-000393 ) |
606 | ( 2 GND ) |
607 | ) |
608 | ( /4C4320F3/4C5D7DC4 $noname R? 1M {Lib=R} |
609 | ( 1 N-000393 ) |
610 | ( 2 GND ) |
611 | ) |
612 | ( /4C4320F3/4C432132 $noname U4 K8001 {Lib=K8001} |
613 | ( 1 /ETH_MDIO ) |
614 | ( 2 ? ) |
615 | ( 3 ? ) |
616 | ( 4 ? ) |
617 | ( 5 ? ) |
618 | ( 6 ? ) |
619 | ( 7 N-000068 ) |
620 | ( 8 GND ) |
621 | ( 9 ? ) |
622 | ( 10 ? ) |
623 | ( 11 ? ) |
624 | ( 12 GND ) |
625 | ( 13 /Ethernet_Phy/ETH_1.8V ) |
626 | ( 14 ? ) |
627 | ( 15 ? ) |
628 | ( 16 ? ) |
629 | ( 17 ? ) |
630 | ( 18 ? ) |
631 | ( 19 ? ) |
632 | ( 20 ? ) |
633 | ( 21 ? ) |
634 | ( 22 ? ) |
635 | ( 23 GND ) |
636 | ( 24 N-000068 ) |
637 | ( 25 /FPGA_Spartan6/ETH_INT ) |
638 | ( 26 /Ethernet_Phy/ETH_LED0 ) |
639 | ( 27 /Ethernet_Phy/ETH_LED1 ) |
640 | ( 28 ? ) |
641 | ( 29 ? ) |
642 | ( 30 ? ) |
643 | ( 31 /Ethernet_Phy/ETH_A1.8V ) |
644 | ( 32 N-000385 ) |
645 | ( 33 N-000392 ) |
646 | ( 34 ? ) |
647 | ( 35 GND ) |
648 | ( 36 GND ) |
649 | ( 37 N-000384 ) |
650 | ( 38 /Ethernet_Phy/ETH_A3.3V ) |
651 | ( 39 GND ) |
652 | ( 40 N-000386 ) |
653 | ( 41 N-000391 ) |
654 | ( 42 ? ) |
655 | ( 43 ? ) |
656 | ( 44 GND ) |
657 | ( 45 ? ) |
658 | ( 46 ? ) |
659 | ( 47 /Ethernet_Phy/ETH_PLL1.8V ) |
660 | ( 48 ? ) |
661 | ) |
662 | ( /4C4320F3/4C5D7AFE $noname R? 49.9 {Lib=R} |
663 | ( 1 N-000068 ) |
664 | ( 2 N-000391 ) |
665 | ) |
666 | ( /4C4320F3/4C5D7AFC $noname R? 49.9 {Lib=R} |
667 | ( 1 N-000068 ) |
668 | ( 2 N-000386 ) |
669 | ) |
670 | ( /4C4320F3/4C5D7AF9 $noname R? 49.9 {Lib=R} |
671 | ( 1 N-000068 ) |
672 | ( 2 N-000385 ) |
673 | ) |
674 | ( /4C4320F3/4C5D7AF7 $noname R? 49.9 {Lib=R} |
675 | ( 1 N-000068 ) |
676 | ( 2 N-000392 ) |
677 | ) |
678 | ( /4C4320F3/4C5D71DB $noname R? 220 {Lib=R} |
679 | ( 1 N-000388 ) |
680 | ( 2 /Ethernet_Phy/ETH_LED1 ) |
681 | ) |
682 | ( /4C4320F3/4C5D719D $noname R? 220 {Lib=R} |
683 | ( 1 N-000389 ) |
684 | ( 2 /Ethernet_Phy/ETH_LED0 ) |
685 | ) |
686 | ( /4C4320F3/4C5D6F5A $noname J4 RJ45-48025 {Lib=RJ45-48025} |
687 | ( 1 N-000391 ) |
688 | ( 2 N-000386 ) |
689 | ( 3 N-000068 ) |
690 | ( 4 GND ) |
691 | ( 5 GND ) |
692 | ( 6 N-000068 ) |
693 | ( 7 N-000392 ) |
694 | ( 8 N-000385 ) |
695 | ( 9 N-000068 ) |
696 | ( 10 N-000389 ) |
697 | ( 11 N-000068 ) |
698 | ( 12 N-000388 ) |
699 | ( 13 N-000393 ) |
700 | ( 14 N-000393 ) |
701 | ) |
702 | ( /4C4227FE/4B76F5E2 $noname J1 MICROSD {Lib=MICROSD} |
703 | ( CASE GND ) |
704 | ( CD ? ) |
705 | ( COM GND ) |
706 | ( 1 ? ) |
707 | ( 2 ? ) |
708 | ( 3 ? ) |
709 | ( 4 ? ) |
710 | ( 5 ? ) |
711 | ( 6 ? ) |
712 | ( 7 ? ) |
713 | ( 8 ? ) |
714 | ) |
715 | ( /4C4227FE/4B76F108 $noname U5 NAND {Lib=HY27UG088G5M} |
716 | ( 1 ? ) |
717 | ( 2 ? ) |
718 | ( 3 ? ) |
719 | ( 4 ? ) |
720 | ( 5 ? ) |
721 | ( 6 /Non_volatile_memories/FRB_N ) |
722 | ( 7 /Non_volatile_memories/FRB_N ) |
723 | ( 8 ? ) |
724 | ( 9 ? ) |
725 | ( 10 ? ) |
726 | ( 11 ? ) |
727 | ( 12 N-000068 ) |
728 | ( 13 GND ) |
729 | ( 14 ? ) |
730 | ( 15 ? ) |
731 | ( 16 ? ) |
732 | ( 17 ? ) |
733 | ( 18 ? ) |
734 | ( 19 N-000068 ) |
735 | ( 20 ? ) |
736 | ( 21 ? ) |
737 | ( 22 ? ) |
738 | ( 23 ? ) |
739 | ( 24 ? ) |
740 | ( 25 ? ) |
741 | ( 26 ? ) |
742 | ( 27 ? ) |
743 | ( 28 ? ) |
744 | ( 29 ? ) |
745 | ( 30 ? ) |
746 | ( 31 ? ) |
747 | ( 32 ? ) |
748 | ( 33 ? ) |
749 | ( 34 ? ) |
750 | ( 35 ? ) |
751 | ( 36 GND ) |
752 | ( 37 N-000068 ) |
753 | ( 38 ? ) |
754 | ( 39 ? ) |
755 | ( 40 ? ) |
756 | ( 41 ? ) |
757 | ( 42 ? ) |
758 | ( 43 ? ) |
759 | ( 44 ? ) |
760 | ( 45 ? ) |
761 | ( 46 ? ) |
762 | ( 47 ? ) |
763 | ( 48 ? ) |
764 | ) |
765 | ( /4C421DD3/4C58CA3A 60fbga_ddr U3 MT46V32M16FN {Lib=MT46V32M16FN} |
766 | ( A7 N-000048 ) |
767 | ( F8 N-000048 ) |
768 | ( M7 N-000048 ) |
769 | ( A9 N-000048 ) |
770 | ( B2 N-000048 ) |
771 | ( C8 N-000048 ) |
772 | ( D2 N-000048 ) |
773 | ( E8 N-000048 ) |
774 | ( B7 /DDR_Banks/M1_DQ2 ) |
775 | ( C9 /DDR_Banks/M1_DQ3 ) |
776 | ( C7 /DDR_Banks/M1_DQ4 ) |
777 | ( D9 /DDR_Banks/M1_DQ5 ) |
778 | ( D7 /DDR_Banks/M1_DQ6 ) |
779 | ( E9 /DDR_Banks/M1_DQ7 ) |
780 | ( E1 /DDR_Banks/M1_DQ8 ) |
781 | ( D3 /DDR_Banks/M1_DQ9 ) |
782 | ( D1 /DDR_Banks/M1_DQ10 ) |
783 | ( C3 /DDR_Banks/M1_DQ11 ) |
784 | ( C1 /DDR_Banks/M1_DQ12 ) |
785 | ( B3 /DDR_Banks/M1_DQ13 ) |
786 | ( B1 /DDR_Banks/M1_DQ14 ) |
787 | ( A2 /DDR_Banks/M1_DQ15 ) |
788 | ( F7 /DDR_Banks/M1_LDM ) |
789 | ( E7 /DDR_Banks/M1_LDQS ) |
790 | ( F9 ? ) |
791 | ( H7 /DDR_Banks/M1_RAS# ) |
792 | ( F3 /DDR_Banks/M1_UDM ) |
793 | ( E3 /DDR_Banks/M1_UDQS ) |
794 | ( F1 ? ) |
795 | ( G7 /DDR_Banks/M1_WE# ) |
796 | ( B9 /DDR_Banks/M1_DQ1 ) |
797 | ( A8 /DDR_Banks/M1_DQ0 ) |
798 | ( H8 ? ) |
799 | ( G3 /DDR_Banks/M1_CLK# ) |
800 | ( G2 /DDR_Banks/M1_CLK ) |
801 | ( H3 /DDR_Banks/M1_CKE ) |
802 | ( G8 /DDR_Banks/M1_CAS# ) |
803 | ( J7 ? ) |
804 | ( J8 ? ) |
805 | ( H2 /DDR_Banks/M1_A12 ) |
806 | ( J2 /DDR_Banks/M1_A11 ) |
807 | ( K8 /DDR_Banks/M1_A10 ) |
808 | ( J3 /DDR_Banks/M1_A9 ) |
809 | ( K2 /DDR_Banks/M1_A8 ) |
810 | ( K3 /DDR_Banks/M1_A7 ) |
811 | ( L2 /DDR_Banks/M1_A6 ) |
812 | ( L3 /DDR_Banks/M1_A5 ) |
813 | ( M2 /DDR_Banks/M1_A4 ) |
814 | ( M8 /DDR_Banks/M1_A3 ) |
815 | ( L7 /DDR_Banks/M1_A2 ) |
816 | ( L8 /DDR_Banks/M1_A1 ) |
817 | ( K7 /DDR_Banks/M1_A0 ) |
818 | ( A3 GND ) |
819 | ( F2 GND ) |
820 | ( M3 GND ) |
821 | ( A1 GND ) |
822 | ( B8 GND ) |
823 | ( C2 GND ) |
824 | ( D8 GND ) |
825 | ( E2 GND ) |
826 | ) |
827 | ( /4C421DD3/4C58C847 60fbga_ddr U2 MT46V32M16FN {Lib=MT46V32M16FN} |
828 | ( A7 N-000046 ) |
829 | ( F8 N-000046 ) |
830 | ( M7 N-000046 ) |
831 | ( A9 N-000046 ) |
832 | ( B2 N-000046 ) |
833 | ( C8 N-000046 ) |
834 | ( D2 N-000046 ) |
835 | ( E8 N-000046 ) |
836 | ( B7 /DDR_Banks/M0_DQ2 ) |
837 | ( C9 /DDR_Banks/M0_DQ3 ) |
838 | ( C7 /DDR_Banks/M0_DQ4 ) |
839 | ( D9 /DDR_Banks/M0_DQ5 ) |
840 | ( D7 /DDR_Banks/M0_DQ6 ) |
841 | ( E9 /DDR_Banks/M0_DQ7 ) |
842 | ( E1 /DDR_Banks/M0_DQ8 ) |
843 | ( D3 /DDR_Banks/M0_DQ9 ) |
844 | ( D1 /DDR_Banks/M0_DQ10 ) |
845 | ( C3 /DDR_Banks/M0_DQ11 ) |
846 | ( C1 /DDR_Banks/M0_DQ12 ) |
847 | ( B3 /DDR_Banks/M0_DQ13 ) |
848 | ( B1 /DDR_Banks/M0_DQ14 ) |
849 | ( A2 /DDR_Banks/M0_DQ15 ) |
850 | ( F7 /DDR_Banks/M0_LDM ) |
851 | ( E7 /DDR_Banks/M0_LDQS ) |
852 | ( F9 ? ) |
853 | ( H7 /DDR_Banks/M0_RAS# ) |
854 | ( F3 /DDR_Banks/M0_UDM ) |
855 | ( E3 /DDR_Banks/M0_UDQS ) |
856 | ( F1 ? ) |
857 | ( G7 /DDR_Banks/M0_WE# ) |
858 | ( B9 /DDR_Banks/M0_DQ1 ) |
859 | ( A8 /DDR_Banks/M0_DQ0 ) |
860 | ( H8 ? ) |
861 | ( G3 /DDR_Banks/M0_CLK# ) |
862 | ( G2 /DDR_Banks/M0_CLK ) |
863 | ( H3 /DDR_Banks/M0_CKE ) |
864 | ( G8 /DDR_Banks/M0_CAS# ) |
865 | ( J7 ? ) |
866 | ( J8 ? ) |
867 | ( H2 /DDR_Banks/M0_A12 ) |
868 | ( J2 /DDR_Banks/M0_A11 ) |
869 | ( K8 /DDR_Banks/M0_A10 ) |
870 | ( J3 /DDR_Banks/M0_A9 ) |
871 | ( K2 /DDR_Banks/M0_A8 ) |
872 | ( K3 /DDR_Banks/M0_A7 ) |
873 | ( L2 /DDR_Banks/M0_A6 ) |
874 | ( L3 /DDR_Banks/M0_A5 ) |
875 | ( M2 /DDR_Banks/M0_A4 ) |
876 | ( M8 /DDR_Banks/M0_A3 ) |
877 | ( L7 /DDR_Banks/M0_A2 ) |
878 | ( L8 /DDR_Banks/M0_A1 ) |
879 | ( K7 /DDR_Banks/M0_A0 ) |
880 | ( A3 GND ) |
881 | ( F2 GND ) |
882 | ( M3 GND ) |
883 | ( A1 GND ) |
884 | ( B8 GND ) |
885 | ( C2 GND ) |
886 | ( D8 GND ) |
887 | ( E2 GND ) |
888 | ) |
889 | ) |
890 | * |
891 | { Allowed footprints by component: |
892 | $component R? |
893 | R? |
894 | SM0603 |
895 | SM0805 |
896 | $endlist |
897 | $component C? |
898 | SM* |
899 | C? |
900 | C1-1 |
901 | $endlist |
902 | $component C? |
903 | SM* |
904 | C? |
905 | C1-1 |
906 | $endlist |
907 | $component C? |
908 | SM* |
909 | C? |
910 | C1-1 |
911 | $endlist |
912 | $component C? |
913 | SM* |
914 | C? |
915 | C1-1 |
916 | $endlist |
917 | $component C? |
918 | SM* |
919 | C? |
920 | C1-1 |
921 | $endlist |
922 | $component C? |
923 | SM* |
924 | C? |
925 | C1-1 |
926 | $endlist |
927 | $component C? |
928 | SM* |
929 | C? |
930 | C1-1 |
931 | $endlist |
932 | $component C? |
933 | SM* |
934 | C? |
935 | C1-1 |
936 | $endlist |
937 | $component C? |
938 | SM* |
939 | C? |
940 | C1-1 |
941 | $endlist |
942 | $component C? |
943 | SM* |
944 | C? |
945 | C1-1 |
946 | $endlist |
947 | $component C? |
948 | SM* |
949 | C? |
950 | C1-1 |
951 | $endlist |
952 | $component C? |
953 | SM* |
954 | C? |
955 | C1-1 |
956 | $endlist |
957 | $component C? |
958 | SM* |
959 | C? |
960 | C1-1 |
961 | $endlist |
962 | $component R? |
963 | R? |
964 | SM0603 |
965 | SM0805 |
966 | $endlist |
967 | $component R? |
968 | R? |
969 | SM0603 |
970 | SM0805 |
971 | $endlist |
972 | $component C? |
973 | SM* |
974 | C? |
975 | C1-1 |
976 | $endlist |
977 | $component C? |
978 | SM* |
979 | C? |
980 | C1-1 |
981 | $endlist |
982 | $component C? |
983 | SM* |
984 | C? |
985 | C1-1 |
986 | $endlist |
987 | $component R? |
988 | R? |
989 | SM0603 |
990 | SM0805 |
991 | $endlist |
992 | $component R? |
993 | R? |
994 | SM0603 |
995 | SM0805 |
996 | $endlist |
997 | $component R? |
998 | R? |
999 | SM0603 |
1000 | SM0805 |
1001 | $endlist |
1002 | $component R? |
1003 | R? |
1004 | SM0603 |
1005 | SM0805 |
1006 | $endlist |
1007 | $component R? |
1008 | R? |
1009 | SM0603 |
1010 | SM0805 |
1011 | $endlist |
1012 | $component R? |
1013 | R? |
1014 | SM0603 |
1015 | SM0805 |
1016 | $endlist |
1017 | $component R? |
1018 | R? |
1019 | SM0603 |
1020 | SM0805 |
1021 | $endlist |
1022 | $endfootprintlist |
1023 | } |
1024 | { Pin List by Nets |
1025 | Net 9 "/ETH_MDIO" "ETH_MDIO" |
1026 | R? 1 |
1027 | U4 1 |
1028 | Net 13 "/DDR Banks/M1_LDM" "M1_LDM" |
1029 | U3 F7 |
1030 | U1 L19 |
1031 | Net 14 "/DDR Banks/M1_CKE" "M1_CKE" |
1032 | U3 H3 |
1033 | U1 D21 |
1034 | Net 15 "/DDR Banks/M1_CAS#" "M1_CAS#" |
1035 | U3 G8 |
1036 | U1 H22 |
1037 | Net 16 "/DDR Banks/M0_CKE" "M0_CKE" |
1038 | U2 H3 |
1039 | U1 D2 |
1040 | Net 17 "/DDR Banks/M0_WE#" "M0_WE#" |
1041 | U2 G7 |
1042 | U1 F2 |
1043 | Net 18 "/DDR Banks/M0_CAS#" "M0_CAS#" |
1044 | U2 G8 |
1045 | U1 K4 |
1046 | Net 19 "/DDR Banks/M0_UDM" "M0_UDM" |
1047 | U2 F3 |
1048 | U1 M3 |
1049 | Net 20 "/DDR Banks/M0_UDQS" "M0_UDQS" |
1050 | U2 E3 |
1051 | U1 T2 |
1052 | Net 21 "/DDR Banks/M1_CLK#" "M1_CLK#" |
1053 | U3 G3 |
1054 | U1 J19 |
1055 | Net 22 "/DDR Banks/M0_CLK#" "M0_CLK#" |
1056 | U2 G3 |
1057 | U1 H3 |
1058 | Net 23 "/DDR Banks/M0_CLK" "M0_CLK" |
1059 | U2 G2 |
1060 | U1 H4 |
1061 | Net 24 "/DDR Banks/M1_CLK" "M1_CLK" |
1062 | U3 G2 |
1063 | U1 H20 |
1064 | Net 25 "/DDR Banks/M0_LDM" "M0_LDM" |
1065 | U2 F7 |
1066 | U1 L4 |
1067 | Net 26 "/DDR Banks/M0_LDQS" "M0_LDQS" |
1068 | U2 E7 |
1069 | U1 L3 |
1070 | Net 27 "/DDR Banks/M0_RAS#" "M0_RAS#" |
1071 | U2 H7 |
1072 | U1 K5 |
1073 | Net 29 "/DDR Banks/M1_RAS#" "M1_RAS#" |
1074 | U3 H7 |
1075 | U1 H21 |
1076 | Net 30 "/DDR Banks/M1_WE#" "M1_WE#" |
1077 | U3 G7 |
1078 | U1 H19 |
1079 | Net 31 "/DDR Banks/M1_UDM" "M1_UDM" |
1080 | U3 F3 |
1081 | U1 M20 |
1082 | Net 32 "/DDR Banks/M1_LDQS" "M1_LDQS" |
1083 | U3 E7 |
1084 | U1 L20 |
1085 | Net 33 "/DDR Banks/M1_UDQS" "M1_UDQS" |
1086 | U3 E3 |
1087 | U1 T21 |
1088 | Net 34 "/FPGA Spartan6/ETH_INT" "ETH_INT" |
1089 | U1 A5 |
1090 | U4 25 |
1091 | Net 45 "GND" "GND" |
1092 | U3 A3 |
1093 | U3 F2 |
1094 | U3 M3 |
1095 | U3 A1 |
1096 | U3 B8 |
1097 | U3 C2 |
1098 | U3 D8 |
1099 | U3 E2 |
1100 | U2 A3 |
1101 | U2 F2 |
1102 | U2 M3 |
1103 | U2 A1 |
1104 | U2 B8 |
1105 | U2 C2 |
1106 | U2 D8 |
1107 | U2 E2 |
1108 | J1 CASE |
1109 | J1 CASE |
1110 | J1 CASE |
1111 | J1 COM |
1112 | U5 36 |
1113 | U5 13 |
1114 | U1 P10 |
1115 | U1 V10 |
1116 | U1 M10 |
1117 | U1 K10 |
1118 | U1 L13 |
1119 | U1 A1 |
1120 | U1 N13 |
1121 | U1 A22 |
1122 | U1 R5 |
1123 | U1 AA13 |
1124 | U1 W19 |
1125 | U1 AA17 |
1126 | U1 K14 |
1127 | U1 AA5 |
1128 | U1 L5 |
1129 | U1 AA9 |
1130 | U1 M14 |
1131 | U1 AB1 |
1132 | U1 N2 |
1133 | U1 AB22 |
1134 | U1 P14 |
1135 | U1 B13 |
1136 | U1 U21 |
1137 | U1 B17 |
1138 | U1 V4 |
1139 | U1 B5 |
1140 | U1 J9 |
1141 | U1 B9 |
1142 | U1 K12 |
1143 | U1 D18 |
1144 | U1 L11 |
1145 | U1 D4 |
1146 | U1 L18 |
1147 | U1 E11 |
1148 | U1 L9 |
1149 | U1 E15 |
1150 | U1 M12 |
1151 | U1 E2 |
1152 | U1 N11 |
1153 | U1 E21 |
1154 | U1 N17 |
1155 | U1 E7 |
1156 | U1 N21 |
1157 | U1 G18 |
1158 | U1 P12 |
1159 | U1 G5 |
1160 | U1 R18 |
1161 | U1 H7 |
1162 | U1 U2 |
1163 | U1 J11 |
1164 | U1 U7 |
1165 | U1 J13 |
1166 | U1 V14 |
1167 | U1 J15 |
1168 | U1 W16 |
1169 | U1 J2 |
1170 | U1 W7 |
1171 | U1 J21 |
1172 | U1 N9 |
1173 | C? 2 |
1174 | C? 2 |
1175 | C? 2 |
1176 | C? 2 |
1177 | C? 2 |
1178 | C? 2 |
1179 | R? 2 |
1180 | C? 2 |
1181 | C? 2 |
1182 | C? 2 |
1183 | R? 2 |
1184 | U4 8 |
1185 | U4 12 |
1186 | U4 23 |
1187 | U4 35 |
1188 | U4 36 |
1189 | U4 39 |
1190 | U4 44 |
1191 | J4 5 |
1192 | J4 4 |
1193 | R? 2 |
1194 | C? 2 |
1195 | V? 2 |
1196 | V? 2 |
1197 | J? 4 |
1198 | C? 2 |
1199 | C? 2 |
1200 | C? 2 |
1201 | U6 8 |
1202 | U6 7 |
1203 | Net 46 "" "" |
1204 | U2 A7 |
1205 | U2 F8 |
1206 | U2 M7 |
1207 | U2 A9 |
1208 | U2 B2 |
1209 | U2 C8 |
1210 | U2 D2 |
1211 | U2 E8 |
1212 | Net 48 "" "" |
1213 | U3 A7 |
1214 | U3 F8 |
1215 | U3 M7 |
1216 | U3 A9 |
1217 | U3 B2 |
1218 | U3 C8 |
1219 | U3 D2 |
1220 | U3 E8 |
1221 | Net 68 "" "" |
1222 | U5 37 |
1223 | U5 19 |
1224 | U5 12 |
1225 | L? 1 |
1226 | C? 1 |
1227 | C? 1 |
1228 | C? 1 |
1229 | R? 2 |
1230 | C? 1 |
1231 | C? 1 |
1232 | U4 7 |
1233 | U4 24 |
1234 | R? 1 |
1235 | R? 1 |
1236 | R? 1 |
1237 | R? 1 |
1238 | J4 11 |
1239 | J4 9 |
1240 | J4 6 |
1241 | J4 3 |
1242 | C? 1 |
1243 | C? 1 |
1244 | C? 1 |
1245 | U6 14 |
1246 | U6 12 |
1247 | U6 1 |
1248 | Net 71 "/Non volatile memories/FRB_N" "FRB_N" |
1249 | U5 7 |
1250 | U5 6 |
1251 | Net 118 "" "" |
1252 | U1 N10 |
1253 | U1 P11 |
1254 | U1 P13 |
1255 | U1 P9 |
1256 | U1 R14 |
1257 | U1 N12 |
1258 | U1 J10 |
1259 | U1 J12 |
1260 | U1 J14 |
1261 | U1 J8 |
1262 | U1 K11 |
1263 | U1 K13 |
1264 | U1 K9 |
1265 | U1 L10 |
1266 | U1 L12 |
1267 | U1 L14 |
1268 | U1 M11 |
1269 | U1 M13 |
1270 | U1 M9 |
1271 | U1 N14 |
1272 | Net 119 "" "" |
1273 | U1 H9 |
1274 | U1 U11 |
1275 | U1 F11 |
1276 | U1 R6 |
1277 | U1 M15 |
1278 | U1 V6 |
1279 | U1 G12 |
1280 | U1 H15 |
1281 | U1 D16 |
1282 | U1 K15 |
1283 | U1 R12 |
1284 | U1 N8 |
1285 | U1 R10 |
1286 | U1 L8 |
1287 | Net 120 "" "" |
1288 | U1 W2 |
1289 | U1 L2 |
1290 | U1 L7 |
1291 | U1 C2 |
1292 | U1 N5 |
1293 | U1 R2 |
1294 | U1 U5 |
1295 | U1 G2 |
1296 | U1 F4 |
1297 | U1 F6 |
1298 | U1 J5 |
1299 | Net 121 "" "" |
1300 | U1 W21 |
1301 | U1 C21 |
1302 | U1 G21 |
1303 | U1 J18 |
1304 | U1 L16 |
1305 | U1 L21 |
1306 | U1 N18 |
1307 | U1 R21 |
1308 | U1 U18 |
1309 | U1 E19 |
1310 | Net 122 "" "" |
1311 | U1 B4 |
1312 | U1 B7 |
1313 | U1 E13 |
1314 | U1 E17 |
1315 | U1 G10 |
1316 | U1 G14 |
1317 | U1 B11 |
1318 | U1 B15 |
1319 | U1 B19 |
1320 | U1 E9 |
1321 | Net 123 "" "" |
1322 | U1 AA15 |
1323 | U1 V16 |
1324 | U1 T13 |
1325 | U1 V8 |
1326 | U1 V12 |
1327 | U1 AA3 |
1328 | U1 T9 |
1329 | U1 AA19 |
1330 | U1 AA11 |
1331 | U1 W5 |
1332 | U1 AA7 |
1333 | Net 382 "/Ethernet Phy/ETH_A1.8V" "ETH_A1.8V" |
1334 | L? 1 |
1335 | C? 1 |
1336 | L? 2 |
1337 | U4 31 |
1338 | Net 383 "/Ethernet Phy/ETH_A3.3V" "ETH_A3.3V" |
1339 | L? 2 |
1340 | C? 1 |
1341 | C? 1 |
1342 | U4 38 |
1343 | Net 384 "" "" |
1344 | R? 1 |
1345 | U4 37 |
1346 | Net 385 "" "" |
1347 | U4 32 |
1348 | R? 2 |
1349 | J4 8 |
1350 | Net 386 "" "" |
1351 | U4 40 |
1352 | R? 2 |
1353 | J4 2 |
1354 | Net 387 "/Ethernet Phy/ETH_LED1" "ETH_LED1" |
1355 | U4 27 |
1356 | R? 2 |
1357 | Net 388 "" "" |
1358 | R? 1 |
1359 | J4 12 |
1360 | Net 389 "" "" |
1361 | R? 1 |
1362 | J4 10 |
1363 | Net 390 "/Ethernet Phy/ETH_LED0" "ETH_LED0" |
1364 | U4 26 |
1365 | R? 2 |
1366 | Net 391 "" "" |
1367 | U4 41 |
1368 | R? 2 |
1369 | J4 1 |
1370 | Net 392 "" "" |
1371 | U4 33 |
1372 | R? 2 |
1373 | J4 7 |
1374 | Net 393 "" "" |
1375 | C? 1 |
1376 | R? 1 |
1377 | J4 13 |
1378 | J4 14 |
1379 | Net 394 "" "" |
1380 | L? 1 |
1381 | C? 1 |
1382 | Net 395 "" "" |
1383 | C? 2 |
1384 | C? 2 |
1385 | C? 2 |
1386 | Net 396 "/Ethernet Phy/ETH_1.8V" "ETH_1.8V" |
1387 | C? 1 |
1388 | U4 13 |
1389 | Net 397 "/Ethernet Phy/ETH_PLL1.8V" "ETH_PLL1.8V" |
1390 | C? 1 |
1391 | L? 2 |
1392 | U4 47 |
1393 | Net 409 "" "" |
1394 | V? 1 |
1395 | V? 1 |
1396 | J? 2 |
1397 | U6 10 |
1398 | Net 410 "" "" |
1399 | V? 1 |
1400 | V? 1 |
1401 | J? 3 |
1402 | U6 11 |
1403 | Net 411 "" "" |
1404 | F? 1 |
1405 | J? 1 |
1406 | Net 412 "" "" |
1407 | R? 1 |
1408 | C? 1 |
1409 | J? S1 |
1410 | J? S2 |
1411 | J? S3 |
1412 | J? S4 |
1413 | Net 423 "/DDR Banks/M0_A0" "M0_A0" |
1414 | U2 K7 |
1415 | U1 H2 |
1416 | Net 424 "/DDR Banks/M0_A1" "M0_A1" |
1417 | U2 L8 |
1418 | U1 H1 |
1419 | Net 425 "/DDR Banks/M0_A2" "M0_A2" |
1420 | U2 L7 |
1421 | U1 H5 |
1422 | Net 426 "/DDR Banks/M0_A3" "M0_A3" |
1423 | U2 M8 |
1424 | U1 K6 |
1425 | Net 427 "/DDR Banks/M0_A4" "M0_A4" |
1426 | U2 M2 |
1427 | U1 F3 |
1428 | Net 428 "/DDR Banks/M0_A5" "M0_A5" |
1429 | U2 L3 |
1430 | U1 K3 |
1431 | Net 429 "/DDR Banks/M0_A6" "M0_A6" |
1432 | U2 L2 |
1433 | U1 J4 |
1434 | Net 430 "/DDR Banks/M0_A7" "M0_A7" |
1435 | U2 K3 |
1436 | U1 H6 |
1437 | Net 431 "/DDR Banks/M0_A8" "M0_A8" |
1438 | U2 K2 |
1439 | U1 E3 |
1440 | Net 432 "/DDR Banks/M0_A9" "M0_A9" |
1441 | U2 J3 |
1442 | U1 E1 |
1443 | Net 433 "/DDR Banks/M0_A10" "M0_A10" |
1444 | U2 K8 |
1445 | U1 G4 |
1446 | Net 434 "/DDR Banks/M0_A11" "M0_A11" |
1447 | U2 J2 |
1448 | U1 C1 |
1449 | Net 435 "/DDR Banks/M0_A12" "M0_A12" |
1450 | U2 H2 |
1451 | U1 D1 |
1452 | Net 436 "/DDR Banks/M1_A0" "M1_A0" |
1453 | U3 K7 |
1454 | U1 F21 |
1455 | Net 437 "/DDR Banks/M1_A1" "M1_A1" |
1456 | U3 L8 |
1457 | U1 F22 |
1458 | Net 438 "/DDR Banks/M1_A2" "M1_A2" |
1459 | U3 L7 |
1460 | U1 E22 |
1461 | Net 439 "/DDR Banks/M1_A3" "M1_A3" |
1462 | U3 M8 |
1463 | U1 G20 |
1464 | Net 440 "/DDR Banks/M1_A4" "M1_A4" |
1465 | U3 M2 |
1466 | U1 F20 |
1467 | Net 441 "/DDR Banks/M1_A5" "M1_A5" |
1468 | U3 L3 |
1469 | U1 K20 |
1470 | Net 442 "/DDR Banks/M1_A6" "M1_A6" |
1471 | U3 L2 |
1472 | U1 K19 |
1473 | Net 443 "/DDR Banks/M1_A7" "M1_A7" |
1474 | U3 K3 |
1475 | U1 E20 |
1476 | Net 444 "/DDR Banks/M1_A8" "M1_A8" |
1477 | U3 K2 |
1478 | U1 C20 |
1479 | Net 445 "/DDR Banks/M1_A9" "M1_A9" |
1480 | U3 J3 |
1481 | U1 C22 |
1482 | Net 446 "/DDR Banks/M1_A10" "M1_A10" |
1483 | U3 K8 |
1484 | U1 G19 |
1485 | Net 447 "/DDR Banks/M1_A11" "M1_A11" |
1486 | U3 J2 |
1487 | U1 F19 |
1488 | Net 448 "/DDR Banks/M1_A12" "M1_A12" |
1489 | U3 H2 |
1490 | U1 D22 |
1491 | Net 449 "/DDR Banks/M0_DQ0" "M0_DQ0" |
1492 | U2 A8 |
1493 | U1 N3 |
1494 | Net 450 "/DDR Banks/M0_DQ1" "M0_DQ1" |
1495 | U2 B9 |
1496 | U1 N1 |
1497 | Net 451 "/DDR Banks/M0_DQ2" "M0_DQ2" |
1498 | U2 B7 |
1499 | U1 M2 |
1500 | Net 452 "/DDR Banks/M0_DQ3" "M0_DQ3" |
1501 | U2 C9 |
1502 | U1 M1 |
1503 | Net 453 "/DDR Banks/M0_DQ4" "M0_DQ4" |
1504 | U2 C7 |
1505 | U1 J3 |
1506 | Net 454 "/DDR Banks/M0_DQ5" "M0_DQ5" |
1507 | U2 D9 |
1508 | U1 J1 |
1509 | Net 455 "/DDR Banks/M0_DQ6" "M0_DQ6" |
1510 | U2 D7 |
1511 | U1 K2 |
1512 | Net 456 "/DDR Banks/M0_DQ7" "M0_DQ7" |
1513 | U2 E9 |
1514 | U1 K1 |
1515 | Net 457 "/DDR Banks/M0_DQ8" "M0_DQ8" |
1516 | U2 E1 |
1517 | U1 P2 |
1518 | Net 458 "/DDR Banks/M0_DQ9" "M0_DQ9" |
1519 | U2 D3 |
1520 | U1 P1 |
1521 | Net 459 "/DDR Banks/M0_DQ10" "M0_DQ10" |
1522 | U2 D1 |
1523 | U1 R3 |
1524 | Net 460 "/DDR Banks/M0_DQ11" "M0_DQ11" |
1525 | U2 C3 |
1526 | U1 R1 |
1527 | Net 461 "/DDR Banks/M0_DQ12" "M0_DQ12" |
1528 | U2 C1 |
1529 | U1 U3 |
1530 | Net 462 "/DDR Banks/M0_DQ13" "M0_DQ13" |
1531 | U2 B3 |
1532 | U1 U1 |
1533 | Net 463 "/DDR Banks/M0_DQ14" "M0_DQ14" |
1534 | U2 B1 |
1535 | U1 V2 |
1536 | Net 464 "/DDR Banks/M0_DQ15" "M0_DQ15" |
1537 | U2 A2 |
1538 | U1 V1 |
1539 | Net 465 "/DDR Banks/M1_DQ0" "M1_DQ0" |
1540 | U3 A8 |
1541 | U1 N20 |
1542 | Net 466 "/DDR Banks/M1_DQ1" "M1_DQ1" |
1543 | U3 B9 |
1544 | U1 N22 |
1545 | Net 467 "/DDR Banks/M1_DQ2" "M1_DQ2" |
1546 | U3 B7 |
1547 | U1 M21 |
1548 | Net 468 "/DDR Banks/M1_DQ3" "M1_DQ3" |
1549 | U3 C9 |
1550 | U1 M22 |
1551 | Net 469 "/DDR Banks/M1_DQ4" "M1_DQ4" |
1552 | U3 C7 |
1553 | U1 J20 |
1554 | Net 470 "/DDR Banks/M1_DQ5" "M1_DQ5" |
1555 | U3 D9 |
1556 | U1 J22 |
1557 | Net 471 "/DDR Banks/M1_DQ6" "M1_DQ6" |
1558 | U3 D7 |
1559 | U1 K21 |
1560 | Net 472 "/DDR Banks/M1_DQ7" "M1_DQ7" |
1561 | U3 E9 |
1562 | U1 K22 |
1563 | Net 473 "/DDR Banks/M1_DQ8" "M1_DQ8" |
1564 | U3 E1 |
1565 | U1 P21 |
1566 | Net 474 "/DDR Banks/M1_DQ9" "M1_DQ9" |
1567 | U3 D3 |
1568 | U1 P22 |
1569 | Net 475 "/DDR Banks/M1_DQ10" "M1_DQ10" |
1570 | U3 D1 |
1571 | U1 R20 |
1572 | Net 476 "/DDR Banks/M1_DQ11" "M1_DQ11" |
1573 | U3 C3 |
1574 | U1 R22 |
1575 | Net 477 "/DDR Banks/M1_DQ12" "M1_DQ12" |
1576 | U3 C1 |
1577 | U1 U20 |
1578 | Net 478 "/DDR Banks/M1_DQ13" "M1_DQ13" |
1579 | U3 B3 |
1580 | U1 U22 |
1581 | Net 479 "/DDR Banks/M1_DQ14" "M1_DQ14" |
1582 | U3 B1 |
1583 | U1 V21 |
1584 | Net 480 "/DDR Banks/M1_DQ15" "M1_DQ15" |
1585 | U3 A2 |
1586 | U1 V22 |
1587 | } |
1588 | #End |
1589 |
Branches:
master