Xué video camera
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Xué video camera Git Source Tree
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Source at commit cac88e3 created 13 years 7 months ago. By Andres Calderon, DDR de-coupling caps. added | |
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1 | EESchema Schematic File Version 2 date Tue 10 Aug 2010 05:37:13 PM COT |
2 | LIBS:power |
3 | LIBS:v0402mhs03 |
4 | LIBS:usb-48204-0001 |
5 | LIBS:microsmd075f |
6 | LIBS:mic2550ayts |
7 | LIBS:rj45-48025 |
8 | LIBS:xue-nv |
9 | LIBS:xc6slx75fgg484 |
10 | LIBS:xc6slx45fgg484 |
11 | LIBS:micron_mobile_ddr |
12 | LIBS:micron_ddr_512Mb |
13 | LIBS:k8001 |
14 | LIBS:device |
15 | LIBS:transistors |
16 | LIBS:conn |
17 | LIBS:linear |
18 | LIBS:regul |
19 | LIBS:74xx |
20 | LIBS:cmos4000 |
21 | LIBS:adc-dac |
22 | LIBS:memory |
23 | LIBS:xilinx |
24 | LIBS:special |
25 | LIBS:microcontrollers |
26 | LIBS:dsp |
27 | LIBS:microchip |
28 | LIBS:analog_switches |
29 | LIBS:motorola |
30 | LIBS:texas |
31 | LIBS:intel |
32 | LIBS:audio |
33 | LIBS:interface |
34 | LIBS:digital-audio |
35 | LIBS:philips |
36 | LIBS:display |
37 | LIBS:cypress |
38 | LIBS:siliconi |
39 | LIBS:opto |
40 | LIBS:atmel |
41 | LIBS:contrib |
42 | LIBS:valves |
43 | LIBS:pasives-connectors |
44 | LIBS:xue-rnc-cache |
45 | EELAYER 24 0 |
46 | EELAYER END |
47 | $Descr A3 16535 11700 |
48 | Sheet 1 6 |
49 | Title "" |
50 | Date "10 aug 2010" |
51 | Rev "" |
52 | Comp "" |
53 | Comment1 "" |
54 | Comment2 "" |
55 | Comment3 "" |
56 | Comment4 "" |
57 | $EndDescr |
58 | Wire Bus Line |
59 | 10600 7200 9300 7200 |
60 | Wire Bus Line |
61 | 9300 7600 10600 7600 |
62 | Wire Wire Line |
63 | 10650 5300 9300 5300 |
64 | Wire Wire Line |
65 | 10650 5100 9300 5100 |
66 | Wire Wire Line |
67 | 9300 7900 10600 7900 |
68 | Wire Wire Line |
69 | 9300 7700 10600 7700 |
70 | Wire Wire Line |
71 | 9300 7500 10600 7500 |
72 | Wire Wire Line |
73 | 9300 7300 10600 7300 |
74 | Wire Wire Line |
75 | 9300 7000 10600 7000 |
76 | Wire Wire Line |
77 | 9300 6800 10600 6800 |
78 | Wire Wire Line |
79 | 9300 6600 10600 6600 |
80 | Wire Wire Line |
81 | 9300 6350 10600 6350 |
82 | Wire Bus Line |
83 | 4700 2950 5950 2950 |
84 | Wire Wire Line |
85 | 4700 3350 5950 3350 |
86 | Wire Wire Line |
87 | 4700 3450 5950 3450 |
88 | Wire Wire Line |
89 | 4700 3650 5950 3650 |
90 | Wire Wire Line |
91 | 4700 4500 5950 4500 |
92 | Wire Wire Line |
93 | 4700 4350 5950 4350 |
94 | Wire Wire Line |
95 | 4700 4900 5950 4900 |
96 | Wire Wire Line |
97 | 4700 6400 5950 6400 |
98 | Wire Wire Line |
99 | 4700 5500 5950 5500 |
100 | Wire Wire Line |
101 | 4700 5800 5950 5800 |
102 | Wire Bus Line |
103 | 4700 5150 5950 5150 |
104 | Wire Wire Line |
105 | 4700 4000 5950 4000 |
106 | Wire Wire Line |
107 | 4700 6050 5950 6050 |
108 | Wire Bus Line |
109 | 4700 5050 5950 5050 |
110 | Wire Bus Line |
111 | 5950 5050 5950 5100 |
112 | Wire Wire Line |
113 | 4700 6150 5950 6150 |
114 | Wire Wire Line |
115 | 5950 4100 4700 4100 |
116 | Wire Bus Line |
117 | 4700 3050 5950 3050 |
118 | Wire Wire Line |
119 | 4700 5400 5950 5400 |
120 | Wire Wire Line |
121 | 4700 5700 5950 5700 |
122 | Wire Wire Line |
123 | 4700 6300 5950 6300 |
124 | Wire Bus Line |
125 | 4700 5250 5950 5250 |
126 | Wire Wire Line |
127 | 4700 6550 5950 6550 |
128 | Wire Wire Line |
129 | 4700 5950 5950 5950 |
130 | Wire Wire Line |
131 | 4700 4250 5950 4250 |
132 | Wire Wire Line |
133 | 4700 3900 5950 3900 |
134 | Wire Wire Line |
135 | 4700 3750 5950 3750 |
136 | Wire Wire Line |
137 | 4700 2800 5950 2800 |
138 | Wire Bus Line |
139 | 4700 3150 5950 3150 |
140 | Wire Wire Line |
141 | 9300 6500 10600 6500 |
142 | Wire Wire Line |
143 | 9300 6700 10600 6700 |
144 | Wire Wire Line |
145 | 10600 6900 9300 6900 |
146 | Wire Wire Line |
147 | 9300 7400 10600 7400 |
148 | Wire Wire Line |
149 | 9300 7800 10600 7800 |
150 | Wire Wire Line |
151 | 10650 5000 9300 5000 |
152 | Wire Wire Line |
153 | 10650 5200 9300 5200 |
154 | Wire Wire Line |
155 | 10650 5400 9300 5400 |
156 | $Sheet |
157 | S 5950 2700 3350 5800 |
158 | U 4C431A63 |
159 | F0 "FPGA Spartan6" 60 |
160 | F1 "FPGA.sch" 60 |
161 | F2 "M1_CLK" O L 5950 4000 60 |
162 | F3 "M1_CLK#" O L 5950 4100 60 |
163 | F4 "M0_CLK" O L 5950 6050 60 |
164 | F5 "M0_CLK#" O L 5950 6150 60 |
165 | F6 "M0_A[0..12]" O L 5950 5150 60 |
166 | F7 "M1_A[0..12]" O L 5950 3050 60 |
167 | F8 "M0_DQ[0..15]" B L 5950 5050 60 |
168 | F9 "M0_UDQS" O L 5950 5400 60 |
169 | F10 "M0_LDM" O L 5950 5800 60 |
170 | F11 "M0_LDQS" O L 5950 5500 60 |
171 | F12 "M0_UDM" O L 5950 5700 60 |
172 | F13 "M0_RAS#" O L 5950 6400 60 |
173 | F14 "M0_WE#" O L 5950 6550 60 |
174 | F15 "M0_CKE" O L 5950 5950 60 |
175 | F16 "M0_CAS#" O L 5950 6300 60 |
176 | F17 "M1_CAS#" O L 5950 4250 60 |
177 | F18 "M1_CKE" O L 5950 3900 60 |
178 | F19 "M0_CS#" O L 5950 4900 60 |
179 | F20 "M1_CS#" O L 5950 2800 60 |
180 | F21 "M1_WE#" O L 5950 4500 60 |
181 | F22 "M1_RAS#" O L 5950 4350 60 |
182 | F23 "M1_UDM" O L 5950 3650 60 |
183 | F24 "M1_LDQS" O L 5950 3450 60 |
184 | F25 "M1_LDM" O L 5950 3750 60 |
185 | F26 "M1_UDQS" O L 5950 3350 60 |
186 | F27 "M1_DQ[0..15]" B L 5950 2950 60 |
187 | F28 "M1_BA[0..1]" O L 5950 3150 60 |
188 | F29 "M0_BA[0..1]" O L 5950 5250 60 |
189 | F30 "USBA_VM" B R 9300 5400 60 |
190 | F31 "USBA_VP" B R 9300 5300 60 |
191 | F32 "USBA_RCV" B R 9300 5200 60 |
192 | F33 "USBA_OE_N" B R 9300 5100 60 |
193 | F34 "USBA_SPD" B R 9300 5000 60 |
194 | F35 "ETH_CLK" B R 9300 7900 60 |
195 | F36 "ETH_RXC" B R 9300 6500 60 |
196 | F37 "ETH_TXC" B R 9300 7500 60 |
197 | F38 "ETH_TXD[0..3]" O R 9300 7600 60 |
198 | F39 "ETH_TXEN" B R 9300 7700 60 |
199 | F40 "ETH_TXER" B R 9300 7800 60 |
200 | F41 "ETH_RXER" B R 9300 7400 60 |
201 | F42 "ETH_RXDV" B R 9300 7300 60 |
202 | F43 "ETH_RXD[0..3]" I R 9300 7200 60 |
203 | F44 "ETH_RESET_N" B R 9300 6600 60 |
204 | F45 "ETH_MDIO" B R 9300 6900 60 |
205 | F46 "ETH_MDC" B R 9300 7000 60 |
206 | F47 "ETH_INT" B R 9300 6350 60 |
207 | $EndSheet |
208 | Text HLabel 10650 5400 2 60 BiDi ~ 0 |
209 | USBA_VM |
210 | Text HLabel 10650 5300 2 60 BiDi ~ 0 |
211 | USBA_VP |
212 | Text HLabel 10650 5200 2 60 BiDi ~ 0 |
213 | USBA_RCV |
214 | Text HLabel 10650 5100 2 60 BiDi ~ 0 |
215 | USBA_OE_N |
216 | Text HLabel 10650 5000 2 60 BiDi ~ 0 |
217 | USBA_SPD |
218 | $Sheet |
219 | S 10650 4900 1150 650 |
220 | U 4C5F1EDC |
221 | F0 "USB" 60 |
222 | F1 "USB.sch" 60 |
223 | $EndSheet |
224 | $Sheet |
225 | S 10600 6250 1300 1800 |
226 | U 4C4320F3 |
227 | F0 "Ethernet Phy" 60 |
228 | F1 "eth_phy.sch" 60 |
229 | F2 "ETH_RXC" O L 10600 6500 60 |
230 | F3 "ETH_RST_N" I L 10600 6600 60 |
231 | F4 "ETH_CRS" O L 10600 6700 60 |
232 | F5 "ETH_COL" O L 10600 6800 60 |
233 | F6 "ETH_MDIO" B L 10600 6900 60 |
234 | F7 "ETH_MDC" I L 10600 7000 60 |
235 | F8 "ETH_RXD[0..3]" O L 10600 7200 60 |
236 | F9 "ETH_RXDV" O L 10600 7300 60 |
237 | F10 "ETH_RXER" O L 10600 7400 60 |
238 | F11 "ETH_TXC" B L 10600 7500 60 |
239 | F12 "ETH_TXD[0..3]" I L 10600 7600 60 |
240 | F13 "ETH_TXEN" I L 10600 7700 60 |
241 | F14 "ETH_TXER" I L 10600 7800 60 |
242 | F15 "ETH_CLK" I L 10600 7900 60 |
243 | F16 "ETH_INT" O L 10600 6350 60 |
244 | $EndSheet |
245 | $Sheet |
246 | S 10650 2700 1150 1850 |
247 | U 4C4227FE |
248 | F0 "Non volatile memories" 60 |
249 | F1 "NV_MEMORIES.sch" 60 |
250 | $EndSheet |
251 | $Sheet |
252 | S 3600 2700 1100 4000 |
253 | U 4C421DD3 |
254 | F0 "DDR Banks" 60 |
255 | F1 "DRAM.sch" 60 |
256 | F2 "M0_BA[0..1]" I R 4700 5250 60 |
257 | F3 "M1_BA[0..1]" I R 4700 3150 60 |
258 | F4 "M0_WE#" I R 4700 6550 60 |
259 | F5 "M0_RAS#" I R 4700 6400 60 |
260 | F6 "M1_RAS#" I R 4700 4350 60 |
261 | F7 "M1_WE#" I R 4700 4500 60 |
262 | F8 "M0_CAS#" I R 4700 6300 60 |
263 | F9 "M0_CKE" I R 4700 5950 60 |
264 | F10 "M0_CLK" I R 4700 6050 60 |
265 | F11 "M0_CLK#" I R 4700 6150 60 |
266 | F12 "M0_CS#" I R 4700 4900 60 |
267 | F13 "M1_CLK#" I R 4700 4100 60 |
268 | F14 "M1_CLK" I R 4700 4000 60 |
269 | F15 "M1_CKE" I R 4700 3900 60 |
270 | F16 "M1_CAS#" I R 4700 4250 60 |
271 | F17 "M0_DQ[0..15]" B R 4700 5050 60 |
272 | F18 "M0_UDM" I R 4700 5700 60 |
273 | F19 "M0_LDQS" I R 4700 5500 60 |
274 | F20 "M0_A[0..12]" I R 4700 5150 60 |
275 | F21 "M0_LDM" I R 4700 5800 60 |
276 | F22 "M0_UDQS" I R 4700 5400 60 |
277 | F23 "M1_UDQS" I R 4700 3350 60 |
278 | F24 "M1_LDM" I R 4700 3750 60 |
279 | F25 "M1_LDQS" I R 4700 3450 60 |
280 | F26 "M1_UDM" I R 4700 3650 60 |
281 | F27 "M1_CS#" I R 4700 2800 60 |
282 | F28 "M1_A[0..12]" I R 4700 3050 60 |
283 | F29 "M1_DQ[0..15]" B R 4700 2950 60 |
284 | $EndSheet |
285 | $EndSCHEMATC |
286 |
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