Root/kicad/xue-rnc/xue-rnc.sch

Source at commit cf1645b created 13 years 7 months ago.
By Andres Calderon, DDR0 termaintor placement
1EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
2LIBS:power
3LIBS:r_pack2
4LIBS:v0402mhs03
5LIBS:usb-48204-0001
6LIBS:microsmd075f
7LIBS:mic2550ayts
8LIBS:rj45-48025
9LIBS:xue-nv
10LIBS:xc6slx75fgg484
11LIBS:xc6slx45fgg484
12LIBS:micron_mobile_ddr
13LIBS:micron_ddr_512Mb
14LIBS:k8001
15LIBS:device
16LIBS:transistors
17LIBS:conn
18LIBS:linear
19LIBS:regul
20LIBS:74xx
21LIBS:cmos4000
22LIBS:adc-dac
23LIBS:memory
24LIBS:xilinx
25LIBS:special
26LIBS:microcontrollers
27LIBS:dsp
28LIBS:microchip
29LIBS:analog_switches
30LIBS:motorola
31LIBS:texas
32LIBS:intel
33LIBS:audio
34LIBS:interface
35LIBS:digital-audio
36LIBS:philips
37LIBS:display
38LIBS:cypress
39LIBS:siliconi
40LIBS:opto
41LIBS:atmel
42LIBS:contrib
43LIBS:valves
44LIBS:pasives-connectors
45LIBS:x25x64mb
46LIBS:attiny
47LIBS:xue-rnc-cache
48EELAYER 24 0
49EELAYER END
50$Descr A3 16535 11700
51Sheet 1 7
52Title ""
53Date "17 aug 2010"
54Rev ""
55Comp ""
56Comment1 ""
57Comment2 ""
58Comment3 ""
59Comment4 ""
60$EndDescr
61$Sheet
62S 3650 7300 1100 1300
63U 4C69ED5F
64F0 "PSU" 60
65F1 "PSU.sch" 60
66$EndSheet
67Wire Wire Line
68    10650 4400 9300 4400
69Wire Wire Line
70    10650 4300 9300 4300
71Wire Wire Line
72    10650 3950 9300 3950
73Wire Wire Line
74    10650 3750 9300 3750
75Wire Wire Line
76    10650 3650 9300 3650
77Wire Bus Line
78    10650 4050 9300 4050
79Wire Wire Line
80    10600 6700 9300 6700
81Wire Wire Line
82    9300 3000 10650 3000
83Wire Bus Line
84    10600 7200 9300 7200
85Wire Bus Line
86    9300 7600 10600 7600
87Wire Wire Line
88    10650 5750 9300 5750
89Wire Wire Line
90    10650 5550 9300 5550
91Wire Wire Line
92    9300 7900 10600 7900
93Wire Wire Line
94    9300 7700 10600 7700
95Wire Wire Line
96    9300 7500 10600 7500
97Wire Wire Line
98    9300 7300 10600 7300
99Wire Wire Line
100    9300 7000 10600 7000
101Wire Wire Line
102    9300 6600 10600 6600
103Wire Wire Line
104    9300 6350 10600 6350
105Wire Bus Line
106    4700 2950 5950 2950
107Wire Wire Line
108    4700 3350 5950 3350
109Wire Wire Line
110    4700 3450 5950 3450
111Wire Wire Line
112    4700 3650 5950 3650
113Wire Wire Line
114    4700 4500 5950 4500
115Wire Wire Line
116    4700 4350 5950 4350
117Wire Wire Line
118    4700 4900 5950 4900
119Wire Wire Line
120    4700 6400 5950 6400
121Wire Wire Line
122    4700 5500 5950 5500
123Wire Wire Line
124    4700 5800 5950 5800
125Wire Bus Line
126    4700 5150 5950 5150
127Wire Wire Line
128    4700 4000 5950 4000
129Wire Wire Line
130    4700 6050 5950 6050
131Wire Bus Line
132    4700 5050 5950 5050
133Wire Bus Line
134    5950 5050 5950 5100
135Wire Wire Line
136    4700 6150 5950 6150
137Wire Wire Line
138    5950 4100 4700 4100
139Wire Bus Line
140    4700 3050 5950 3050
141Wire Wire Line
142    4700 5400 5950 5400
143Wire Wire Line
144    4700 5700 5950 5700
145Wire Wire Line
146    4700 6300 5950 6300
147Wire Bus Line
148    4700 5250 5950 5250
149Wire Wire Line
150    4700 6550 5950 6550
151Wire Wire Line
152    4700 5950 5950 5950
153Wire Wire Line
154    4700 4250 5950 4250
155Wire Wire Line
156    4700 3900 5950 3900
157Wire Wire Line
158    4700 3750 5950 3750
159Wire Wire Line
160    4700 2800 5950 2800
161Wire Bus Line
162    4700 3150 5950 3150
163Wire Wire Line
164    9300 6500 10600 6500
165Wire Wire Line
166    10600 6900 9300 6900
167Wire Wire Line
168    9300 7400 10600 7400
169Wire Wire Line
170    9300 7800 10600 7800
171Wire Wire Line
172    10650 5450 9300 5450
173Wire Wire Line
174    10650 5650 9300 5650
175Wire Wire Line
176    10650 5850 9300 5850
177Wire Wire Line
178    9300 2900 10650 2900
179Wire Bus Line
180    9300 3100 10650 3100
181Wire Wire Line
182    10600 6800 9300 6800
183Wire Wire Line
184    9300 3550 10650 3550
185Wire Wire Line
186    10650 3850 9300 3850
187Wire Wire Line
188    10650 3450 9300 3450
189Wire Bus Line
190    10650 4500 9300 4500
191$Sheet
192S 10650 2700 1050 1950
193U 4C4227FE
194F0 "Non volatile memories" 60
195F1 "NV_MEMORIES.sch" 60
196F2 "SD_CMD" I L 10650 3000 60
197F3 "SD_CLK" I L 10650 2900 60
198F4 "SD_DAT[0..3]" B L 10650 3100 60
199F5 "NF_D[0..7]" B L 10650 4050 60
200F6 "NF_ALE" B L 10650 3550 60
201F7 "NF_CLE" B L 10650 3650 60
202F8 "NF_WE_N" B L 10650 3750 60
203F9 "NF_CS1_N" B L 10650 3450 60
204F10 "NF_RE_N" B L 10650 3850 60
205F11 "NF_RNB" B L 10650 3950 60
206F12 "SPI_CLK" I L 10650 4400 60
207F13 "SPI_FLASH_CS#" I L 10650 4300 60
208F14 "SPI_DQ[0..3]" B L 10650 4500 60
209$EndSheet
210$Sheet
211S 10650 5250 1150 750
212U 4C5F1EDC
213F0 "USB" 60
214F1 "USB.sch" 60
215F2 "USBA_SPD" B L 10650 5450 60
216F3 "USBA_OE_N" B L 10650 5550 60
217F4 "USBA_RCV" B L 10650 5650 60
218F5 "USBA_VP" B L 10650 5750 60
219F6 "USBA_VM" B L 10650 5850 60
220$EndSheet
221Text Notes 12850 10750 0 60 ~ 0
222Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com
223$Sheet
224S 5950 2700 3350 5800
225U 4C431A63
226F0 "FPGA Spartan6" 60
227F1 "FPGA.sch" 60
228F2 "M1_CLK" O L 5950 4000 60
229F3 "M1_CLK#" O L 5950 4100 60
230F4 "M0_CLK" O L 5950 6050 60
231F5 "M0_CLK#" O L 5950 6150 60
232F6 "M0_A[0..12]" O L 5950 5150 60
233F7 "M1_A[0..12]" O L 5950 3050 60
234F8 "M0_DQ[0..15]" B L 5950 5050 60
235F9 "M0_UDQS" O L 5950 5400 60
236F10 "M0_LDM" O L 5950 5800 60
237F11 "M0_LDQS" O L 5950 5500 60
238F12 "M0_UDM" O L 5950 5700 60
239F13 "M0_RAS#" O L 5950 6400 60
240F14 "M0_WE#" O L 5950 6550 60
241F15 "M0_CKE" O L 5950 5950 60
242F16 "M0_CAS#" O L 5950 6300 60
243F17 "M1_CAS#" O L 5950 4250 60
244F18 "M1_CKE" O L 5950 3900 60
245F19 "M0_CS#" O L 5950 4900 60
246F20 "M1_CS#" O L 5950 2800 60
247F21 "M1_WE#" O L 5950 4500 60
248F22 "M1_RAS#" O L 5950 4350 60
249F23 "M1_UDM" O L 5950 3650 60
250F24 "M1_LDQS" O L 5950 3450 60
251F25 "M1_LDM" O L 5950 3750 60
252F26 "M1_UDQS" O L 5950 3350 60
253F27 "M1_DQ[0..15]" B L 5950 2950 60
254F28 "M1_BA[0..1]" O L 5950 3150 60
255F29 "M0_BA[0..1]" O L 5950 5250 60
256F30 "USBA_VM" B R 9300 5850 60
257F31 "USBA_VP" B R 9300 5750 60
258F32 "USBA_RCV" B R 9300 5650 60
259F33 "USBA_OE_N" B R 9300 5550 60
260F34 "USBA_SPD" B R 9300 5450 60
261F35 "ETH_CLK" B R 9300 7900 60
262F36 "ETH_RXC" B R 9300 6500 60
263F37 "ETH_TXC" B R 9300 7500 60
264F38 "ETH_TXD[0..3]" O R 9300 7600 60
265F39 "ETH_TXEN" B R 9300 7700 60
266F40 "ETH_TXER" B R 9300 7800 60
267F41 "ETH_RXER" B R 9300 7400 60
268F42 "ETH_RXDV" B R 9300 7300 60
269F43 "ETH_RXD[0..3]" I R 9300 7200 60
270F44 "ETH_RESET_N" B R 9300 6600 60
271F45 "ETH_MDIO" B R 9300 6900 60
272F46 "ETH_MDC" B R 9300 7000 60
273F47 "ETH_INT" B R 9300 6350 60
274F48 "SD_CLK" B R 9300 2900 60
275F49 "SD_CMD" B R 9300 3000 60
276F50 "SD_DAT[0..3]" B R 9300 3100 60
277F51 "ETH_CRS" I R 9300 6700 60
278F52 "ETH_COL" I R 9300 6800 60
279F53 "NF_D[0..7]" B R 9300 4050 60
280F54 "NF_WE_N" O R 9300 3750 60
281F55 "NF_ALE" O R 9300 3550 60
282F56 "NF_CLE" O R 9300 3650 60
283F57 "NF_CS1_N" O R 9300 3450 60
284F58 "NF_RE_N" O R 9300 3850 60
285F59 "NF_RNB" B R 9300 3950 60
286F60 "PROG_CCLK" O R 9300 4400 60
287F61 "PROG_CSO" O R 9300 4300 60
288F62 "PROG_MISO[0..3]" B R 9300 4500 60
289$EndSheet
290$Sheet
291S 10600 6250 1300 1800
292U 4C4320F3
293F0 "Ethernet Phy" 60
294F1 "eth_phy.sch" 60
295F2 "ETH_RXC" O L 10600 6500 60
296F3 "ETH_RST_N" I L 10600 6600 60
297F4 "ETH_CRS" O L 10600 6700 60
298F5 "ETH_COL" O L 10600 6800 60
299F6 "ETH_MDIO" B L 10600 6900 60
300F7 "ETH_MDC" I L 10600 7000 60
301F8 "ETH_RXD[0..3]" O L 10600 7200 60
302F9 "ETH_RXDV" O L 10600 7300 60
303F10 "ETH_RXER" O L 10600 7400 60
304F11 "ETH_TXC" B L 10600 7500 60
305F12 "ETH_TXD[0..3]" I L 10600 7600 60
306F13 "ETH_TXEN" I L 10600 7700 60
307F14 "ETH_TXER" I L 10600 7800 60
308F15 "ETH_CLK" I L 10600 7900 60
309F16 "ETH_INT" O L 10600 6350 60
310$EndSheet
311$Sheet
312S 3600 2700 1100 4000
313U 4C421DD3
314F0 "DDR Banks" 60
315F1 "DRAM.sch" 60
316F2 "M0_BA[0..1]" I R 4700 5250 60
317F3 "M1_BA[0..1]" I R 4700 3150 60
318F4 "M0_WE#" I R 4700 6550 60
319F5 "M0_RAS#" I R 4700 6400 60
320F6 "M1_RAS#" I R 4700 4350 60
321F7 "M1_WE#" I R 4700 4500 60
322F8 "M0_CAS#" I R 4700 6300 60
323F9 "M0_CKE" I R 4700 5950 60
324F10 "M0_CLK" I R 4700 6050 60
325F11 "M0_CLK#" I R 4700 6150 60
326F12 "M0_CS#" I R 4700 4900 60
327F13 "M1_CLK#" I R 4700 4100 60
328F14 "M1_CLK" I R 4700 4000 60
329F15 "M1_CKE" I R 4700 3900 60
330F16 "M1_CAS#" I R 4700 4250 60
331F17 "M0_DQ[0..15]" B R 4700 5050 60
332F18 "M0_UDM" I R 4700 5700 60
333F19 "M0_LDQS" I R 4700 5500 60
334F20 "M0_A[0..12]" I R 4700 5150 60
335F21 "M0_LDM" I R 4700 5800 60
336F22 "M0_UDQS" I R 4700 5400 60
337F23 "M1_UDQS" I R 4700 3350 60
338F24 "M1_LDM" I R 4700 3750 60
339F25 "M1_LDQS" I R 4700 3450 60
340F26 "M1_UDM" I R 4700 3650 60
341F27 "M1_CS#" I R 4700 2800 60
342F28 "M1_A[0..12]" I R 4700 3050 60
343F29 "M1_DQ[0..15]" B R 4700 2950 60
344$EndSheet
345$EndSCHEMATC
346

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