Xué video camera
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Xué video camera Git Source Tree
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Source at commit cf1645b created 13 years 7 months ago. By Andres Calderon, DDR0 termaintor placement | |
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1 | EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT |
2 | LIBS:power |
3 | LIBS:r_pack2 |
4 | LIBS:v0402mhs03 |
5 | LIBS:usb-48204-0001 |
6 | LIBS:microsmd075f |
7 | LIBS:mic2550ayts |
8 | LIBS:rj45-48025 |
9 | LIBS:xue-nv |
10 | LIBS:xc6slx75fgg484 |
11 | LIBS:xc6slx45fgg484 |
12 | LIBS:micron_mobile_ddr |
13 | LIBS:micron_ddr_512Mb |
14 | LIBS:k8001 |
15 | LIBS:device |
16 | LIBS:transistors |
17 | LIBS:conn |
18 | LIBS:linear |
19 | LIBS:regul |
20 | LIBS:74xx |
21 | LIBS:cmos4000 |
22 | LIBS:adc-dac |
23 | LIBS:memory |
24 | LIBS:xilinx |
25 | LIBS:special |
26 | LIBS:microcontrollers |
27 | LIBS:dsp |
28 | LIBS:microchip |
29 | LIBS:analog_switches |
30 | LIBS:motorola |
31 | LIBS:texas |
32 | LIBS:intel |
33 | LIBS:audio |
34 | LIBS:interface |
35 | LIBS:digital-audio |
36 | LIBS:philips |
37 | LIBS:display |
38 | LIBS:cypress |
39 | LIBS:siliconi |
40 | LIBS:opto |
41 | LIBS:atmel |
42 | LIBS:contrib |
43 | LIBS:valves |
44 | LIBS:pasives-connectors |
45 | LIBS:x25x64mb |
46 | LIBS:attiny |
47 | LIBS:xue-rnc-cache |
48 | EELAYER 24 0 |
49 | EELAYER END |
50 | $Descr A3 16535 11700 |
51 | Sheet 1 7 |
52 | Title "" |
53 | Date "17 aug 2010" |
54 | Rev "" |
55 | Comp "" |
56 | Comment1 "" |
57 | Comment2 "" |
58 | Comment3 "" |
59 | Comment4 "" |
60 | $EndDescr |
61 | $Sheet |
62 | S 3650 7300 1100 1300 |
63 | U 4C69ED5F |
64 | F0 "PSU" 60 |
65 | F1 "PSU.sch" 60 |
66 | $EndSheet |
67 | Wire Wire Line |
68 | 10650 4400 9300 4400 |
69 | Wire Wire Line |
70 | 10650 4300 9300 4300 |
71 | Wire Wire Line |
72 | 10650 3950 9300 3950 |
73 | Wire Wire Line |
74 | 10650 3750 9300 3750 |
75 | Wire Wire Line |
76 | 10650 3650 9300 3650 |
77 | Wire Bus Line |
78 | 10650 4050 9300 4050 |
79 | Wire Wire Line |
80 | 10600 6700 9300 6700 |
81 | Wire Wire Line |
82 | 9300 3000 10650 3000 |
83 | Wire Bus Line |
84 | 10600 7200 9300 7200 |
85 | Wire Bus Line |
86 | 9300 7600 10600 7600 |
87 | Wire Wire Line |
88 | 10650 5750 9300 5750 |
89 | Wire Wire Line |
90 | 10650 5550 9300 5550 |
91 | Wire Wire Line |
92 | 9300 7900 10600 7900 |
93 | Wire Wire Line |
94 | 9300 7700 10600 7700 |
95 | Wire Wire Line |
96 | 9300 7500 10600 7500 |
97 | Wire Wire Line |
98 | 9300 7300 10600 7300 |
99 | Wire Wire Line |
100 | 9300 7000 10600 7000 |
101 | Wire Wire Line |
102 | 9300 6600 10600 6600 |
103 | Wire Wire Line |
104 | 9300 6350 10600 6350 |
105 | Wire Bus Line |
106 | 4700 2950 5950 2950 |
107 | Wire Wire Line |
108 | 4700 3350 5950 3350 |
109 | Wire Wire Line |
110 | 4700 3450 5950 3450 |
111 | Wire Wire Line |
112 | 4700 3650 5950 3650 |
113 | Wire Wire Line |
114 | 4700 4500 5950 4500 |
115 | Wire Wire Line |
116 | 4700 4350 5950 4350 |
117 | Wire Wire Line |
118 | 4700 4900 5950 4900 |
119 | Wire Wire Line |
120 | 4700 6400 5950 6400 |
121 | Wire Wire Line |
122 | 4700 5500 5950 5500 |
123 | Wire Wire Line |
124 | 4700 5800 5950 5800 |
125 | Wire Bus Line |
126 | 4700 5150 5950 5150 |
127 | Wire Wire Line |
128 | 4700 4000 5950 4000 |
129 | Wire Wire Line |
130 | 4700 6050 5950 6050 |
131 | Wire Bus Line |
132 | 4700 5050 5950 5050 |
133 | Wire Bus Line |
134 | 5950 5050 5950 5100 |
135 | Wire Wire Line |
136 | 4700 6150 5950 6150 |
137 | Wire Wire Line |
138 | 5950 4100 4700 4100 |
139 | Wire Bus Line |
140 | 4700 3050 5950 3050 |
141 | Wire Wire Line |
142 | 4700 5400 5950 5400 |
143 | Wire Wire Line |
144 | 4700 5700 5950 5700 |
145 | Wire Wire Line |
146 | 4700 6300 5950 6300 |
147 | Wire Bus Line |
148 | 4700 5250 5950 5250 |
149 | Wire Wire Line |
150 | 4700 6550 5950 6550 |
151 | Wire Wire Line |
152 | 4700 5950 5950 5950 |
153 | Wire Wire Line |
154 | 4700 4250 5950 4250 |
155 | Wire Wire Line |
156 | 4700 3900 5950 3900 |
157 | Wire Wire Line |
158 | 4700 3750 5950 3750 |
159 | Wire Wire Line |
160 | 4700 2800 5950 2800 |
161 | Wire Bus Line |
162 | 4700 3150 5950 3150 |
163 | Wire Wire Line |
164 | 9300 6500 10600 6500 |
165 | Wire Wire Line |
166 | 10600 6900 9300 6900 |
167 | Wire Wire Line |
168 | 9300 7400 10600 7400 |
169 | Wire Wire Line |
170 | 9300 7800 10600 7800 |
171 | Wire Wire Line |
172 | 10650 5450 9300 5450 |
173 | Wire Wire Line |
174 | 10650 5650 9300 5650 |
175 | Wire Wire Line |
176 | 10650 5850 9300 5850 |
177 | Wire Wire Line |
178 | 9300 2900 10650 2900 |
179 | Wire Bus Line |
180 | 9300 3100 10650 3100 |
181 | Wire Wire Line |
182 | 10600 6800 9300 6800 |
183 | Wire Wire Line |
184 | 9300 3550 10650 3550 |
185 | Wire Wire Line |
186 | 10650 3850 9300 3850 |
187 | Wire Wire Line |
188 | 10650 3450 9300 3450 |
189 | Wire Bus Line |
190 | 10650 4500 9300 4500 |
191 | $Sheet |
192 | S 10650 2700 1050 1950 |
193 | U 4C4227FE |
194 | F0 "Non volatile memories" 60 |
195 | F1 "NV_MEMORIES.sch" 60 |
196 | F2 "SD_CMD" I L 10650 3000 60 |
197 | F3 "SD_CLK" I L 10650 2900 60 |
198 | F4 "SD_DAT[0..3]" B L 10650 3100 60 |
199 | F5 "NF_D[0..7]" B L 10650 4050 60 |
200 | F6 "NF_ALE" B L 10650 3550 60 |
201 | F7 "NF_CLE" B L 10650 3650 60 |
202 | F8 "NF_WE_N" B L 10650 3750 60 |
203 | F9 "NF_CS1_N" B L 10650 3450 60 |
204 | F10 "NF_RE_N" B L 10650 3850 60 |
205 | F11 "NF_RNB" B L 10650 3950 60 |
206 | F12 "SPI_CLK" I L 10650 4400 60 |
207 | F13 "SPI_FLASH_CS#" I L 10650 4300 60 |
208 | F14 "SPI_DQ[0..3]" B L 10650 4500 60 |
209 | $EndSheet |
210 | $Sheet |
211 | S 10650 5250 1150 750 |
212 | U 4C5F1EDC |
213 | F0 "USB" 60 |
214 | F1 "USB.sch" 60 |
215 | F2 "USBA_SPD" B L 10650 5450 60 |
216 | F3 "USBA_OE_N" B L 10650 5550 60 |
217 | F4 "USBA_RCV" B L 10650 5650 60 |
218 | F5 "USBA_VP" B L 10650 5750 60 |
219 | F6 "USBA_VM" B L 10650 5850 60 |
220 | $EndSheet |
221 | Text Notes 12850 10750 0 60 ~ 0 |
222 | Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com |
223 | $Sheet |
224 | S 5950 2700 3350 5800 |
225 | U 4C431A63 |
226 | F0 "FPGA Spartan6" 60 |
227 | F1 "FPGA.sch" 60 |
228 | F2 "M1_CLK" O L 5950 4000 60 |
229 | F3 "M1_CLK#" O L 5950 4100 60 |
230 | F4 "M0_CLK" O L 5950 6050 60 |
231 | F5 "M0_CLK#" O L 5950 6150 60 |
232 | F6 "M0_A[0..12]" O L 5950 5150 60 |
233 | F7 "M1_A[0..12]" O L 5950 3050 60 |
234 | F8 "M0_DQ[0..15]" B L 5950 5050 60 |
235 | F9 "M0_UDQS" O L 5950 5400 60 |
236 | F10 "M0_LDM" O L 5950 5800 60 |
237 | F11 "M0_LDQS" O L 5950 5500 60 |
238 | F12 "M0_UDM" O L 5950 5700 60 |
239 | F13 "M0_RAS#" O L 5950 6400 60 |
240 | F14 "M0_WE#" O L 5950 6550 60 |
241 | F15 "M0_CKE" O L 5950 5950 60 |
242 | F16 "M0_CAS#" O L 5950 6300 60 |
243 | F17 "M1_CAS#" O L 5950 4250 60 |
244 | F18 "M1_CKE" O L 5950 3900 60 |
245 | F19 "M0_CS#" O L 5950 4900 60 |
246 | F20 "M1_CS#" O L 5950 2800 60 |
247 | F21 "M1_WE#" O L 5950 4500 60 |
248 | F22 "M1_RAS#" O L 5950 4350 60 |
249 | F23 "M1_UDM" O L 5950 3650 60 |
250 | F24 "M1_LDQS" O L 5950 3450 60 |
251 | F25 "M1_LDM" O L 5950 3750 60 |
252 | F26 "M1_UDQS" O L 5950 3350 60 |
253 | F27 "M1_DQ[0..15]" B L 5950 2950 60 |
254 | F28 "M1_BA[0..1]" O L 5950 3150 60 |
255 | F29 "M0_BA[0..1]" O L 5950 5250 60 |
256 | F30 "USBA_VM" B R 9300 5850 60 |
257 | F31 "USBA_VP" B R 9300 5750 60 |
258 | F32 "USBA_RCV" B R 9300 5650 60 |
259 | F33 "USBA_OE_N" B R 9300 5550 60 |
260 | F34 "USBA_SPD" B R 9300 5450 60 |
261 | F35 "ETH_CLK" B R 9300 7900 60 |
262 | F36 "ETH_RXC" B R 9300 6500 60 |
263 | F37 "ETH_TXC" B R 9300 7500 60 |
264 | F38 "ETH_TXD[0..3]" O R 9300 7600 60 |
265 | F39 "ETH_TXEN" B R 9300 7700 60 |
266 | F40 "ETH_TXER" B R 9300 7800 60 |
267 | F41 "ETH_RXER" B R 9300 7400 60 |
268 | F42 "ETH_RXDV" B R 9300 7300 60 |
269 | F43 "ETH_RXD[0..3]" I R 9300 7200 60 |
270 | F44 "ETH_RESET_N" B R 9300 6600 60 |
271 | F45 "ETH_MDIO" B R 9300 6900 60 |
272 | F46 "ETH_MDC" B R 9300 7000 60 |
273 | F47 "ETH_INT" B R 9300 6350 60 |
274 | F48 "SD_CLK" B R 9300 2900 60 |
275 | F49 "SD_CMD" B R 9300 3000 60 |
276 | F50 "SD_DAT[0..3]" B R 9300 3100 60 |
277 | F51 "ETH_CRS" I R 9300 6700 60 |
278 | F52 "ETH_COL" I R 9300 6800 60 |
279 | F53 "NF_D[0..7]" B R 9300 4050 60 |
280 | F54 "NF_WE_N" O R 9300 3750 60 |
281 | F55 "NF_ALE" O R 9300 3550 60 |
282 | F56 "NF_CLE" O R 9300 3650 60 |
283 | F57 "NF_CS1_N" O R 9300 3450 60 |
284 | F58 "NF_RE_N" O R 9300 3850 60 |
285 | F59 "NF_RNB" B R 9300 3950 60 |
286 | F60 "PROG_CCLK" O R 9300 4400 60 |
287 | F61 "PROG_CSO" O R 9300 4300 60 |
288 | F62 "PROG_MISO[0..3]" B R 9300 4500 60 |
289 | $EndSheet |
290 | $Sheet |
291 | S 10600 6250 1300 1800 |
292 | U 4C4320F3 |
293 | F0 "Ethernet Phy" 60 |
294 | F1 "eth_phy.sch" 60 |
295 | F2 "ETH_RXC" O L 10600 6500 60 |
296 | F3 "ETH_RST_N" I L 10600 6600 60 |
297 | F4 "ETH_CRS" O L 10600 6700 60 |
298 | F5 "ETH_COL" O L 10600 6800 60 |
299 | F6 "ETH_MDIO" B L 10600 6900 60 |
300 | F7 "ETH_MDC" I L 10600 7000 60 |
301 | F8 "ETH_RXD[0..3]" O L 10600 7200 60 |
302 | F9 "ETH_RXDV" O L 10600 7300 60 |
303 | F10 "ETH_RXER" O L 10600 7400 60 |
304 | F11 "ETH_TXC" B L 10600 7500 60 |
305 | F12 "ETH_TXD[0..3]" I L 10600 7600 60 |
306 | F13 "ETH_TXEN" I L 10600 7700 60 |
307 | F14 "ETH_TXER" I L 10600 7800 60 |
308 | F15 "ETH_CLK" I L 10600 7900 60 |
309 | F16 "ETH_INT" O L 10600 6350 60 |
310 | $EndSheet |
311 | $Sheet |
312 | S 3600 2700 1100 4000 |
313 | U 4C421DD3 |
314 | F0 "DDR Banks" 60 |
315 | F1 "DRAM.sch" 60 |
316 | F2 "M0_BA[0..1]" I R 4700 5250 60 |
317 | F3 "M1_BA[0..1]" I R 4700 3150 60 |
318 | F4 "M0_WE#" I R 4700 6550 60 |
319 | F5 "M0_RAS#" I R 4700 6400 60 |
320 | F6 "M1_RAS#" I R 4700 4350 60 |
321 | F7 "M1_WE#" I R 4700 4500 60 |
322 | F8 "M0_CAS#" I R 4700 6300 60 |
323 | F9 "M0_CKE" I R 4700 5950 60 |
324 | F10 "M0_CLK" I R 4700 6050 60 |
325 | F11 "M0_CLK#" I R 4700 6150 60 |
326 | F12 "M0_CS#" I R 4700 4900 60 |
327 | F13 "M1_CLK#" I R 4700 4100 60 |
328 | F14 "M1_CLK" I R 4700 4000 60 |
329 | F15 "M1_CKE" I R 4700 3900 60 |
330 | F16 "M1_CAS#" I R 4700 4250 60 |
331 | F17 "M0_DQ[0..15]" B R 4700 5050 60 |
332 | F18 "M0_UDM" I R 4700 5700 60 |
333 | F19 "M0_LDQS" I R 4700 5500 60 |
334 | F20 "M0_A[0..12]" I R 4700 5150 60 |
335 | F21 "M0_LDM" I R 4700 5800 60 |
336 | F22 "M0_UDQS" I R 4700 5400 60 |
337 | F23 "M1_UDQS" I R 4700 3350 60 |
338 | F24 "M1_LDM" I R 4700 3750 60 |
339 | F25 "M1_LDQS" I R 4700 3450 60 |
340 | F26 "M1_UDM" I R 4700 3650 60 |
341 | F27 "M1_CS#" I R 4700 2800 60 |
342 | F28 "M1_A[0..12]" I R 4700 3050 60 |
343 | F29 "M1_DQ[0..15]" B R 4700 2950 60 |
344 | $EndSheet |
345 | $EndSCHEMATC |
346 |
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