Root/kicad/xue-rnc/xue-rnc.sch

Source at commit ef72b75 created 13 years 7 months ago.
By Andres Calderon, eth-phy placement
1EESchema Schematic File Version 2 date Sat 14 Aug 2010 07:07:48 AM COT
2LIBS:power
3LIBS:v0402mhs03
4LIBS:usb-48204-0001
5LIBS:microsmd075f
6LIBS:mic2550ayts
7LIBS:rj45-48025
8LIBS:xue-nv
9LIBS:xc6slx75fgg484
10LIBS:xc6slx45fgg484
11LIBS:micron_mobile_ddr
12LIBS:micron_ddr_512Mb
13LIBS:k8001
14LIBS:device
15LIBS:transistors
16LIBS:conn
17LIBS:linear
18LIBS:regul
19LIBS:74xx
20LIBS:cmos4000
21LIBS:adc-dac
22LIBS:memory
23LIBS:xilinx
24LIBS:special
25LIBS:microcontrollers
26LIBS:dsp
27LIBS:microchip
28LIBS:analog_switches
29LIBS:motorola
30LIBS:texas
31LIBS:intel
32LIBS:audio
33LIBS:interface
34LIBS:digital-audio
35LIBS:philips
36LIBS:display
37LIBS:cypress
38LIBS:siliconi
39LIBS:opto
40LIBS:atmel
41LIBS:contrib
42LIBS:valves
43LIBS:pasives-connectors
44LIBS:x25x64mb
45LIBS:xue-rnc-cache
46EELAYER 24 0
47EELAYER END
48$Descr A3 16535 11700
49Sheet 1 6
50Title ""
51Date "14 aug 2010"
52Rev ""
53Comp ""
54Comment1 ""
55Comment2 ""
56Comment3 ""
57Comment4 ""
58$EndDescr
59Wire Wire Line
60    10650 4400 9300 4400
61Wire Wire Line
62    10650 4300 9300 4300
63Wire Wire Line
64    10650 3950 9300 3950
65Wire Wire Line
66    10650 3750 9300 3750
67Wire Wire Line
68    10650 3650 9300 3650
69Wire Bus Line
70    10650 4050 9300 4050
71Wire Wire Line
72    10600 6700 9300 6700
73Wire Wire Line
74    9300 3000 10650 3000
75Wire Bus Line
76    10600 7200 9300 7200
77Wire Bus Line
78    9300 7600 10600 7600
79Wire Wire Line
80    10650 5750 9300 5750
81Wire Wire Line
82    10650 5550 9300 5550
83Wire Wire Line
84    9300 7900 10600 7900
85Wire Wire Line
86    9300 7700 10600 7700
87Wire Wire Line
88    9300 7500 10600 7500
89Wire Wire Line
90    9300 7300 10600 7300
91Wire Wire Line
92    9300 7000 10600 7000
93Wire Wire Line
94    9300 6600 10600 6600
95Wire Wire Line
96    9300 6350 10600 6350
97Wire Bus Line
98    4700 2950 5950 2950
99Wire Wire Line
100    4700 3350 5950 3350
101Wire Wire Line
102    4700 3450 5950 3450
103Wire Wire Line
104    4700 3650 5950 3650
105Wire Wire Line
106    4700 4500 5950 4500
107Wire Wire Line
108    4700 4350 5950 4350
109Wire Wire Line
110    4700 4900 5950 4900
111Wire Wire Line
112    4700 6400 5950 6400
113Wire Wire Line
114    4700 5500 5950 5500
115Wire Wire Line
116    4700 5800 5950 5800
117Wire Bus Line
118    4700 5150 5950 5150
119Wire Wire Line
120    4700 4000 5950 4000
121Wire Wire Line
122    4700 6050 5950 6050
123Wire Bus Line
124    4700 5050 5950 5050
125Wire Bus Line
126    5950 5050 5950 5100
127Wire Wire Line
128    4700 6150 5950 6150
129Wire Wire Line
130    5950 4100 4700 4100
131Wire Bus Line
132    4700 3050 5950 3050
133Wire Wire Line
134    4700 5400 5950 5400
135Wire Wire Line
136    4700 5700 5950 5700
137Wire Wire Line
138    4700 6300 5950 6300
139Wire Bus Line
140    4700 5250 5950 5250
141Wire Wire Line
142    4700 6550 5950 6550
143Wire Wire Line
144    4700 5950 5950 5950
145Wire Wire Line
146    4700 4250 5950 4250
147Wire Wire Line
148    4700 3900 5950 3900
149Wire Wire Line
150    4700 3750 5950 3750
151Wire Wire Line
152    4700 2800 5950 2800
153Wire Bus Line
154    4700 3150 5950 3150
155Wire Wire Line
156    9300 6500 10600 6500
157Wire Wire Line
158    10600 6900 9300 6900
159Wire Wire Line
160    9300 7400 10600 7400
161Wire Wire Line
162    9300 7800 10600 7800
163Wire Wire Line
164    10650 5450 9300 5450
165Wire Wire Line
166    10650 5650 9300 5650
167Wire Wire Line
168    10650 5850 9300 5850
169Wire Wire Line
170    9300 2900 10650 2900
171Wire Bus Line
172    9300 3100 10650 3100
173Wire Wire Line
174    10600 6800 9300 6800
175Wire Wire Line
176    9300 3550 10650 3550
177Wire Wire Line
178    10650 3850 9300 3850
179Wire Wire Line
180    10650 3450 9300 3450
181Wire Bus Line
182    10650 4500 9300 4500
183$Sheet
184S 10650 2700 1050 1950
185U 4C4227FE
186F0 "Non volatile memories" 60
187F1 "NV_MEMORIES.sch" 60
188F2 "SD_CMD" I L 10650 3000 60
189F3 "SD_CLK" I L 10650 2900 60
190F4 "SD_DAT[0..3]" B L 10650 3100 60
191F5 "NF_D[0..7]" B L 10650 4050 60
192F6 "NF_ALE" B L 10650 3550 60
193F7 "NF_CLE" B L 10650 3650 60
194F8 "NF_WE_N" B L 10650 3750 60
195F9 "NF_CS1_N" B L 10650 3450 60
196F10 "NF_RE_N" B L 10650 3850 60
197F11 "NF_RNB" B L 10650 3950 60
198F12 "SPI_CLK" I L 10650 4400 60
199F13 "SPI_FLASH_CS#" I L 10650 4300 60
200F14 "SPI_DQ[0..3]" B L 10650 4500 60
201$EndSheet
202$Sheet
203S 10650 5250 1150 750
204U 4C5F1EDC
205F0 "USB" 60
206F1 "USB.sch" 60
207F2 "USBA_SPD" B L 10650 5450 60
208F3 "USBA_OE_N" B L 10650 5550 60
209F4 "USBA_RCV" B L 10650 5650 60
210F5 "USBA_VP" B L 10650 5750 60
211F6 "USBA_VM" B L 10650 5850 60
212$EndSheet
213Text Notes 12850 10750 0 60 ~ 0
214Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com
215$Sheet
216S 5950 2700 3350 5800
217U 4C431A63
218F0 "FPGA Spartan6" 60
219F1 "FPGA.sch" 60
220F2 "M1_CLK" O L 5950 4000 60
221F3 "M1_CLK#" O L 5950 4100 60
222F4 "M0_CLK" O L 5950 6050 60
223F5 "M0_CLK#" O L 5950 6150 60
224F6 "M0_A[0..12]" O L 5950 5150 60
225F7 "M1_A[0..12]" O L 5950 3050 60
226F8 "M0_DQ[0..15]" B L 5950 5050 60
227F9 "M0_UDQS" O L 5950 5400 60
228F10 "M0_LDM" O L 5950 5800 60
229F11 "M0_LDQS" O L 5950 5500 60
230F12 "M0_UDM" O L 5950 5700 60
231F13 "M0_RAS#" O L 5950 6400 60
232F14 "M0_WE#" O L 5950 6550 60
233F15 "M0_CKE" O L 5950 5950 60
234F16 "M0_CAS#" O L 5950 6300 60
235F17 "M1_CAS#" O L 5950 4250 60
236F18 "M1_CKE" O L 5950 3900 60
237F19 "M0_CS#" O L 5950 4900 60
238F20 "M1_CS#" O L 5950 2800 60
239F21 "M1_WE#" O L 5950 4500 60
240F22 "M1_RAS#" O L 5950 4350 60
241F23 "M1_UDM" O L 5950 3650 60
242F24 "M1_LDQS" O L 5950 3450 60
243F25 "M1_LDM" O L 5950 3750 60
244F26 "M1_UDQS" O L 5950 3350 60
245F27 "M1_DQ[0..15]" B L 5950 2950 60
246F28 "M1_BA[0..1]" O L 5950 3150 60
247F29 "M0_BA[0..1]" O L 5950 5250 60
248F30 "USBA_VM" B R 9300 5850 60
249F31 "USBA_VP" B R 9300 5750 60
250F32 "USBA_RCV" B R 9300 5650 60
251F33 "USBA_OE_N" B R 9300 5550 60
252F34 "USBA_SPD" B R 9300 5450 60
253F35 "ETH_CLK" B R 9300 7900 60
254F36 "ETH_RXC" B R 9300 6500 60
255F37 "ETH_TXC" B R 9300 7500 60
256F38 "ETH_TXD[0..3]" O R 9300 7600 60
257F39 "ETH_TXEN" B R 9300 7700 60
258F40 "ETH_TXER" B R 9300 7800 60
259F41 "ETH_RXER" B R 9300 7400 60
260F42 "ETH_RXDV" B R 9300 7300 60
261F43 "ETH_RXD[0..3]" I R 9300 7200 60
262F44 "ETH_RESET_N" B R 9300 6600 60
263F45 "ETH_MDIO" B R 9300 6900 60
264F46 "ETH_MDC" B R 9300 7000 60
265F47 "ETH_INT" B R 9300 6350 60
266F48 "SD_CLK" B R 9300 2900 60
267F49 "SD_CMD" B R 9300 3000 60
268F50 "SD_DAT[0..3]" B R 9300 3100 60
269F51 "ETH_CRS" I R 9300 6700 60
270F52 "ETH_COL" I R 9300 6800 60
271F53 "NF_D[0..7]" B R 9300 4050 60
272F54 "NF_WE_N" O R 9300 3750 60
273F55 "NF_ALE" O R 9300 3550 60
274F56 "NF_CLE" O R 9300 3650 60
275F57 "NF_CS1_N" O R 9300 3450 60
276F58 "NF_RE_N" O R 9300 3850 60
277F59 "NF_RNB" B R 9300 3950 60
278F60 "PROG_CCLK" O R 9300 4400 60
279F61 "PROG_CSO" O R 9300 4300 60
280F62 "PROG_MISO[0..3]" B R 9300 4500 60
281$EndSheet
282$Sheet
283S 10600 6250 1300 1800
284U 4C4320F3
285F0 "Ethernet Phy" 60
286F1 "eth_phy.sch" 60
287F2 "ETH_RXC" O L 10600 6500 60
288F3 "ETH_RST_N" I L 10600 6600 60
289F4 "ETH_CRS" O L 10600 6700 60
290F5 "ETH_COL" O L 10600 6800 60
291F6 "ETH_MDIO" B L 10600 6900 60
292F7 "ETH_MDC" I L 10600 7000 60
293F8 "ETH_RXD[0..3]" O L 10600 7200 60
294F9 "ETH_RXDV" O L 10600 7300 60
295F10 "ETH_RXER" O L 10600 7400 60
296F11 "ETH_TXC" B L 10600 7500 60
297F12 "ETH_TXD[0..3]" I L 10600 7600 60
298F13 "ETH_TXEN" I L 10600 7700 60
299F14 "ETH_TXER" I L 10600 7800 60
300F15 "ETH_CLK" I L 10600 7900 60
301F16 "ETH_INT" O L 10600 6350 60
302$EndSheet
303$Sheet
304S 3600 2700 1100 4000
305U 4C421DD3
306F0 "DDR Banks" 60
307F1 "DRAM.sch" 60
308F2 "M0_BA[0..1]" I R 4700 5250 60
309F3 "M1_BA[0..1]" I R 4700 3150 60
310F4 "M0_WE#" I R 4700 6550 60
311F5 "M0_RAS#" I R 4700 6400 60
312F6 "M1_RAS#" I R 4700 4350 60
313F7 "M1_WE#" I R 4700 4500 60
314F8 "M0_CAS#" I R 4700 6300 60
315F9 "M0_CKE" I R 4700 5950 60
316F10 "M0_CLK" I R 4700 6050 60
317F11 "M0_CLK#" I R 4700 6150 60
318F12 "M0_CS#" I R 4700 4900 60
319F13 "M1_CLK#" I R 4700 4100 60
320F14 "M1_CLK" I R 4700 4000 60
321F15 "M1_CKE" I R 4700 3900 60
322F16 "M1_CAS#" I R 4700 4250 60
323F17 "M0_DQ[0..15]" B R 4700 5050 60
324F18 "M0_UDM" I R 4700 5700 60
325F19 "M0_LDQS" I R 4700 5500 60
326F20 "M0_A[0..12]" I R 4700 5150 60
327F21 "M0_LDM" I R 4700 5800 60
328F22 "M0_UDQS" I R 4700 5400 60
329F23 "M1_UDQS" I R 4700 3350 60
330F24 "M1_LDM" I R 4700 3750 60
331F25 "M1_LDQS" I R 4700 3450 60
332F26 "M1_UDM" I R 4700 3650 60
333F27 "M1_CS#" I R 4700 2800 60
334F28 "M1_A[0..12]" I R 4700 3050 60
335F29 "M1_DQ[0..15]" B R 4700 2950 60
336$EndSheet
337$EndSCHEMATC
338

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