Root/xue-rnc/xue-rnc.sch

1EESchema Schematic File Version 2 date Fri 31 Dec 2010 10:28:45 AM COT
2LIBS:power
3LIBS:r_pack2
4LIBS:v0402mhs03
5LIBS:usb-48204-0001
6LIBS:microsmd075f
7LIBS:mic2550
8LIBS:rj45-48025
9LIBS:xue-nv
10LIBS:xc6slx75fgg484
11LIBS:xc6slx45fgg484
12LIBS:micron_mobile_ddr
13LIBS:micron_ddr_512Mb
14LIBS:k8001
15LIBS:device
16LIBS:transistors
17LIBS:conn
18LIBS:linear
19LIBS:regul
20LIBS:74xx
21LIBS:cmos4000
22LIBS:adc-dac
23LIBS:memory
24LIBS:xilinx
25LIBS:special
26LIBS:microcontrollers
27LIBS:dsp
28LIBS:microchip
29LIBS:analog_switches
30LIBS:motorola
31LIBS:texas
32LIBS:intel
33LIBS:audio
34LIBS:interface
35LIBS:digital-audio
36LIBS:philips
37LIBS:display
38LIBS:cypress
39LIBS:siliconi
40LIBS:opto
41LIBS:atmel
42LIBS:contrib
43LIBS:valves
44LIBS:pasives-connectors
45LIBS:x25x64mb
46LIBS:attiny
47LIBS:PSU
48LIBS:tps793xx
49LIBS:reg102
50LIBS:mt9m033
51LIBS:m12-tu400a
52LIBS:ft2232c
53LIBS:fxo-hc536r
54LIBS:zx62d-b-5p8
55LIBS:a7130
56EELAYER 24 0
57EELAYER END
58$Descr A3 16535 11700
59Sheet 1 9
60Title ""
61Date "31 dec 2010"
62Rev ""
63Comp ""
64Comment1 ""
65Comment2 ""
66Comment3 ""
67Comment4 ""
68$EndDescr
69$Sheet
70S 4000 950 1200 750
71U 4C69ED5F
72F0 "psu" 60
73F1 "psu.sch" 60
74$EndSheet
75Wire Bus Line
76    9550 5600 10900 5600
77Wire Wire Line
78    5200 4050 6200 4050
79Wire Wire Line
80    5200 3050 6200 3050
81Wire Wire Line
82    5200 3850 6200 3850
83Wire Wire Line
84    5200 3650 6200 3650
85Wire Wire Line
86    6200 3450 5200 3450
87Wire Wire Line
88    5200 3250 6200 3250
89Wire Bus Line
90    6200 4550 5200 4550
91Wire Wire Line
92    10850 10100 9500 10100
93Wire Wire Line
94    10850 9900 9500 9900
95Wire Wire Line
96    6200 2400 5200 2400
97Wire Wire Line
98    6200 2200 5200 2200
99Wire Wire Line
100    10900 4600 9550 4600
101Wire Wire Line
102    10900 4500 9550 4500
103Wire Wire Line
104    10900 4150 9550 4150
105Wire Wire Line
106    10900 3950 9550 3950
107Wire Wire Line
108    10900 3850 9550 3850
109Wire Bus Line
110    10900 4250 9550 4250
111Wire Wire Line
112    10850 1300 9550 1300
113Wire Wire Line
114    9550 3200 10900 3200
115Wire Bus Line
116    10850 1800 9550 1800
117Wire Bus Line
118    9550 2200 10850 2200
119Wire Wire Line
120    10850 9500 9500 9500
121Wire Wire Line
122    10850 9300 9500 9300
123Wire Wire Line
124    9550 2500 10850 2500
125Wire Wire Line
126    9550 2300 10850 2300
127Wire Wire Line
128    9550 2100 10850 2100
129Wire Wire Line
130    9550 1900 10850 1900
131Wire Wire Line
132    9550 1600 10850 1600
133Wire Wire Line
134    9550 1200 10850 1200
135Wire Wire Line
136    9550 950 10850 950
137Wire Bus Line
138    4950 6800 6200 6800
139Wire Wire Line
140    4950 7200 6200 7200
141Wire Wire Line
142    4950 7300 6200 7300
143Wire Wire Line
144    4950 7500 6200 7500
145Wire Wire Line
146    4950 8350 6200 8350
147Wire Wire Line
148    4950 8200 6200 8200
149Wire Wire Line
150    4950 8750 6200 8750
151Wire Wire Line
152    4950 10250 6200 10250
153Wire Wire Line
154    4950 9350 6200 9350
155Wire Wire Line
156    4950 9650 6200 9650
157Wire Bus Line
158    4950 9000 6200 9000
159Wire Wire Line
160    4950 7850 6200 7850
161Wire Wire Line
162    4950 9900 6200 9900
163Wire Bus Line
164    4950 8900 6200 8900
165Wire Bus Line
166    6200 8900 6200 8950
167Wire Wire Line
168    4950 10000 6200 10000
169Wire Wire Line
170    6200 7950 4950 7950
171Wire Bus Line
172    4950 6900 6200 6900
173Wire Wire Line
174    4950 9250 6200 9250
175Wire Wire Line
176    4950 9550 6200 9550
177Wire Wire Line
178    4950 10150 6200 10150
179Wire Bus Line
180    4950 9100 6200 9100
181Wire Wire Line
182    4950 10400 6200 10400
183Wire Wire Line
184    4950 9800 6200 9800
185Wire Wire Line
186    4950 8100 6200 8100
187Wire Wire Line
188    4950 7750 6200 7750
189Wire Wire Line
190    4950 7600 6200 7600
191Wire Wire Line
192    4950 6650 6200 6650
193Wire Bus Line
194    4950 7000 6200 7000
195Wire Wire Line
196    9550 1100 10850 1100
197Wire Wire Line
198    10850 1500 9550 1500
199Wire Wire Line
200    9550 2000 10850 2000
201Wire Wire Line
202    9550 2400 10850 2400
203Wire Wire Line
204    10850 9200 9500 9200
205Wire Wire Line
206    10850 9400 9500 9400
207Wire Wire Line
208    10850 9600 9500 9600
209Wire Wire Line
210    9550 3100 10900 3100
211Wire Bus Line
212    9550 3300 10900 3300
213Wire Wire Line
214    10850 1400 9550 1400
215Wire Wire Line
216    9550 3750 10900 3750
217Wire Wire Line
218    10900 4050 9550 4050
219Wire Wire Line
220    10900 3650 9550 3650
221Wire Bus Line
222    10900 4700 9550 4700
223Wire Wire Line
224    6200 2100 5200 2100
225Wire Wire Line
226    5200 2300 6200 2300
227Wire Wire Line
228    10850 9800 9500 9800
229Wire Wire Line
230    10850 10000 9500 10000
231Wire Wire Line
232    10850 10200 9500 10200
233Wire Wire Line
234    6200 3150 5200 3150
235Wire Wire Line
236    5200 3350 6200 3350
237Wire Wire Line
238    5200 3550 6200 3550
239Wire Wire Line
240    5200 3750 6200 3750
241Wire Wire Line
242    6200 2950 5200 2950
243Wire Wire Line
244    5200 3950 6200 3950
245Wire Wire Line
246    5200 4150 6200 4150
247$Sheet
248S 6200 700 3350 5450
249U 4C7BC2B2
250F0 "fpga1" 60
251F1 "fpga1.sch" 60
252F2 "S6_TCK" I L 6200 2100 60
253F3 "S6_TDI" I L 6200 2200 60
254F4 "S6_TDO" O L 6200 2300 60
255F5 "S6_TMS" I L 6200 2400 60
256F6 "PROG_MISO[0..3]" B R 9550 4700 60
257F7 "PROG_CCLK" O R 9550 4600 60
258F8 "PROG_CSO" O R 9550 4500 60
259F9 "NF_D[0..7]" B R 9550 4250 60
260F10 "ETH_COL" B R 9550 1400 60
261F11 "ETH_CRS" B R 9550 1300 60
262F12 "NF_WE_N" O R 9550 3950 60
263F13 "NF_ALE" O R 9550 3750 60
264F14 "NF_CLE" O R 9550 3850 60
265F15 "NF_CS1_N" O R 9550 3650 60
266F16 "NF_RE_N" O R 9550 4050 60
267F17 "NF_RNB" B R 9550 4150 60
268F18 "SD_CLK" B R 9550 3100 60
269F19 "SD_CMD" B R 9550 3200 60
270F20 "SD_DAT[0..3]" B R 9550 3300 60
271F21 "ETH_CLK" B R 9550 2500 60
272F22 "ETH_RXC" B R 9550 1100 60
273F23 "ETH_TXC" B R 9550 2100 60
274F24 "ETH_TXD[0..3]" O R 9550 2200 60
275F25 "ETH_TXEN" B R 9550 2300 60
276F26 "ETH_TXER" B R 9550 2400 60
277F27 "ETH_RXER" B R 9550 2000 60
278F28 "ETH_RXDV" B R 9550 1900 60
279F29 "ETH_RXD[0..3]" I R 9550 1800 60
280F30 "ETH_RESET_N" B R 9550 1200 60
281F31 "ETH_MDIO" B R 9550 1500 60
282F32 "ETH_MDC" B R 9550 1600 60
283F33 "ETH_INT" B R 9550 950 60
284F34 "IS_DOUT[0..11]" I L 6200 4550 60
285F35 "IS_TEST" O L 6200 3850 60
286F36 "IS_STANDBY" O L 6200 3750 60
287F37 "IS_OE_N" O L 6200 3650 60
288F38 "IS_RESET_N" O L 6200 3550 60
289F39 "IS_EXTCLK" O L 6200 3450 60
290F40 "IS_I2C_ADDR" O L 6200 3350 60
291F41 "IS_SCL" B L 6200 3250 60
292F42 "IS_SDA" B L 6200 3150 60
293F43 "IS_FRAME" I L 6200 4150 60
294F44 "IS_LINE" I L 6200 4050 60
295F45 "IS_PIXEL" I L 6200 3950 60
296F46 "IS_FLASH" I L 6200 3050 60
297F47 "IS_TRIGGER" O L 6200 2950 60
298F48 "FPGA_BANK0_IO_[0..64]" B R 9550 5600 60
299$EndSheet
300$Sheet
301S 6200 6400 3300 4350
302U 4C7BC2A2
303F0 "fpga2" 60
304F1 "fpga2.sch" 60
305F2 "USBD_VP" B R 9500 10100 60
306F3 "USBD_SPD" B R 9500 9800 60
307F4 "USBD_OE_N" B R 9500 9900 60
308F5 "USBD_RCV" B R 9500 10000 60
309F6 "USBD_VM" B R 9500 10200 60
310F7 "M0_CKE" O L 6200 9800 60
311F8 "M0_UDM" O L 6200 9550 60
312F9 "M0_UDQS" O L 6200 9250 60
313F10 "M0_BA[0..1]" O L 6200 9100 60
314F11 "M0_CAS#" O L 6200 10150 60
315F12 "M0_RAS#" O L 6200 10250 60
316F13 "M0_WE#" O L 6200 10400 60
317F14 "M0_LDM" O L 6200 9650 60
318F15 "M0_LDQS" O L 6200 9350 60
319F16 "M1_UDQS" O L 6200 7200 60
320F17 "M1_UDM" O L 6200 7500 60
321F18 "M1_LDQS" O L 6200 7300 60
322F19 "M1_LDM" O L 6200 7600 60
323F20 "M1_WE#" O L 6200 8350 60
324F21 "M1_CKE" O L 6200 7750 60
325F22 "M1_RAS#" O L 6200 8200 60
326F23 "M1_CAS#" O L 6200 8100 60
327F24 "M1_BA[0..1]" O L 6200 7000 60
328F25 "M1_CS#" O L 6200 6650 60
329F26 "USBA_VM" B R 9500 9600 60
330F27 "USBA_VP" B R 9500 9500 60
331F28 "USBA_RCV" B R 9500 9400 60
332F29 "USBA_OE_N" B R 9500 9300 60
333F30 "USBA_SPD" B R 9500 9200 60
334F31 "M1_DQ[0..15]" B L 6200 6800 60
335F32 "M0_CS#" O L 6200 8750 60
336F33 "M0_DQ[0..15]" B L 6200 8900 60
337F34 "M0_A[0..12]" O L 6200 9000 60
338F35 "M1_A[0..12]" O L 6200 6900 60
339F36 "M1_CLK" O L 6200 7850 60
340F37 "M1_CLK#" O L 6200 7950 60
341F38 "M0_CLK" O L 6200 9900 60
342F39 "M0_CLK#" O L 6200 10000 60
343$EndSheet
344$Sheet
345S 10900 2900 1050 1950
346U 4C4227FE
347F0 "flash" 60
348F1 "flash.sch" 60
349F2 "SD_CMD" I L 10900 3200 60
350F3 "SD_CLK" I L 10900 3100 60
351F4 "SD_DAT[0..3]" B L 10900 3300 60
352F5 "NF_D[0..7]" B L 10900 4250 60
353F6 "NF_ALE" B L 10900 3750 60
354F7 "NF_CLE" B L 10900 3850 60
355F8 "NF_WE_N" B L 10900 3950 60
356F9 "NF_CS1_N" B L 10900 3650 60
357F10 "NF_RE_N" B L 10900 4050 60
358F11 "NF_RNB" B L 10900 4150 60
359F12 "SPI_CLK" I L 10900 4600 60
360F13 "SPI_FLASH_CS#" I L 10900 4500 60
361F14 "SPI_DQ[0..3]" B L 10900 4700 60
362$EndSheet
363$Sheet
364S 3850 6550 1100 4000
365U 4C421DD3
366F0 "sdram" 60
367F1 "sdram.sch" 60
368F2 "M0_BA[0..1]" I R 4950 9100 60
369F3 "M1_BA[0..1]" I R 4950 7000 60
370F4 "M0_WE#" I R 4950 10400 60
371F5 "M0_RAS#" I R 4950 10250 60
372F6 "M1_RAS#" I R 4950 8200 60
373F7 "M1_WE#" I R 4950 8350 60
374F8 "M0_CAS#" I R 4950 10150 60
375F9 "M0_CKE" I R 4950 9800 60
376F10 "M0_CLK" I R 4950 9900 60
377F11 "M0_CLK#" I R 4950 10000 60
378F12 "M0_CS#" I R 4950 8750 60
379F13 "M1_CLK#" I R 4950 7950 60
380F14 "M1_CLK" I R 4950 7850 60
381F15 "M1_CKE" I R 4950 7750 60
382F16 "M1_CAS#" I R 4950 8100 60
383F17 "M0_DQ[0..15]" B R 4950 8900 60
384F18 "M0_UDM" I R 4950 9550 60
385F19 "M0_LDQS" I R 4950 9350 60
386F20 "M0_A[0..12]" I R 4950 9000 60
387F21 "M0_LDM" I R 4950 9650 60
388F22 "M0_UDQS" I R 4950 9250 60
389F23 "M1_UDQS" I R 4950 7200 60
390F24 "M1_LDM" I R 4950 7600 60
391F25 "M1_LDQS" I R 4950 7300 60
392F26 "M1_UDM" I R 4950 7500 60
393F27 "M1_CS#" I R 4950 6650 60
394F28 "M1_A[0..12]" I R 4950 6900 60
395F29 "M1_DQ[0..15]" B R 4950 6800 60
396$EndSheet
397$Sheet
398S 10850 850 1300 1800
399U 4C4320F3
400F0 "ether" 60
401F1 "ether.sch" 60
402F2 "ETH_RXC" O L 10850 1100 60
403F3 "ETH_RST_N" I L 10850 1200 60
404F4 "ETH_CRS" O L 10850 1300 60
405F5 "ETH_COL" O L 10850 1400 60
406F6 "ETH_MDIO" B L 10850 1500 60
407F7 "ETH_MDC" I L 10850 1600 60
408F8 "ETH_RXD[0..3]" O L 10850 1800 60
409F9 "ETH_RXDV" O L 10850 1900 60
410F10 "ETH_RXER" O L 10850 2000 60
411F11 "ETH_TXC" B L 10850 2100 60
412F12 "ETH_TXD[0..3]" I L 10850 2200 60
413F13 "ETH_TXEN" I L 10850 2300 60
414F14 "ETH_TXER" I L 10850 2400 60
415F15 "ETH_CLK" I L 10850 2500 60
416F16 "ETH_INT" O L 10850 950 60
417$EndSheet
418$Sheet
419S 10850 9150 1100 1150
420U 4C5F1EDC
421F0 "usb" 60
422F1 "usb.sch" 60
423F2 "USBA_SPD" B L 10850 9200 60
424F3 "USBA_OE_N" B L 10850 9300 60
425F4 "USBA_RCV" B L 10850 9400 60
426F5 "USBA_VP" B L 10850 9500 60
427F6 "USBA_VM" B L 10850 9600 60
428F7 "USBD_SPD" B L 10850 9800 60
429F8 "USBD_OE_N" B L 10850 9900 60
430F9 "USBD_RCV" B L 10850 10000 60
431F10 "USBD_VP" B L 10850 10100 60
432F11 "USBD_VM" B L 10850 10200 60
433$EndSheet
434$Sheet
435S 10900 5250 1320 700
436U 4CB0D95D
437F0 "expansion" 60
438F1 "expansion.sch" 60
439F2 "FPGA_BANK0_IO_[0..64]" B L 10900 5600 60
440$EndSheet
441$EndSCHEMATC
442

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